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Eqy check #1447

Merged
merged 54 commits into from
Sep 23, 2023
Merged

Eqy check #1447

merged 54 commits into from
Sep 23, 2023

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openroadie
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@openroadie openroadie commented Sep 7, 2023

Adding eqy checks into ORFS with help from the eqy team on how to structure the input config file.

openroadie and others added 10 commits September 6, 2023 13:38
Signed-off-by: Harsh Vardhan <openroad@chez-vardhan.com>
Signed-off-by: Harsh Vardhan <openroad@chez-vardhan.com>
…alence check post repair_timing

Signed-off-by: Harsh Vardhan <openroad@chez-vardhan.com>
Signed-off-by: Harsh Vardhan <openroad@chez-vardhan.com>
Signed-off-by: Harsh Vardhan <openroad@chez-vardhan.com>
Signed-off-by: Harsh Vardhan <openroad@chez-vardhan.com>
Signed-off-by: Harsh Vardhan <openroad@chez-vardhan.com>
Signed-off-by: Harsh Vardhan <openroad@chez-vardhan.com>
@openroadie
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@vvbandeira This PR cannot be merged until the CI/CD container has these repos installed as the default (sudo make install).
Please follow the order the repos are mentioned in:

https://github.com/YosysHQ/yosys
https://github.com/YosysHQ/eqy
https://github.com/YosysHQ/sby

Please do let me know if I can help in any way. Thx !

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Signed-off-by: Harsh Vardhan <openroad@chez-vardhan.com>
Signed-off-by: Harsh Vardhan <openroad@chez-vardhan.com>
Signed-off-by: Harsh Vardhan <openroad@chez-vardhan.com>
@vijayank88
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@openroadie
Is that doing logic equivalence check?
Also plz update EQUIVALENCE_CHECK variable to part of FlowVariables.md with descriptions.

openroadie and others added 7 commits September 10, 2023 00:11
Signed-off-by: Harsh Vardhan <openroad@chez-vardhan.com>
Signed-off-by: Harsh Vardhan <openroad@chez-vardhan.com>
Signed-off-by: Harsh Vardhan <openroad@chez-vardhan.com>
Signed-off-by: Vitor Bandeira <vvbandeira@precisioninno.com>
Signed-off-by: Harsh Vardhan <openroad@chez-vardhan.com>
Signed-off-by: Harsh Vardhan <openroad@chez-vardhan.com>
@openroadie openroadie marked this pull request as ready for review September 19, 2023 19:02
openroadie and others added 13 commits September 20, 2023 09:46
Signed-off-by: Harsh Vardhan <openroad@chez-vardhan.com>
Signed-off-by: Vitor Bandeira <vvbandeira@precisioninno.com>
Signed-off-by: Vitor Bandeira <vvbandeira@precisioninno.com>
This reverts commit a0d89b5.

Signed-off-by: Vitor Bandeira <vvbandeira@precisioninno.com>
Signed-off-by: Vitor Bandeira <vvbandeira@precisioninno.com>
Signed-off-by: Vitor Bandeira <vvbandeira@precisioninno.com>
Signed-off-by: Vitor Bandeira <vvbandeira@precisioninno.com>
Signed-off-by: Vitor Bandeira <vvbandeira@precisioninno.com>
Signed-off-by: Vitor Bandeira <vvbandeira@precisioninno.com>
Signed-off-by: Vitor Bandeira <vvbandeira@precisioninno.com>
This conflicts yosys versions and causes eqy to not work

Signed-off-by: Vitor Bandeira <vvbandeira@precisioninno.com>
Signed-off-by: Vitor Bandeira <vvbandeira@precisioninno.com>
Signed-off-by: Vitor Bandeira <vvbandeira@precisioninno.com>
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Just this small question. CI is in a shape where is good to merge the PR, please let me know when to merge -- I would like to do a "squash and merge" due to the number of commits.

Edit: maybe add an exclude to the 4_eqy_output folder so as to not save in CI as it contains a lot of files which is slowing down the pipeline?

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@openroadie
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@vvbandeira this is good to merge from my point of view. But CI/CD is still failing (pr-head) as far as I can see.

Vitor Bandeira added 3 commits September 23, 2023 17:01
Signed-off-by: Vitor Bandeira <vvbandeira@precisioninno.com>
Signed-off-by: Vitor Bandeira <vvbandeira@precisioninno.com>
This reverts commit 65a21d7.

Signed-off-by: Vitor Bandeira <vvbandeira@precisioninno.com>
@vvbandeira vvbandeira merged commit 3c48244 into The-OpenROAD-Project:master Sep 23, 2023
6 of 9 checks passed
habibayassin pushed a commit to habibayassin/OpenROAD-flow-scripts that referenced this pull request Oct 8, 2023
* Add modified verilog files for equivalence checking
* Add code to write out equivalence check config file and run the equivalence check post repair_timing
* Enable equivalence checks after repair_timing
* Use -remove_cells to remove TAP cells
* Handle subdirectories in the log dir during cts_clean
* Add verilog cells for nangate45
* Add missing/used cells
* Add REMOVE_CELLS_FOR_EQY
* Add doc for new variables
* Add new variables for skipping cells for equivalence checks+cleanup
* Fixes in flip flop definitions
* Enable sky130hd/gcd eqy check
* Bump OR submodule
* etc: enable python before pip install
* etc: add pip dependencies, remove dups w/OR
* ci: enable python38
* ci: EQUIVALENCE_CHECK will be enabled per design
* ci: remove source env.sh from test_helper and GHA
        This conflicts yosys versions and causes eqy not to work
* ci: exclude 4_eqy_output from save artifacts

---

Signed-off-by: Harsh Vardhan <openroad@chez-vardhan.com>
Co-authored-by: Vitor Bandeira <vvbandeira@precisioninno.com>
Signed-off-by: habibayassin <habibayassin@aucegypt.edu>
habibayassin pushed a commit to habibayassin/OpenROAD-flow-scripts that referenced this pull request Oct 8, 2023
* Add modified verilog files for equivalence checking
* Add code to write out equivalence check config file and run the equivalence check post repair_timing
* Enable equivalence checks after repair_timing
* Use -remove_cells to remove TAP cells
* Handle subdirectories in the log dir during cts_clean
* Add verilog cells for nangate45
* Add missing/used cells
* Add REMOVE_CELLS_FOR_EQY
* Add doc for new variables
* Add new variables for skipping cells for equivalence checks+cleanup
* Fixes in flip flop definitions
* Enable sky130hd/gcd eqy check
* Bump OR submodule
* etc: enable python before pip install
* etc: add pip dependencies, remove dups w/OR
* ci: enable python38
* ci: EQUIVALENCE_CHECK will be enabled per design
* ci: remove source env.sh from test_helper and GHA
        This conflicts yosys versions and causes eqy not to work
* ci: exclude 4_eqy_output from save artifacts

---

Signed-off-by: Harsh Vardhan <openroad@chez-vardhan.com>
Co-authored-by: Vitor Bandeira <vvbandeira@precisioninno.com>
Signed-off-by: habibayassin <habibayassin@aucegypt.edu>
@huang-kaixin
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Adding eqy checks into ORFS with help from the eqy team on how to structure the input config file.
May I ask why adding eqy checks is necessary? I encountered many "110 could not execute" eqy "errors while running gcd.

@maliberty
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eqy is trying to prove that OR hasn't introduced any logic errors in the course of optimization. We did hit one such case a while ago and wanted to have some checking.

@refaay
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refaay commented Dec 5, 2023

I am trying to build and execute a fresh clone of ORFS.
I am also facing the same issue "Error: cts.tcl, 113 couldn't execute "eqy": no such file or directory" while running "make" in "OpenROAD-flow-scripts/flow" and then it breaks.
How do I fix it?

@maliberty
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@vvbandeira please help @refaay with eqy

habibayassin pushed a commit to habibayassin/OpenROAD-flow-scripts that referenced this pull request Mar 2, 2024
* Add modified verilog files for equivalence checking
* Add code to write out equivalence check config file and run the equivalence check post repair_timing
* Enable equivalence checks after repair_timing
* Use -remove_cells to remove TAP cells
* Handle subdirectories in the log dir during cts_clean
* Add verilog cells for nangate45
* Add missing/used cells
* Add REMOVE_CELLS_FOR_EQY
* Add doc for new variables
* Add new variables for skipping cells for equivalence checks+cleanup
* Fixes in flip flop definitions
* Enable sky130hd/gcd eqy check
* Bump OR submodule
* etc: enable python before pip install
* etc: add pip dependencies, remove dups w/OR
* ci: enable python38
* ci: EQUIVALENCE_CHECK will be enabled per design
* ci: remove source env.sh from test_helper and GHA
        This conflicts yosys versions and causes eqy not to work
* ci: exclude 4_eqy_output from save artifacts

---

Signed-off-by: Harsh Vardhan <openroad@chez-vardhan.com>
Co-authored-by: Vitor Bandeira <vvbandeira@precisioninno.com>
Signed-off-by: habibayassin <habibayassin@aucegypt.edu>
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7 participants