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simd.d
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simd.d
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module std.simd;
/*
pure:
nothrow:
@safe:
*/
///////////////////////////////////////////////////////////////////////////////
// Version mess
///////////////////////////////////////////////////////////////////////////////
version(X86)
{
version(DigitalMars)
version = NoSIMD; // DMD-x86 does not support SIMD
else
version = X86_OR_X64;
}
else version(X86_64)
{
version = X86_OR_X64;
}
else version(PPC)
version = PowerPC;
else version(PPC64)
version = PowerPC;
version(GNU)
version = GNU_OR_LDC;
version(LDC)
version = GNU_OR_LDC;
///////////////////////////////////////////////////////////////////////////////
// Platform specific imports
///////////////////////////////////////////////////////////////////////////////
version(DigitalMars)
{
// DMD intrinsics
}
else version(GNU)
{
// GDC intrinsics
import gcc.builtins;
}
version(GNU){} else
{
struct attribute
{
string attrib;
string value;
}
}
public import core.simd;
import std.traits, std.typetuple;
///////////////////////////////////////////////////////////////////////////////
// Define available versions of vector hardware
///////////////////////////////////////////////////////////////////////////////
version(X86_OR_X64)
{
enum SIMDVer
{
SSE,
SSE2,
SSE3, // Later Pentium4 + Athlon64
SSSE3, // Introduced in Intel 'Core' series, AMD 'Bobcat'
SSE41, // (Intel) Introduced in 45nm 'Core' series
SSE42, // (Intel) Introduced in i7
SSE4a, // (AMD) Introduced to 'Bobcat' (includes SSSE3 and below)
SSE5, // (AMD) XOP, FMA4 and CVT16. Introduced to 'Bulldozer' (includes ALL prior architectures)
AVX, // 256bit, 16regs, 3 operand opcodes, no integer
AVX2, // integer support for AVX
AVX512 // 512bit, 32regs
}
// we source this from the compiler flags, ie. -msse2 for instance
immutable SIMDVer simdVer = SIMDVer.SSE2;
enum string[SIMDVer.max+1] targetNames =
[
"sse",
"sse2",
"sse3",
"ssse3",
"sse4.1",
"sse4.2",
"sse4a",
"sse5",
"avx",
"avx2",
"avx512"
];
}
else version(ARM)
{
enum SIMDVer
{
VFP, // Should we implement this? it's deprecated on modern ARM chips
NEON, // Added to Cortex-A8, Snapdragon
VFPv4 // Added to Cortex-A15
}
immutable SIMDVer simdVer = SIMDVer.NEON;
enum string[SIMDVer.max+1] targetNames =
[
"", "", "" // TODO...
];
}
else version(PowerPC)
{
enum SIMDVer
{
VMX,
VMX128, // Extended register file (128 regs), reduced integer support, and some awesome bonus opcodes
PairedSingle // Used on Nintendo platforms
}
immutable SIMDVer simdVer = SIMDVer.VMX;
enum string[SIMDVer.max+1] targetNames =
[
"altivec",
"", // 'vmx128' doesn't exist...
""
];
}
else version(MIPS_SIMD)
{
enum SIMDVer
{
Unknown,
PairedSingle, // 32bit pairs in 64bit regs
MIPS3D, // Licensed MIPS SIMD extension
MDMX, // More comprehensive SIMD extension
XBurst1, // XBurst1 custom SIMD (Android)
PSP_VFPU // SIMD extension used by the Playstation Portable
}
immutable SIMDVer simdVer = SIMDVer.Unknown;
enum string[SIMDVer.max+1] targetNames =
[
"", "", "", "", "", "" // TODO...
];
}
else
{
// TODO: it would be nice to provide a fallback for __ctfe and hardware with no SIMD unit...
enum SIMDVer
{
None
}
immutable SIMDVer simdVer = SIMDVer.None;
enum string[SIMDVer.max+1] targetNames =
[
""
];
}
///////////////////////////////////////////////////////////////////////////////
// LLVM instructions and intrinsics for LDC.
///////////////////////////////////////////////////////////////////////////////
version(LDC)
{
template RepeatType(T, size_t n, R...)
{
static if(n == 0)
alias RepeatType = R;
else
alias RepeatType = RepeatType!(T, n - 1, T, R);
}
version(X86_OR_X64)
import ldc.gccbuiltins_x86;
import ldcsimd = ldc.simd;
alias PblendvbParam = byte16;
}
else version(GNU)
{
alias PblendvbParam = ubyte16;
}
version(GNU)
version = GNU_OR_LDC;
version(LDC)
version = GNU_OR_LDC;
///////////////////////////////////////////////////////////////////////////////
// Internal constants
///////////////////////////////////////////////////////////////////////////////
private
{
enum ulong2 signMask2 = 0x8000_0000_0000_0000;
enum uint4 signMask4 = 0x8000_0000;
enum ushort8 signMask8 = 0x8000;
enum ubyte16 signMask16 = 0x80;
}
///////////////////////////////////////////////////////////////////////////////
// Internal functions
///////////////////////////////////////////////////////////////////////////////
// TODO: deprecated; moved to std.traits...
enum bool isSIMDVector(T) = is(T : __vector(V[N]), V, size_t N);
template ElementType(T : __vector(V[N]), V, size_t N) if(isSIMDVector!T)
{
alias Impl(T) = V;
alias ElementType = std.traits.ModifyTypePreservingSTC!(Impl, OriginalType!T);
}
enum NumElements(T : __vector(V[N]), V, size_t N) = N;
template PromotionOf(T)
{
template Impl(T)
{
static if(is(T : __vector(V[N]), V, size_t N))
alias Impl = __vector(Impl!V[N/2]);
else static if(is(T == float))
alias Impl = double;
else static if(is(T == int))
alias Impl = long;
else static if(is(T == uint))
alias Impl = ulong;
else static if(is(T == short))
alias Impl = int;
else static if(is(T == ushort))
alias Impl = uint;
else static if(is(T == byte))
alias Impl = short;
else static if(is(T == ubyte))
alias Impl = ushort;
else
static assert(0, "Incorrect type: " ~ T.stringof);
}
alias PromotionOf = std.traits.ModifyTypePreservingSTC!(Impl, OriginalType!T);
}
template DemotionOf(T)
{
template Impl(T)
{
static if(is(T : __vector(V[N]), V, size_t N))
alias Impl = __vector(Impl!V[N*2]);
else static if(is(T == double))
alias Impl = float;
else static if(is(T == long))
alias Impl = int;
else static if(is(T == ulong))
alias Impl = uint;
else static if(is(T == int))
alias Impl = short;
else static if(is(T == uint))
alias Impl = ushort;
else static if(is(T == short))
alias Impl = byte;
else static if(is(T == ushort))
alias Impl = ubyte;
else
static assert(0, "Incorrect type: " ~ T.stringof);
}
alias DemotionOf = std.traits.ModifyTypePreservingSTC!(Impl, OriginalType!T);
}
private
{
enum bool isOfType(U, V) = is(Unqual!U == Unqual!V);
// pull the base type from a vector, array, or primitive
// type. The first version does not work for vectors.
template ArrayType(T : T[]) { alias T ArrayType; }
template ArrayType(T) if(isSIMDVector!T)
{
// typeof T.array.init does not work for some reason, so we use this
alias typeof(()
{
T a;
return a.array;
}()) ArrayType;
}
template BaseType(T)
{
static if(isSIMDVector!T)
alias ElementType!T BaseType;
else static if(isArray!T)
alias ArrayType!T BaseType;
else static if(isScalar!T)
alias T BaseType;
else
static assert(0, "Unsupported type");
}
template isScalarFloat(T)
{
alias U = Unqual!T;
enum bool isScalarFloat = is(U == float) || is(U == double);
}
template isScalarInt(T)
{
alias U = Unqual!T;
enum bool isScalarInt = is(U == long) || is(U == ulong) || is(U == int) || is(U == uint) || is(U == short) || is(U == ushort) || is(U == byte) || is(U == ubyte);
}
template isScalarUnsigned(T)
{
alias U = Unqual!T;
enum bool isScalarUnsigned = is(U == ulong) || is(U == uint) || is(U == ushort) || is(U == ubyte);
}
enum bool isScalar(T) = isScalarFloat!T || isScalarInt!T;
enum bool isFloatArray(T) = isArray!T && isScalarFloat!(BaseType!T);
enum bool isIntArray(T) = isArray!T && isScalarInt!(BaseType!T);
enum bool isFloatVector(T) = isSIMDVector!T && isScalarFloat(BaseType!T);
enum bool isIntVector(T) = isSIMDVector!T && isScalarInt(BaseType!T);
enum bool isSigned(T) = isScalarInt!(BaseType!T) && !isScalarUnsigned!(BaseType!T);
enum bool isUnsigned(T) = isScalarUnsigned!(BaseType!T);
enum bool is64bitElement(T) = BaseType!(T).sizeof == 8;
enum bool is64bitInteger(T) = is64bitElement!T && isScalarInt!(BaseType!T);
enum bool is32bitElement(T) = BaseType!(T).sizeof == 4;
enum bool is16bitElement(T) = BaseType!(T).sizeof == 2;
enum bool is8bitElement(T) = BaseType!(T).sizeof == 1;
/**** Templates for generating TypeTuples ****/
template staticIota(int start, int end, int stride = 1)
{
static if(start >= end)
alias staticIota = TypeTuple!();
else
alias staticIota = TypeTuple!(start, staticIota!(start + stride, end, stride));
}
template toTypeTuple(alias array, r...)
{
static if(array.length == r.length)
alias toTypeTuple = r;
else
alias toTypeTuple = toTypeTuple!(array, r, array[r.length]);
}
template interleaveTuples(a...)
{
static if(a.length == 0)
alias interleaveTuples = TypeTuple!();
else
alias interleaveTuples = TypeTuple!(a[0], a[$ / 2], interleaveTuples!(a[1 .. $ / 2], a[$ / 2 + 1 .. $]));
}
/**** And some helpers for various architectures ****/
version(X86_OR_X64)
{
template shufMask(elements...)
{
static if(elements.length == 2)
enum shufMask = ((elements[0] & 1) << 0) | ((elements[1] & 1) << 1);
else static if(elements.length == 4)
enum shufMask = ((elements[0] & 3) << 0) | ((elements[1] & 3) << 2) | ((elements[2] & 3) << 4) | ((elements[3] & 3) << 6);
else
static assert(0, "Incorrect number of elements");
}
template pshufbMask(alias elements)
{
template c(a...)
{
static if(a.length == 0)
alias c = TypeTuple!();
else
alias c = TypeTuple!(2 * a[0], 2 * a[0] + 1, c!(a[1 .. $]));
}
static if(elements.length == 16)
alias pshufbMask = toTypeTuple!elements;
else static if(elements.length == 8)
alias pshufbMask = c!(toTypeTuple!elements);
else
static assert(0, "Unsupported parameter length");
}
}
version(ARM)
{
template ARMOpType(T, bool Rounded = false)
{
// NOTE: 0-unsigned, 1-signed, 2-poly, 3-float, 4-unsigned rounded, 5-signed rounded
static if(isOfType!(T, double2) || isOfType!(T, float4))
enum uint ARMOpType = 3;
else static if(isOfType!(T, long2) || isOfType!(T, int4) || isOfType!(T, short8) || isOfType!(T, byte16))
enum uint ARMOpType = 1 + (Rounded ? 4 : 0);
else static if(isOfType!(T, ulong2) || isOfType!(T, uint4) || isOfType!(T, ushort8) || isOfType!(T, ubyte16))
enum uint ARMOpType = 0 + (Rounded ? 4 : 0);
else
static assert(0, "Incorrect type");
}
}
}
///////////////////////////////////////////////////////////////////////////////
// Public API
///////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
// Load and store
// load scalar into all components (!! or just X?). Note: SLOW on many architectures
Vector!T loadScalar(T, SIMDVer Ver = simdVer)(BaseType!T s)
{
return loadScalar!(T, Ver)(&s);
}
// load scaler from memory
T loadScalar(T, SIMDVer Ver = simdVer)(BaseType!T* pS) if(isSIMDVector!T)
{
version(X86_OR_X64)
{
version(DigitalMars)
{
static assert(0, "TODO");
}
else version(GNU)
{
static if(isOfType(T, float4))
return __builtin_ia32_loadss(pS);
else static if(isOfType(T, double2))
return __builtin_ia32_loadddup(pV);
else
static assert(0, "TODO");
}
else version(LDC)
{
//TODO: non-optimal
T r = 0;
r = ldcsimd.insertelement!(T, 0)(r, *pS);
return r;
}
}
else version(ARM)
{
static assert(0, "TODO");
}
else
{
static assert(0, "Unsupported on this architecture");
}
}
// load vector from an unaligned address
T loadUnaligned(T, SIMDVer Ver = simdVer)(BaseType!T* pV) @trusted
{
version(X86_OR_X64)
{
version(DigitalMars)
{
static assert(0, "TODO");
}
else version(GNU)
{
static if(isOfType!(T, float4))
return __builtin_ia32_loadups(pV);
else static if(isOfType!(T, double2))
return __builtin_ia32_loadupd(pV);
else
return cast(Vector!T)__builtin_ia32_loaddqu(cast(char*)pV);
}
else version(LDC)
return ldcsimd.loadUnaligned!T(pV);
}
else version(ARM)
{
static assert(0, "TODO");
}
else
{
static assert(0, "Unsupported on this architecture");
}
}
// return the X element in a scalar register
BaseType!T getScalar(SIMDVer Ver = simdVer, T)(T v) if(isSIMDVector!T)
{
version(X86_OR_X64)
{
version(DigitalMars)
{
static assert(0, "TODO");
}
else version(GNU)
{
static if(Ver >= SIMDVer.SSE41 && !is16bitElement!T)
{
static if(isOfType!(T, float4))
return __builtin_ia32_vec_ext_v4sf(v, 0);
static if(isOfType!(T, double2))
return __builtin_ia32_vec_ext_v2df(v, 0);
else static if(is64bitElement!T)
return __builtin_ia32_vec_ext_v2di(v, 0);
else static if(is32bitElement!T)
return __builtin_ia32_vec_ext_v4si(v, 0);
// else static if(is16bitElement!T)
// return __builtin_ia32_vec_ext_v8hi(v, 0); // does this opcode exist??
else static if(is8bitElement!T)
return __builtin_ia32_vec_ext_v16qi(v, 0);
}
else
static assert(0, "Unsupported vector type: " ~ T.stringof);
}
else version(LDC)
{
return ldcsimd.extractelement!(T, 0)(v);
}
}
else version(ARM)
{
static assert(0, "TODO");
}
else
{
static assert(0, "Unsupported on this architecture");
}
}
// store the X element to the address provided
// If we use BaseType!T* as a parameter type, T can not be infered
// That's why we need to use template parameter S and check that it is
// the base type in the template constraint. We will use this in some other
// functions too.
void storeScalar(SIMDVer Ver = simdVer, T, S = BaseType!T)(T v, S* pS) if(isSIMDVector!T)
{
// TODO: check this optimises correctly!! (opcode writes directly to memory)
*pS = getScalar(v);
}
// store the vector to an unaligned address
void storeUnaligned(SIMDVer Ver = simdVer, T, S = BaseType!T)(T v, S* pV) @trusted if(isSIMDVector!T)
{
version(X86_OR_X64)
{
version(DigitalMars)
{
static assert(0, "TODO");
}
else version(GNU_OR_LDC)
{
static if(isOfType!(T, float4))
__builtin_ia32_storeups(pV, v);
else static if(isOfType!(T, double2))
__builtin_ia32_storeupd(pV, v);
else
__builtin_ia32_storedqu(cast(char*)pV, cast(byte16)v);
}
}
else version(ARM)
{
static assert(0, "TODO");
}
else
{
static assert(0, "Unsupported on this architecture");
}
}
///////////////////////////////////////////////////////////////////////////////
// Shuffle, swizzle, permutation
// broadcast X to all elements
T getX(SIMDVer Ver = simdVer, T)(inout T v) if(isSIMDVector!T)
{
// broadcast the first component
return swizzle!("0", Ver)(v);
}
// broadcast Y to all elements
T getY(SIMDVer Ver = simdVer, T)(inout T v) if(isSIMDVector!T && NumElements!T >= 2)
{
// broadcast the second component
return swizzle!("1", Ver)(v);
}
// broadcast Z to all elements
T getZ(SIMDVer Ver = simdVer, T)(inout T v) if(isSIMDVector!T && NumElements!T >= 3)
{
// broadcast the 3nd component
return swizzle!("2", Ver)(v);
}
// broadcast W to all elements
T getW(SIMDVer Ver = simdVer, T)(inout T v) if(isSIMDVector!T && NumElements!T >= 4)
{
// broadcast the 4th component
return swizzle!("3", Ver)(v);
}
// set the X element
T setX(SIMDVer Ver = simdVer, T)(inout T v, inout T x) if(isSIMDVector!T)
{
version(X86_OR_X64)
{
version(DigitalMars)
{
static if(Ver >= SIMDVer.SSE41 && !is8bitElement!T)
{
static if(isOfType!(T, double2))
return __simd(XMM.BLENDPD, v, x, 1);
else static if(isOfType!(T, float4))
return __simd(XMM.BLENDPS, v, x, 1);
else static if(is64bitElement!T)
return __simd(XMM.PBLENDW, v, x, 0x0F);
else static if(is32bitElement!T)
return __simd(XMM.PBLENDW, v, x, 0x03);
else static if(is16bitElement!T)
return __simd(XMM.PBLENDW, v, x, 0x01);
}
else
static assert(0, "Unsupported vector type: " ~ T.stringof);
}
else version(GNU)
{
static if(Ver >= SIMDVer.SSE41 && !is8bitElement!T)
{
static if(isOfType!(T, double2))
return __builtin_ia32_blendpd(v, x, 1);
else static if(isOfType!(T, float4))
return __builtin_ia32_blendps(v, x, 1);
else static if(is64bitElement!T)
return __builtin_ia32_pblendw128(v, x, 0x0F);
else static if(is32bitElement!T)
return __builtin_ia32_pblendw128(v, x, 0x03);
else static if(is16bitElement!T)
return __builtin_ia32_pblendw128(v, x, 0x01);
}
else
static assert(0, "Unsupported vector type: " ~ T.stringof);
}
else version(LDC)
{
enum int n = NumElements!T;
return ldcsimd.shufflevector!(T, n, staticIota!(1, n))(v, x);
}
}
else version(ARM)
{
static assert(0, "TODO");
}
else
{
static assert(0, "Unsupported on this architecture");
}
}
// set the Y element
T setY(SIMDVer Ver = simdVer, T)(inout T v, inout T y) if(isSIMDVector!T)
{
version(X86_OR_X64)
{
version(DigitalMars)
{
static if(Ver >= SIMDVer.SSE41 && !is8bitElement!T)
{
static if(isOfType!(T, double2))
return __simd(XMM.BLENDPD, v, x, 2);
else static if(isOfType!(T, float4))
return __simd(XMM.BLENDPS, v, x, 2);
else static if(is64bitElement!T)
return __simd(XMM.PBLENDW, v, x, 0xF0);
else static if(is32bitElement!T)
return __simd(XMM.PBLENDW, v, x, 0x0C);
else static if(is16bitElement!T)
return __simd(XMM.PBLENDW, v, x, 0x02);
}
else
static assert(0, "Unsupported vector type: " ~ T.stringof);
}
else version(GNU)
{
static if(Ver >= SIMDVer.SSE41 && !is8bitElement!T)
{
static if(isOfType!(T, double2))
return __builtin_ia32_blendpd(v, y, 2);
else static if(isOfType!(T, float4))
return __builtin_ia32_blendps(v, y, 2);
else static if(is64bitElement!T)
return __builtin_ia32_pblendw128(v, y, 0xF0);
else static if(is32bitElement!T)
return __builtin_ia32_pblendw128(v, y, 0x0C);
else static if(is16bitElement!T)
return __builtin_ia32_pblendw128(v, y, 0x02);
}
else
static assert(0, "Unsupported vector type: " ~ T.stringof);
}
else version(LDC)
{
enum int n = NumElements!T;
static assert(n >= 2);
return ldcsimd.shufflevector!(T, 0, n + 1, staticIota!(2, n))(v, y);
}
}
else version(ARM)
{
static assert(0, "TODO");
}
else
{
static assert(0, "Unsupported on this architecture");
}
}
// set the Z element
T setZ(SIMDVer Ver = simdVer, T)(inout T v, inout T z) if(isSIMDVector!T)
{
version(X86_OR_X64)
{
version(DigitalMars)
{
static if(Ver >= SIMDVer.SSE41 && !is8bitElement!T)
{
static if(isOfType!(T, float4))
return __simd(XMM.BLENDPS, v, x, 4);
else static if(is32bitElement!T)
return __simd(XMM.PBLENDW, v, x, 0x30);
else static if(is16bitElement!T)
return __simd(XMM.PBLENDW, v, x, 0x04);
else
static assert(0, "Unsupported vector type: " ~ T.stringof);
}
else
static assert(0, "Unsupported vector type: " ~ T.stringof);
}
else version(GNU)
{
static if(Ver >= SIMDVer.SSE41 && !is8bitElement!T)
{
static if(isOfType!(T, float4))
return __builtin_ia32_blendps(v, z, 4);
else static if(is32bitElement!T)
return __builtin_ia32_pblendw128(v, z, 0x30);
else static if(is16bitElement!T)
return __builtin_ia32_pblendw128(v, z, 0x04);
else
static assert(0, "Unsupported vector type: " ~ T.stringof);
}
else
static assert(0, "Unsupported vector type: " ~ T.stringof);
}
else version(LDC)
{
enum int n = NumElements!T;
static assert(n >= 3);
return ldcsimd.shufflevector!(T, 0, 1, n + 2, staticIota!(3, n))(v, z);
}
}
else version(ARM)
{
static assert(0, "TODO");
}
else
{
static assert(0, "Unsupported on this architecture");
}
}
// set the W element
T setW(SIMDVer Ver = simdVer, T)(inout T v, inout T w) if(isSIMDVector!T)
{
version(X86_OR_X64)
{
version(DigitalMars)
{
static if(Ver >= SIMDVer.SSE41 && !is8bitElement!T)
{
static if(isOfType!(T, float4))
return __simd(XMM.BLENDPS, v, x, 8);
else static if(is32bitElement!T)
return __simd(XMM.PBLENDW, v, x, 0xC0);
else static if(is16bitElement!T)
return __simd(XMM.PBLENDW, v, x, 0x08);
else
static assert(0, "Unsupported vector type: " ~ T.stringof);
}
else
static assert(0, "Unsupported vector type: " ~ T.stringof);
}
else version(GNU)
{
static if(Ver >= SIMDVer.SSE41 && !is8bitElement!T)
{
static if(isOfType!(T, float4))
return __builtin_ia32_blendps(v, w, 8);
else static if(is32bitElement!T)
return __builtin_ia32_pblendw128(v, w, 0xC0);
else static if(is16bitElement!T)
return __builtin_ia32_pblendw128(v, w, 0x08);
else
static assert(0, "Unsupported vector type: " ~ T.stringof);
}
else
static assert(0, "Unsupported vector type: " ~ T.stringof);
}
else version(LDC)
{
enum int n = NumElements!T;
static assert(n >= 4);
return ldcsimd.shufflevector!(T, 0, 1, 2, n + 3, staticIota!(4, n))(v, w);
}
}
else version(ARM)
{
static assert(0, "TODO");
}
else
{
static assert(0, "Unsupported on this architecture");
}
}
// swizzle a vector: r = swizzle!"ZZWX"(v); // r = v.zzwx
T swizzle(string swiz, SIMDVer Ver = simdVer, T)(inout T v)
{
// meta to extract the elements from a swizzle string
template getElements(string s, T)
{
// accepted element component names
template elementNames(int numElements)
{
static if(numElements == 2)
alias elementNames = TypeTuple!("01", "xy");
else static if(numElements == 3)
alias elementNames = TypeTuple!("012", "xyz", "rgb");
else static if(numElements == 4)
alias elementNames = TypeTuple!("0123", "xyzw", "rgba");
else static if(numElements == 8)
alias elementNames = TypeTuple!("01234567");
else static if(numElements == 16)
alias elementNames = TypeTuple!("0123456789abcdef");
else
alias elementNames = TypeTuple!();
}
enum char lower(char c) = c >= 'A' && c <= 'Z' ? c + 32 : c;
// get the component name set for a swizzle string
template Components(string s, names...)
{
template charIn(char c, string s)
{
static if(s.length == 0)
enum charIn = false;
else
enum charIn = lower!c == s[0] || charIn!(c, s[1..$]);
}
template allIn(string chars, string s)
{
static if(chars.length == 0)
enum allIn = true;
else
enum allIn = charIn!(chars[0], s) && allIn!(chars[1..$], s);
}
static if(s.length == 0 || names.length == 0)
enum string Components = null;
else static if(allIn!(s, names[0]))
enum Components = names[0];
else
enum Components = Components!(s, names[1..$]);
}
// used to find the element id of a compoment
template Offset(char c, string elements, int i = 0)
{
static if(i == elements.length)
enum Offset = -1;
else static if(lower!c == elements[i])
enum Offset = i;
else
enum Offset = Offset!(c, elements, i+1);
}
// parse the swizzle string
template Parse(string chars, string elements)
{
static if(chars.length == 0 || elements.length == 0)
alias Parse = TypeTuple!();
else
alias Parse = TypeTuple!(Offset!(chars[0], elements), Parse!(chars[1..$], elements));
}
alias getElements = Parse!(s, Components!(s, elementNames!(NumElements!T)));
}
// repeat an element to form a broadcast
template broadcast(size_t element, size_t count)
{
static if(element == -1 || count == 0)
alias broadcast = TypeTuple!();
else
alias broadcast = TypeTuple!(element, broadcast!(element, count-1));
}
template isIdentity(E...)
{
template Impl(size_t i)
{
static if(i == E.length)
enum Impl = true;
else
enum Impl = E[i] == i && Impl!(i+1);
}
enum isIdentity = Impl!0;
}
template isBroadcast(E...)
{
template Impl(size_t i)
{
static if(i == E.length)
enum Impl = true;
else
enum Impl = E[i] == E[i-1] && Impl!(i+1);
}
enum isBroadcast = Impl!1;
}
enum numElements = NumElements!T;
// get the swizzle elements
alias el = getElements!(swiz, T);
static assert(el.length > 0, "Invalid swizzle string: '" ~ swiz ~ "'");
// support broadcasting
static if(el.length == 1)
alias elements = broadcast!(el[0], numElements);
else
alias elements = el;
// TODO: if there are fewer elements in the string than the type, should we padd with identity swizzle? ie, "yyx" -> "yyxw"
static assert(elements.length == numElements, "Invalid number of components in swizzle string '" ~ swiz ~ "' for type " ~ T.stringof);
static if(isIdentity!elements)
{
// early out if no swizzle took place
return v;
}
else
{
version(X86_OR_X64)
{
version(DigitalMars)
{
// broadcasts can usually be implemented more efficiently...
static if(isBroadcast!elements && !is32bitElement!T)
{
static if(isOfType!(T, double2))
{
// unpacks are more efficient than shuffd
static if(elements[0] == 0)
{
static if(0)//Ver >= SIMDVer.SSE3) // TODO: *** WHY DOESN'T THIS WORK?!
return __simd(XMM.MOVDDUP, v);
else
return __simd(XMM.UNPCKLPD, v, v);
}
else
return __simd(XMM.UNPCKHPD, v, v);
}
else static if(is64bitElement!(T)) // (u)long2
{
// unpacks are more efficient than shuffd
static if(elements[0] == 0)
return __simd(XMM.PUNPCKLQDQ, v, v);
else
return __simd(XMM.PUNPCKHQDQ, v, v);
}
else static if(is16bitElement!T)
{
// TODO: we should use permute to perform this operation when immediates work >_<
static if(false)// Ver >= SIMDVer.SSSE3)
{
// immutable ubyte16 permuteControl = [1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0];
// return __simd(XMM.PSHUFB, v, permuteControl);