{"payload":{"header_redesign_enabled":false,"results":[{"id":"500039791","archived":false,"color":"#b2b7f8","followers":0,"has_funding_file":false,"hl_name":"Twinkling-G/RISC_V-core","hl_trunc_description":"5 pipelines RISC_V core","language":"Verilog","mirror":false,"owned_by_organization":false,"public":true,"repo":{"repository":{"id":500039791,"name":"RISC_V-core","owner_id":92655873,"owner_login":"Twinkling-G","updated_at":"2023-02-12T08:51:43.894Z","has_issues":true}},"sponsorable":false,"topics":[],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":95,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253ATwinkling-G%252FRISC_V-core%2B%2Blanguage%253AVerilog","metadata":null,"warn_limited_results":false,"csrf_tokens":{"/Twinkling-G/RISC_V-core/star":{"post":"D4K9H8Ge2Pel4N1R7vEPO8MNk7nbi6JxOZhqMLKezMp3mbkeC_JPfAkyVDADsW-DaGmzFIud4Gyjr5jujjEg3A"},"/Twinkling-G/RISC_V-core/unstar":{"post":"splLTQxSqeDhMVvCER65MugOUa-ULD8OBfVjTVwbw2vbnWfLXHA7wBFp6N9MV9eVwbuntAQ1n3KMibvgKB51Zw"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"noKuZzBwYD8-4YKmMm5lnSlTgKQBqiYTLtujDhy0fudfLRGrWrli1RBxfm3zJaQCZpOu5dwINpsHoQfIDFOwxg"}}},"title":"Repository search results"}