diff --git a/lab2.cache/wt/webtalk_pa.xml b/lab2.cache/wt/webtalk_pa.xml
diff --git a/lab2.cache/wt/xsim.wdf b/lab2.cache/wt/xsim.wdf
@@ -1,4 +1,4 @@
 version:1
-7873696d:7873696d5c636f6d6d616e645f6c696e655f6f7074696f6e73:2d73696d5f6d6f6465:6265686176696f72616c:00:00
+7873696d:7873696d5c636f6d6d616e645f6c696e655f6f7074696f6e73:2d73696d5f6d6f6465:64656661756c743a3a6265686176696f72616c:00:00
 7873696d:7873696d5c636f6d6d616e645f6c696e655f6f7074696f6e73:2d73696d5f74797065:64656661756c743a3a:00:00
-eof:2427094519
+eof:241934075
diff --git a/lab2.runs/.jobs/vrs_config_51.xml b/lab2.runs/.jobs/vrs_config_51.xml
@@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<Runs Version="1" Minor="0">
+	<Run Id="synth_1" LaunchDir="/home/izoomko/wrk/4grade/io/lab3/lab2.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
+</Runs>
+
diff --git a/lab2.runs/.jobs/vrs_config_52.xml b/lab2.runs/.jobs/vrs_config_52.xml
@@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<Runs Version="1" Minor="0">
+	<Run Id="impl_1" LaunchDir="/home/izoomko/wrk/4grade/io/lab3/lab2.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="init_design" ToStepId="route_design"/>
+</Runs>
+
diff --git a/lab2.runs/.jobs/vrs_config_53.xml b/lab2.runs/.jobs/vrs_config_53.xml
@@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<Runs Version="1" Minor="0">
+	<Run Id="impl_1" LaunchDir="/home/izoomko/wrk/4grade/io/lab3/lab2.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="write_bitstream" ToStepId="write_bitstream"/>
+</Runs>
+
diff --git a/lab2.runs/.jobs/vrs_config_54.xml b/lab2.runs/.jobs/vrs_config_54.xml
@@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<Runs Version="1" Minor="0">
+	<Run Id="synth_1" LaunchDir="/home/izoomko/wrk/4grade/io/lab3/lab2.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
+</Runs>
+
diff --git a/lab2.runs/.jobs/vrs_config_55.xml b/lab2.runs/.jobs/vrs_config_55.xml
@@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<Runs Version="1" Minor="0">
+	<Run Id="impl_1" LaunchDir="/home/izoomko/wrk/4grade/io/lab3/lab2.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="init_design" ToStepId="route_design"/>
+</Runs>
+
diff --git a/lab2.runs/.jobs/vrs_config_56.xml b/lab2.runs/.jobs/vrs_config_56.xml
@@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<Runs Version="1" Minor="0">
+	<Run Id="impl_1" LaunchDir="/home/izoomko/wrk/4grade/io/lab3/lab2.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="write_bitstream" ToStepId="write_bitstream"/>
+</Runs>
+
diff --git a/lab2.runs/.jobs/vrs_config_57.xml b/lab2.runs/.jobs/vrs_config_57.xml
@@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<Runs Version="1" Minor="0">
+	<Run Id="synth_1" LaunchDir="/home/izoomko/wrk/4grade/io/lab3/lab2.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
+</Runs>
+
diff --git a/lab2.runs/.jobs/vrs_config_58.xml b/lab2.runs/.jobs/vrs_config_58.xml
@@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<Runs Version="1" Minor="0">
+	<Run Id="synth_1" LaunchDir="/home/izoomko/wrk/4grade/io/lab3/lab2.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
+</Runs>
+
diff --git a/lab2.runs/.jobs/vrs_config_59.xml b/lab2.runs/.jobs/vrs_config_59.xml
@@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<Runs Version="1" Minor="0">
+	<Run Id="impl_1" LaunchDir="/home/izoomko/wrk/4grade/io/lab3/lab2.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="init_design" ToStepId="route_design"/>
+</Runs>
+
diff --git a/lab2.runs/.jobs/vrs_config_60.xml b/lab2.runs/.jobs/vrs_config_60.xml
@@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<Runs Version="1" Minor="0">
+	<Run Id="impl_1" LaunchDir="/home/izoomko/wrk/4grade/io/lab3/lab2.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="write_bitstream" ToStepId="write_bitstream"/>
+</Runs>
+
diff --git a/lab2.runs/.jobs/vrs_config_61.xml b/lab2.runs/.jobs/vrs_config_61.xml
@@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<Runs Version="1" Minor="0">
+	<Run Id="impl_1" LaunchDir="/home/izoomko/wrk/4grade/io/lab3/lab2.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="write_bitstream" ToStepId="write_bitstream"/>
+</Runs>
+
diff --git a/lab2.runs/.jobs/vrs_config_62.xml b/lab2.runs/.jobs/vrs_config_62.xml
@@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<Runs Version="1" Minor="0">
+	<Run Id="impl_1" LaunchDir="/home/izoomko/wrk/4grade/io/lab3/lab2.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="write_bitstream" ToStepId="write_bitstream"/>
+</Runs>
+
diff --git a/lab2.runs/.jobs/vrs_config_63.xml b/lab2.runs/.jobs/vrs_config_63.xml
@@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<Runs Version="1" Minor="0">
+	<Run Id="synth_1" LaunchDir="/home/izoomko/wrk/4grade/io/lab3/lab2.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
+</Runs>
+
diff --git a/lab2.runs/impl_1/.Vivado_Implementation.queue.rst b/lab2.runs/impl_1/.Vivado_Implementation.queue.rst
diff --git a/lab2.runs/impl_1/.init_design.begin.rst b/lab2.runs/impl_1/.init_design.begin.rst
diff --git a/lab2.runs/impl_1/.init_design.end.rst b/lab2.runs/impl_1/.init_design.end.rst
diff --git a/lab2.runs/impl_1/.opt_design.begin.rst b/lab2.runs/impl_1/.opt_design.begin.rst
diff --git a/lab2.runs/impl_1/.opt_design.end.rst b/lab2.runs/impl_1/.opt_design.end.rst
diff --git a/lab2.runs/impl_1/.place_design.begin.rst b/lab2.runs/impl_1/.place_design.begin.rst
diff --git a/lab2.runs/impl_1/.place_design.end.rst b/lab2.runs/impl_1/.place_design.end.rst
diff --git a/lab2.runs/impl_1/.route_design.begin.rst b/lab2.runs/impl_1/.route_design.begin.rst
diff --git a/lab2.runs/impl_1/.route_design.end.rst b/lab2.runs/impl_1/.route_design.end.rst
diff --git a/lab2.runs/impl_1/.vivado.begin.rst b/lab2.runs/impl_1/.vivado.begin.rst
diff --git a/lab2.runs/impl_1/.vivado.end.rst b/lab2.runs/impl_1/.vivado.end.rst
diff --git a/lab2.runs/impl_1/.write_bitstream.begin.rst b/lab2.runs/impl_1/.write_bitstream.begin.rst
diff --git a/lab2.runs/impl_1/.write_bitstream.end.rst b/lab2.runs/impl_1/.write_bitstream.end.rst
diff --git a/lab2.runs/impl_1/ISEWrap.js b/lab2.runs/impl_1/ISEWrap.js
diff --git a/lab2.runs/impl_1/ISEWrap.sh b/lab2.runs/impl_1/ISEWrap.sh
diff --git a/lab2.runs/impl_1/gen_run.xml b/lab2.runs/impl_1/gen_run.xml
diff --git a/lab2.runs/impl_1/htr.txt b/lab2.runs/impl_1/htr.txt
diff --git a/lab2.runs/impl_1/init_design.pb b/lab2.runs/impl_1/init_design.pb
diff --git a/lab2.runs/impl_1/opt_design.pb b/lab2.runs/impl_1/opt_design.pb
diff --git a/lab2.runs/impl_1/place_design.pb b/lab2.runs/impl_1/place_design.pb
diff --git a/lab2.runs/impl_1/project.wdf b/lab2.runs/impl_1/project.wdf
diff --git a/lab2.runs/impl_1/route_design.pb b/lab2.runs/impl_1/route_design.pb
diff --git a/lab2.runs/impl_1/rundef.js b/lab2.runs/impl_1/rundef.js
diff --git a/lab2.runs/impl_1/runme.bat b/lab2.runs/impl_1/runme.bat
diff --git a/lab2.runs/impl_1/runme.sh b/lab2.runs/impl_1/runme.sh
diff --git a/lab2.runs/impl_1/uc_system_wrapper.bit b/lab2.runs/impl_1/uc_system_wrapper.bit
diff --git a/lab2.runs/impl_1/uc_system_wrapper.hwdef b/lab2.runs/impl_1/uc_system_wrapper.hwdef
diff --git a/lab2.runs/impl_1/uc_system_wrapper.mmi b/lab2.runs/impl_1/uc_system_wrapper.mmi
diff --git a/lab2.runs/impl_1/uc_system_wrapper.sysdef b/lab2.runs/impl_1/uc_system_wrapper.sysdef
diff --git a/lab2.runs/impl_1/uc_system_wrapper.tcl b/lab2.runs/impl_1/uc_system_wrapper.tcl
diff --git a/.../impl_1/uc_system_wrapper_3423.backup.vdi → ...impl_1/uc_system_wrapper_13286.backup.vdi b/.../impl_1/uc_system_wrapper_3423.backup.vdi → ...impl_1/uc_system_wrapper_13286.backup.vdi
diff --git a/lab2.runs/impl_1/uc_system_wrapper.vdi → ...impl_1/uc_system_wrapper_17231.backup.vdi b/lab2.runs/impl_1/uc_system_wrapper.vdi → ...impl_1/uc_system_wrapper_17231.backup.vdi
diff --git a/lab2.runs/impl_1/runme.log → .../impl_1/uc_system_wrapper_6134.backup.vdi b/lab2.runs/impl_1/runme.log → .../impl_1/uc_system_wrapper_6134.backup.vdi
diff --git a/lab2.runs/impl_1/uc_system_wrapper_bd.bmm b/lab2.runs/impl_1/uc_system_wrapper_bd.bmm
diff --git a/lab2.runs/impl_1/uc_system_wrapper_clock_utilization_routed.rpt b/lab2.runs/impl_1/uc_system_wrapper_clock_utilization_routed.rpt
diff --git a/lab2.runs/impl_1/uc_system_wrapper_control_sets_placed.rpt b/lab2.runs/impl_1/uc_system_wrapper_control_sets_placed.rpt
diff --git a/lab2.runs/impl_1/uc_system_wrapper_drc_opted.rpt b/lab2.runs/impl_1/uc_system_wrapper_drc_opted.rpt
diff --git a/lab2.runs/impl_1/uc_system_wrapper_drc_routed.pb b/lab2.runs/impl_1/uc_system_wrapper_drc_routed.pb
diff --git a/lab2.runs/impl_1/uc_system_wrapper_drc_routed.rpt b/lab2.runs/impl_1/uc_system_wrapper_drc_routed.rpt
diff --git a/lab2.runs/impl_1/uc_system_wrapper_drc_routed.rpx b/lab2.runs/impl_1/uc_system_wrapper_drc_routed.rpx
diff --git a/lab2.runs/impl_1/uc_system_wrapper_io_placed.rpt b/lab2.runs/impl_1/uc_system_wrapper_io_placed.rpt
diff --git a/lab2.runs/impl_1/uc_system_wrapper_methodology_drc_routed.rpt b/lab2.runs/impl_1/uc_system_wrapper_methodology_drc_routed.rpt
diff --git a/lab2.runs/impl_1/uc_system_wrapper_methodology_drc_routed.rpx b/lab2.runs/impl_1/uc_system_wrapper_methodology_drc_routed.rpx
diff --git a/lab2.runs/impl_1/uc_system_wrapper_opt.dcp b/lab2.runs/impl_1/uc_system_wrapper_opt.dcp
diff --git a/lab2.runs/impl_1/uc_system_wrapper_placed.dcp b/lab2.runs/impl_1/uc_system_wrapper_placed.dcp
diff --git a/lab2.runs/impl_1/uc_system_wrapper_power_routed.rpt b/lab2.runs/impl_1/uc_system_wrapper_power_routed.rpt
diff --git a/lab2.runs/impl_1/uc_system_wrapper_power_routed.rpx b/lab2.runs/impl_1/uc_system_wrapper_power_routed.rpx
diff --git a/lab2.runs/impl_1/uc_system_wrapper_power_summary_routed.pb b/lab2.runs/impl_1/uc_system_wrapper_power_summary_routed.pb
diff --git a/lab2.runs/impl_1/uc_system_wrapper_route_status.pb b/lab2.runs/impl_1/uc_system_wrapper_route_status.pb
diff --git a/lab2.runs/impl_1/uc_system_wrapper_route_status.rpt b/lab2.runs/impl_1/uc_system_wrapper_route_status.rpt
diff --git a/lab2.runs/impl_1/uc_system_wrapper_routed.dcp b/lab2.runs/impl_1/uc_system_wrapper_routed.dcp
diff --git a/lab2.runs/impl_1/uc_system_wrapper_timing_summary_routed.rpt b/lab2.runs/impl_1/uc_system_wrapper_timing_summary_routed.rpt
diff --git a/lab2.runs/impl_1/uc_system_wrapper_timing_summary_routed.rpx b/lab2.runs/impl_1/uc_system_wrapper_timing_summary_routed.rpx
diff --git a/lab2.runs/impl_1/uc_system_wrapper_utilization_placed.pb b/lab2.runs/impl_1/uc_system_wrapper_utilization_placed.pb
diff --git a/lab2.runs/impl_1/uc_system_wrapper_utilization_placed.rpt b/lab2.runs/impl_1/uc_system_wrapper_utilization_placed.rpt
diff --git a/lab2.runs/impl_1/usage_statistics_webtalk.html b/lab2.runs/impl_1/usage_statistics_webtalk.html
diff --git a/lab2.runs/impl_1/usage_statistics_webtalk.xml b/lab2.runs/impl_1/usage_statistics_webtalk.xml
diff --git a/lab2.runs/impl_1/vivado.pb b/lab2.runs/impl_1/vivado.pb
diff --git a/lab2.runs/impl_1/vivado_25140.backup.jou → lab2.runs/impl_1/vivado_13286.backup.jou b/lab2.runs/impl_1/vivado_25140.backup.jou → lab2.runs/impl_1/vivado_13286.backup.jou
@@ -2,8 +2,8 @@
 # Vivado v2017.2 (64-bit)
 # SW Build 1909853 on Thu Jun 15 18:39:10 MDT 2017
 # IP Build 1909766 on Thu Jun 15 19:58:00 MDT 2017
-# Start of session at: Fri Jan 12 11:45:27 2018
-# Process ID: 25140
+# Start of session at: Fri Jan 12 13:13:02 2018
+# Process ID: 13286
 # Current directory: /home/izoomko/wrk/4grade/io/lab3/lab2.runs/impl_1
 # Command line: vivado -log uc_system_wrapper.vdi -applog -product Vivado -messageDb vivado.pb -mode batch -source uc_system_wrapper.tcl -notrace
 # Log file: /home/izoomko/wrk/4grade/io/lab3/lab2.runs/impl_1/uc_system_wrapper.vdi

diff --git a/lab2.runs/impl_1/vivado.jou → lab2.runs/impl_1/vivado_17231.backup.jou b/lab2.runs/impl_1/vivado.jou → lab2.runs/impl_1/vivado_17231.backup.jou
@@ -2,8 +2,8 @@
 # Vivado v2017.2 (64-bit)
 # SW Build 1909853 on Thu Jun 15 18:39:10 MDT 2017
 # IP Build 1909766 on Thu Jun 15 19:58:00 MDT 2017
-# Start of session at: Fri Jan 12 12:11:35 2018
-# Process ID: 4768
+# Start of session at: Fri Jan 12 13:45:17 2018
+# Process ID: 17231
 # Current directory: /home/izoomko/wrk/4grade/io/lab3/lab2.runs/impl_1
 # Command line: vivado -log uc_system_wrapper.vdi -applog -product Vivado -messageDb vivado.pb -mode batch -source uc_system_wrapper.tcl -notrace
 # Log file: /home/izoomko/wrk/4grade/io/lab3/lab2.runs/impl_1/uc_system_wrapper.vdi

diff --git a/lab2.runs/impl_1/vivado_21233.backup.jou → lab2.runs/impl_1/vivado_19411.backup.jou b/lab2.runs/impl_1/vivado_21233.backup.jou → lab2.runs/impl_1/vivado_19411.backup.jou
@@ -2,8 +2,8 @@
 # Vivado v2017.2 (64-bit)
 # SW Build 1909853 on Thu Jun 15 18:39:10 MDT 2017
 # IP Build 1909766 on Thu Jun 15 19:58:00 MDT 2017
-# Start of session at: Fri Jan 12 11:39:43 2018
-# Process ID: 21233
+# Start of session at: Fri Jan 12 13:51:13 2018
+# Process ID: 19411
 # Current directory: /home/izoomko/wrk/4grade/io/lab3/lab2.runs/impl_1
 # Command line: vivado -log uc_system_wrapper.vdi -applog -product Vivado -messageDb vivado.pb -mode batch -source uc_system_wrapper.tcl -notrace
 # Log file: /home/izoomko/wrk/4grade/io/lab3/lab2.runs/impl_1/uc_system_wrapper.vdi

diff --git a/lab2.runs/impl_1/vivado_2506.backup.jou → lab2.runs/impl_1/vivado_19822.backup.jou b/lab2.runs/impl_1/vivado_2506.backup.jou → lab2.runs/impl_1/vivado_19822.backup.jou
@@ -2,8 +2,8 @@
 # Vivado v2017.2 (64-bit)
 # SW Build 1909853 on Thu Jun 15 18:39:10 MDT 2017
 # IP Build 1909766 on Thu Jun 15 19:58:00 MDT 2017
-# Start of session at: Fri Jan 12 12:05:39 2018
-# Process ID: 2506
+# Start of session at: Fri Jan 12 13:55:30 2018
+# Process ID: 19822
 # Current directory: /home/izoomko/wrk/4grade/io/lab3/lab2.runs/impl_1
 # Command line: vivado -log uc_system_wrapper.vdi -applog -product Vivado -messageDb vivado.pb -mode batch -source uc_system_wrapper.tcl -notrace
 # Log file: /home/izoomko/wrk/4grade/io/lab3/lab2.runs/impl_1/uc_system_wrapper.vdi

diff --git a/lab2.runs/impl_1/vivado_3423.backup.jou → lab2.runs/impl_1/vivado_6134.backup.jou b/lab2.runs/impl_1/vivado_3423.backup.jou → lab2.runs/impl_1/vivado_6134.backup.jou
@@ -2,8 +2,8 @@
 # Vivado v2017.2 (64-bit)
 # SW Build 1909853 on Thu Jun 15 18:39:10 MDT 2017
 # IP Build 1909766 on Thu Jun 15 19:58:00 MDT 2017
-# Start of session at: Fri Jan 12 10:05:42 2018
-# Process ID: 3423
+# Start of session at: Fri Jan 12 12:30:35 2018
+# Process ID: 6134
 # Current directory: /home/izoomko/wrk/4grade/io/lab3/lab2.runs/impl_1
 # Command line: vivado -log uc_system_wrapper.vdi -applog -product Vivado -messageDb vivado.pb -mode batch -source uc_system_wrapper.tcl -notrace
 # Log file: /home/izoomko/wrk/4grade/io/lab3/lab2.runs/impl_1/uc_system_wrapper.vdi

diff --git a/lab2.runs/impl_1/vivado_8742.backup.jou b/lab2.runs/impl_1/vivado_8742.backup.jou
diff --git a/lab2.runs/impl_1/write_bitstream.pb b/lab2.runs/impl_1/write_bitstream.pb
diff --git a/lab2.runs/synth_1/.Xil/uc_system_wrapper_propImpl.xdc b/lab2.runs/synth_1/.Xil/uc_system_wrapper_propImpl.xdc
diff --git a/lab2.runs/synth_1/.vivado.begin.rst b/lab2.runs/synth_1/.vivado.begin.rst
@@ -1,5 +1,5 @@
 <?xml version="1.0"?>
 <ProcessHandle Version="1" Minor="0">
-    <Process Command="vivado" Owner="izoomko" Host="" Pid="758">
+    <Process Command="vivado" Owner="izoomko" Host="" Pid="22400">
     </Process>
 </ProcessHandle>
diff --git a/lab2.runs/synth_1/.vivado.end.rst b/lab2.runs/synth_1/.vivado.end.rst
diff --git a/lab2.runs/synth_1/fsm_encoding.os b/lab2.runs/synth_1/fsm_encoding.os
diff --git a/lab2.runs/synth_1/gen_run.xml b/lab2.runs/synth_1/gen_run.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="UTF-8"?>
-<GenRun Id="synth_1" LaunchPart="xc7a100tcsg324-1" LaunchTime="1515747530">
+<GenRun Id="synth_1" LaunchPart="xc7a100tcsg324-1" LaunchTime="1515755046">
   <File Type="VDS-TIMING-PB" Name="uc_system_wrapper_timing_summary_synth.pb"/>
   <File Type="VDS-TIMINGSUMMARY" Name="uc_system_wrapper_timing_summary_synth.rpt"/>
   <File Type="RDS-DCP" Name="uc_system_wrapper.dcp"/>

diff --git a/lab2.runs/synth_1/project.wdf b/lab2.runs/synth_1/project.wdf
@@ -32,7 +32,7 @@ version:1
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+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:6c61756e63685f73696d756c6174696f6e5f7873696d:343338:00:00
 70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:6c61756e63685f73696d756c6174696f6e5f6d6f64656c73696d:30:00:00
 70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:6c61756e63685f73696d756c6174696f6e5f717565737461:30:00:00
 70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:6c61756e63685f73696d756c6174696f6e5f696573:30:00:00
@@ -47,4 +47,4 @@ version:1
 70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:6578706f72745f73696d756c6174696f6e5f72697669657261:3433:00:00
 70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:6578706f72745f73696d756c6174696f6e5f61637469766568646c:3433:00:00
 5f5f48494444454e5f5f:5f5f48494444454e5f5f:50726f6a65637455554944:6638653366666437323161373461383962623562323763353163343832373039:506172656e742050412070726f6a656374204944:00
-eof:238469643
+eof:1967362971
diff --git a/lab2.runs/synth_1/runme.log b/lab2.runs/synth_1/runme.log
diff --git a/lab2.runs/synth_1/uc_system_wrapper.dcp b/lab2.runs/synth_1/uc_system_wrapper.dcp
diff --git a/lab2.runs/synth_1/uc_system_wrapper.vds b/lab2.runs/synth_1/uc_system_wrapper.vds
diff --git a/lab2.runs/synth_1/uc_system_wrapper_utilization_synth.pb b/lab2.runs/synth_1/uc_system_wrapper_utilization_synth.pb
diff --git a/lab2.runs/synth_1/uc_system_wrapper_utilization_synth.rpt b/lab2.runs/synth_1/uc_system_wrapper_utilization_synth.rpt
diff --git a/lab2.runs/synth_1/vivado.jou b/lab2.runs/synth_1/vivado.jou
@@ -2,11 +2,10 @@
 # Vivado v2017.2 (64-bit)
 # SW Build 1909853 on Thu Jun 15 18:39:10 MDT 2017
 # IP Build 1909766 on Thu Jun 15 19:58:00 MDT 2017
-# Start of session at: Fri Jan 12 11:58:51 2018
-# Process ID: 791
+# Start of session at: Fri Jan 12 14:04:07 2018
+# Process ID: 22433
 # Current directory: /home/izoomko/wrk/4grade/io/lab3/lab2.runs/synth_1
 # Command line: vivado -log uc_system_wrapper.vds -product Vivado -mode batch -messageDb vivado.pb -notrace -source uc_system_wrapper.tcl
 # Log file: /home/izoomko/wrk/4grade/io/lab3/lab2.runs/synth_1/uc_system_wrapper.vds
 # Journal file: /home/izoomko/wrk/4grade/io/lab3/lab2.runs/synth_1/vivado.jou
 #-----------------------------------------------------------
-source uc_system_wrapper.tcl -notrace
diff --git a/lab2.runs/synth_1/vivado.pb b/lab2.runs/synth_1/vivado.pb
diff --git a/lab2.sdk/.metadata/.log b/lab2.sdk/.metadata/.log
@@ -12695,3 +12695,88 @@ java.io.FileNotFoundException: /home/izoomko/wrk/4grade/io/lab3/lab2.sdk/.metada
 	at org.eclipse.core.internal.resources.SaveManager.save(SaveManager.java:1165)
 	at org.eclipse.core.internal.resources.DelayedSnapshotJob.run(DelayedSnapshotJob.java:52)
 	at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55)
+
+!ENTRY org.eclipse.core.resources 4 568 2018-01-12 12:25:24.409
+!MESSAGE Could not write metadata for '/RemoteSystemsTempFiles'.
+!STACK 0
+java.io.FileNotFoundException: /home/izoomko/wrk/4grade/io/lab3/lab2.sdk/.metadata/.plugins/org.eclipse.core.resources/.projects/RemoteSystemsTempFiles/.markers.snap (No such file or directory)
+	at java.io.FileOutputStream.open0(Native Method)
+	at java.io.FileOutputStream.open(FileOutputStream.java:270)
+	at java.io.FileOutputStream.<init>(FileOutputStream.java:213)
+	at java.io.FileOutputStream.<init>(FileOutputStream.java:133)
+	at org.eclipse.core.internal.localstore.SafeChunkyOutputStream.<init>(SafeChunkyOutputStream.java:45)
+	at org.eclipse.core.internal.localstore.SafeChunkyOutputStream.<init>(SafeChunkyOutputStream.java:41)
+	at org.eclipse.core.internal.resources.SaveManager.visitAndSnap(SaveManager.java:1768)
+	at org.eclipse.core.internal.resources.SaveManager.visitAndSnap(SaveManager.java:1852)
+	at org.eclipse.core.internal.resources.SaveManager.save(SaveManager.java:1224)
+	at org.eclipse.core.internal.resources.SaveManager.save(SaveManager.java:1165)
+	at org.eclipse.core.internal.resources.DelayedSnapshotJob.run(DelayedSnapshotJob.java:52)
+	at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55)
+
+!ENTRY org.eclipse.core.resources 4 568 2018-01-12 13:08:44.975
+!MESSAGE Could not write metadata for '/RemoteSystemsTempFiles'.
+!STACK 0
+java.io.FileNotFoundException: /home/izoomko/wrk/4grade/io/lab3/lab2.sdk/.metadata/.plugins/org.eclipse.core.resources/.projects/RemoteSystemsTempFiles/.markers.snap (No such file or directory)
+	at java.io.FileOutputStream.open0(Native Method)
+	at java.io.FileOutputStream.open(FileOutputStream.java:270)
+	at java.io.FileOutputStream.<init>(FileOutputStream.java:213)
+	at java.io.FileOutputStream.<init>(FileOutputStream.java:133)
+	at org.eclipse.core.internal.localstore.SafeChunkyOutputStream.<init>(SafeChunkyOutputStream.java:45)
+	at org.eclipse.core.internal.localstore.SafeChunkyOutputStream.<init>(SafeChunkyOutputStream.java:41)
+	at org.eclipse.core.internal.resources.SaveManager.visitAndSnap(SaveManager.java:1768)
+	at org.eclipse.core.internal.resources.SaveManager.visitAndSnap(SaveManager.java:1852)
+	at org.eclipse.core.internal.resources.SaveManager.save(SaveManager.java:1224)
+	at org.eclipse.core.internal.resources.SaveManager.save(SaveManager.java:1165)
+	at org.eclipse.core.internal.resources.DelayedSnapshotJob.run(DelayedSnapshotJob.java:52)
+	at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55)
+
+!ENTRY org.eclipse.core.resources 4 568 2018-01-12 13:20:29.100
+!MESSAGE Could not write metadata for '/RemoteSystemsTempFiles'.
+!STACK 0
+java.io.FileNotFoundException: /home/izoomko/wrk/4grade/io/lab3/lab2.sdk/.metadata/.plugins/org.eclipse.core.resources/.projects/RemoteSystemsTempFiles/.markers.snap (No such file or directory)
+	at java.io.FileOutputStream.open0(Native Method)
+	at java.io.FileOutputStream.open(FileOutputStream.java:270)
+	at java.io.FileOutputStream.<init>(FileOutputStream.java:213)
+	at java.io.FileOutputStream.<init>(FileOutputStream.java:133)
+	at org.eclipse.core.internal.localstore.SafeChunkyOutputStream.<init>(SafeChunkyOutputStream.java:45)
+	at org.eclipse.core.internal.localstore.SafeChunkyOutputStream.<init>(SafeChunkyOutputStream.java:41)
+	at org.eclipse.core.internal.resources.SaveManager.visitAndSnap(SaveManager.java:1768)
+	at org.eclipse.core.internal.resources.SaveManager.visitAndSnap(SaveManager.java:1852)
+	at org.eclipse.core.internal.resources.SaveManager.save(SaveManager.java:1224)
+	at org.eclipse.core.internal.resources.SaveManager.save(SaveManager.java:1165)
+	at org.eclipse.core.internal.resources.DelayedSnapshotJob.run(DelayedSnapshotJob.java:52)
+	at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55)
+
+!ENTRY org.eclipse.core.resources 4 568 2018-01-12 13:42:12.917
+!MESSAGE Could not write metadata for '/RemoteSystemsTempFiles'.
+!STACK 0
+java.io.FileNotFoundException: /home/izoomko/wrk/4grade/io/lab3/lab2.sdk/.metadata/.plugins/org.eclipse.core.resources/.projects/RemoteSystemsTempFiles/.markers.snap (No such file or directory)
+	at java.io.FileOutputStream.open0(Native Method)
+	at java.io.FileOutputStream.open(FileOutputStream.java:270)
+	at java.io.FileOutputStream.<init>(FileOutputStream.java:213)
+	at java.io.FileOutputStream.<init>(FileOutputStream.java:133)
+	at org.eclipse.core.internal.localstore.SafeChunkyOutputStream.<init>(SafeChunkyOutputStream.java:45)
+	at org.eclipse.core.internal.localstore.SafeChunkyOutputStream.<init>(SafeChunkyOutputStream.java:41)
+	at org.eclipse.core.internal.resources.SaveManager.visitAndSnap(SaveManager.java:1768)
+	at org.eclipse.core.internal.resources.SaveManager.visitAndSnap(SaveManager.java:1852)
+	at org.eclipse.core.internal.resources.SaveManager.save(SaveManager.java:1224)
+	at org.eclipse.core.internal.resources.SaveManager.save(SaveManager.java:1165)
+	at org.eclipse.core.internal.resources.DelayedSnapshotJob.run(DelayedSnapshotJob.java:52)
+	at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55)
+
+!ENTRY org.eclipse.core.resources 4 568 2018-01-12 13:59:45.328
+!MESSAGE Could not write metadata for '/RemoteSystemsTempFiles'.
+!STACK 0
+java.io.FileNotFoundException: /home/izoomko/wrk/4grade/io/lab3/lab2.sdk/.metadata/.plugins/org.eclipse.core.resources/.projects/RemoteSystemsTempFiles/.markers.snap (No such file or directory)
+	at java.io.FileOutputStream.open0(Native Method)
+	at java.io.FileOutputStream.open(FileOutputStream.java:270)
+	at java.io.FileOutputStream.<init>(FileOutputStream.java:213)
+	at java.io.FileOutputStream.<init>(FileOutputStream.java:133)
+	at org.eclipse.core.internal.localstore.SafeChunkyOutputStream.<init>(SafeChunkyOutputStream.java:45)
+	at org.eclipse.core.internal.localstore.SafeChunkyOutputStream.<init>(SafeChunkyOutputStream.java:41)
+	at org.eclipse.core.internal.resources.SaveManager.visitAndSnap(SaveManager.java:1768)
+	at org.eclipse.core.internal.resources.SaveManager.visitAndSnap(SaveManager.java:1852)
+	at org.eclipse.core.internal.resources.SaveManager.save(SaveManager.java:1224)
+	at org.eclipse.core.internal.resources.SaveManager.save(SaveManager.java:1165)
+	at org.eclipse.core.internal.resources.DelayedSnapshotJob.run(DelayedSnapshotJob.java:52)
+	at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55)
diff --git a/lab2.sdk/.metadata/.plugins/org.eclipse.cdt.core/soft.1511808957767.pdom b/lab2.sdk/.metadata/.plugins/org.eclipse.cdt.core/soft.1511808957767.pdom
diff --git a/lab2.sdk/.metadata/.plugins/org.eclipse.cdt.ui/global-build.log b/lab2.sdk/.metadata/.plugins/org.eclipse.cdt.ui/global-build.log
diff --git a/lab2.sdk/.metadata/.plugins/org.eclipse.cdt.ui/soft.build.log b/lab2.sdk/.metadata/.plugins/org.eclipse.cdt.ui/soft.build.log
@@ -1,4 +1,4 @@
-12:21:38 **** Auto Build of configuration Debug for project soft ****
+14:03:52 **** Auto Build of configuration Debug for project soft ****
 make all 
 Building file: ../src/main.c
 Invoking: MicroBlaze gcc compiler
@@ -7,15 +7,15 @@ Finished building: ../src/main.c
 
 Building target: soft.elf
 Invoking: MicroBlaze gcc linker
-mb-gcc -Wl,-T -Wl,../src/lscript.ld -L../../soft_bsp/microblaze_0/lib -mlittle-endian -mcpu=v10.0 -mxl-soft-mul -Wl,--no-relax -Wl,--gc-sections -o "soft.elf"  ./src/main.o   -Wl,--start-group,-lxil,-lgcc,-lc,--end-group
+mb-gcc -Wl,-T -Wl,../src/lscript.ld -L../../soft_bsp/microblaze_0/lib -mlittle-endian -mcpu=v10.0 -mxl-soft-mul -Wl,--no-relax -Wl,--gc-sections -o "soft.elf"  ./src/main.o ./src/platform.o   -Wl,--start-group,-lxil,-lgcc,-lc,--end-group
 Finished building target: soft.elf
 
 Invoking: MicroBlaze Print Size
 mb-size soft.elf  |tee "soft.elf.size"
    text	   data	    bss	    dec	    hex	filename
-  12948	    268	   3112	  16328	   3fc8	soft.elf
+  13232	    268	   3108	  16608	   40e0	soft.elf
 Finished building: soft.elf.size
 
 
-12:21:38 Build Finished (took 485ms)
+14:03:53 Build Finished (took 325ms)
 
diff --git a/...metadata/.plugins/org.eclipse.core.resources/.history/1b/304c731687f700171bd7864927f02c1b b/...metadata/.plugins/org.eclipse.core.resources/.history/1b/304c731687f700171bd7864927f02c1b
@@ -0,0 +1,184 @@
+/*
+ * main.c
+ *
+ *  Created on: 27 Nov. 2017
+ *      Author: izoomko
+ */
+
+#include <xil_io.h>
+
+#define GPIO_ADDRESS	0x40000000
+#define BRAM_ADDRESS	0xC0000000
+
+#define TIMER1 BRAM_ADDRESS
+#define TIMER2 BRAM_ADDRESS + 0xC
+	#define TMR 0x0
+	#define TVAL 0x4
+	#define TCONF 0x8
+
+#define IC BRAM_ADDRESS + 0x18
+	#define ICCONF 0x0
+		#define FIFO_NOT_EMPTY 0x8
+		#define FIFO_OV 0x10
+	#define ICBUF 0x4
+
+
+#define TIMER_ADDRESS	0x41C00000
+#define TCSR0	0x00
+#define TLR0	0x04
+#define TCR0	0x08
+#define TCSR1	0x10
+#define TLR1	0x14
+#define TCR1	0x18
+
+#define C_PER	77
+
+int set_pwm(UINTPTR Addr, u32 period, u32 impulse){
+	Xil_Out32(GPIO_ADDRESS,	0);
+	Xil_Out32(Addr+TCSR0,	0);
+	Xil_Out32(Addr+TCSR1,	1 << 9 /* pwm t1 */ |
+							1 << 2 /* generate signal t1 */ |
+							1 << 1 /* down timer1 */);
+	/*
+	 * When counters are configured to count down (UDT = 1):
+	 *	PWM_PERIOD = (TLR0 + 2) * AXI_CLOCK_PERIOD
+	 *	PWM_HIGH_TIME = (TLR1 + 2) * AXI_CLOCK_PERIOD
+	 */
+	Xil_Out32(Addr+TLR0,	period - 2);
+	Xil_Out32(Addr+TCR0,	0);
+	Xil_Out32(Addr+TLR1,	impulse - 2);
+	Xil_Out32(Addr+TCR1,	0);
+	Xil_Out32(Addr+TCSR0,	1 << 10 /* en all */ |
+							1 << 9  /* pwm t1 */  |
+							1 << 2  /* generate signal t1 */ |
+							1 << 1  /* down timer1 */);
+	Xil_Out32(GPIO_ADDRESS,	impulse);
+	return 0;
+}
+
+void reverse(char str[], int len)
+{
+    int start, end;
+    char temp;
+    for(start=0, end=len-1; start < end; start++, end--) {
+        temp = *(str+start);
+        *(str+start) = *(str+end);
+        *(str+end) = temp;
+    }
+}
+
+char* itoa(int num, char* str, int base)
+{
+    int i = 0;
+    int isNegative = 0;
+
+    /* A zero is same "0" string in all base */
+    if (num == 0) {
+        str[i] = '0';
+        str[i + 1] = '\0';
+        return str;
+    }
+
+    /* negative numbers are only handled if base is 10
+       otherwise considered unsigned number */
+    if (num < 0 && base == 10) {
+        isNegative = 1;
+        num = -num;
+    }
+
+    while (num != 0) {
+        int rem = num % base;
+        str[i++] = (rem > 9)? (rem-10) + 'A' : rem + '0';
+        num = num/base;
+    }
+
+    /* Append negative sign for negative numbers */
+    if (isNegative){
+        str[i++] = '-';
+    }
+
+    str[i] = '\0';
+
+    reverse(str, i);
+
+    return str;
+}
+
+
+#define LAB3_ABS(x) ((x) > (0) ? (x) : (-x))
+int main()
+{
+//    bus_write(0x0, (uint16_t) ~0);
+//    bus_write(0x8, Timer::TimerInc);
+    int impulse_posedge = 0;
+    int impulse_negedge = 0;
+    int next_posedge = 0;
+
+    // static int c = 0;
+    int read_n = 0;
+    double ratio = 0;
+    print("GOVNO");
+	int state = 0;
+	while (1) {
+		switch (state) {
+		case 0: // init
+			set_pwm(TIMER_ADDRESS, 40000, 10000);
+			Xil_Out32(TIMER1 + TCONF,	2);
+			Xil_Out32(TIMER1 + TMR,	~0);
+			Xil_Out32(TIMER1 + TCONF,	1);
+
+			Xil_Out32(IC + ICCONF,	0x1 | 0x20); // shoud be moved upper probably
+			microblaze_enable_interrupts();
+			state = 1;
+			break;
+		case 1: {// wait for non-empty
+			u32 icconf = Xil_In32(IC + ICCONF);
+            if (icconf & FIFO_NOT_EMPTY) {
+                switch (read_n) {
+                    case 0:
+                        state = 2;
+                        break;
+                    case 1:
+                        state = 3;
+                        break;
+                    case 2:
+                        state = 4;
+                        break;
+                }
+            }
+            if (icconf & FIFO_OV) {
+                //abort();
+            }
+		} break;
+        case 2: // read impulse posedge
+            impulse_posedge = next_posedge;
+            state = 1;
+            read_n = 1;
+            break;
+        case 3: // imp negedge
+            impulse_negedge = Xil_In32(IC + ICBUF);
+            state = 1;
+            read_n = 2;
+            break;
+        case 4: { // signal end
+            next_posedge = Xil_In32(IC + ICBUF);
+            state = 1;
+            read_n = 0;
+            const float epsilon = 10e-2;
+            float value = (float) (next_posedge - impulse_posedge) / (impulse_negedge - impulse_posedge);
+            if (LAB3_ABS(value - ratio) > epsilon && value > 0) {
+                ratio = value;
+        		char buf[12];
+        		Xil_Out32(GPIO_ADDRESS,	(int)ratio);
+        		itoa((int)ratio, buf, 10);
+        		print(buf);
+        		print("\n");
+            }
+            if (value < 0) {
+            	print("[Error] Timer overflow probably");
+            }
+        } break;
+		}
+	}
+	return 0;
+}
diff --git a/...metadata/.plugins/org.eclipse.core.resources/.history/2a/d0b598e47ff700171bd7864927f02c1b b/...metadata/.plugins/org.eclipse.core.resources/.history/2a/d0b598e47ff700171bd7864927f02c1b
@@ -0,0 +1,184 @@
+/*
+ * main.c
+ *
+ *  Created on: 27 Nov. 2017
+ *      Author: izoomko
+ */
+
+#include <xil_io.h>
+
+#define GPIO_ADDRESS	0x40000000
+#define BRAM_ADDRESS	0xC0000000
+
+#define TIMER1 BRAM_ADDRESS
+#define TIMER2 BRAM_ADDRESS + 0xC
+	#define TMR 0x0
+	#define TVAL 0x4
+	#define TCONF 0x8
+
+#define IC BRAM_ADDRESS + 0x18
+	#define ICCONF 0x0
+		#define FIFO_NOT_EMPTY 0x8
+		#define FIFO_OV 0x10
+	#define ICBUF 0x4
+
+
+#define TIMER_ADDRESS	0x41C00000
+#define TCSR0	0x00
+#define TLR0	0x04
+#define TCR0	0x08
+#define TCSR1	0x10
+#define TLR1	0x14
+#define TCR1	0x18
+
+#define C_PER	77
+
+int set_pwm(UINTPTR Addr, u32 period, u32 impulse){
+	Xil_Out32(GPIO_ADDRESS,	0);
+	Xil_Out32(Addr+TCSR0,	0);
+	Xil_Out32(Addr+TCSR1,	1 << 9 /* pwm t1 */ |
+							1 << 2 /* generate signal t1 */ |
+							1 << 1 /* down timer1 */);
+	/*
+	 * When counters are configured to count down (UDT = 1):
+	 *	PWM_PERIOD = (TLR0 + 2) * AXI_CLOCK_PERIOD
+	 *	PWM_HIGH_TIME = (TLR1 + 2) * AXI_CLOCK_PERIOD
+	 */
+	Xil_Out32(Addr+TLR0,	period - 2);
+	Xil_Out32(Addr+TCR0,	0);
+	Xil_Out32(Addr+TLR1,	impulse - 2);
+	Xil_Out32(Addr+TCR1,	0);
+	Xil_Out32(Addr+TCSR0,	1 << 10 /* en all */ |
+							1 << 9  /* pwm t1 */  |
+							1 << 2  /* generate signal t1 */ |
+							1 << 1  /* down timer1 */);
+	Xil_Out32(GPIO_ADDRESS,	impulse);
+	return 0;
+}
+
+void reverse(char str[], int len)
+{
+    int start, end;
+    char temp;
+    for(start=0, end=len-1; start < end; start++, end--) {
+        temp = *(str+start);
+        *(str+start) = *(str+end);
+        *(str+end) = temp;
+    }
+}
+
+char* itoa(int num, char* str, int base)
+{
+    int i = 0;
+    int isNegative = 0;
+
+    /* A zero is same "0" string in all base */
+    if (num == 0) {
+        str[i] = '0';
+        str[i + 1] = '\0';
+        return str;
+    }
+
+    /* negative numbers are only handled if base is 10
+       otherwise considered unsigned number */
+    if (num < 0 && base == 10) {
+        isNegative = 1;
+        num = -num;
+    }
+
+    while (num != 0) {
+        int rem = num % base;
+        str[i++] = (rem > 9)? (rem-10) + 'A' : rem + '0';
+        num = num/base;
+    }
+
+    /* Append negative sign for negative numbers */
+    if (isNegative){
+        str[i++] = '-';
+    }
+
+    str[i] = '\0';
+
+    reverse(str, i);
+
+    return str;
+}
+
+
+#define LAB3_ABS(x) ((x) > (0) ? (x) : (-x))
+int main()
+{
+//    bus_write(0x0, (uint16_t) ~0);
+//    bus_write(0x8, Timer::TimerInc);
+    int impulse_posedge = 0;
+    int impulse_negedge = 0;
+    int next_posedge = 0;
+
+    // static int c = 0;
+    int read_n = 0;
+    double ratio = 0;
+    print("GOVNO");
+	int state = 0;
+	while (1) {
+		Xil_Out32(GPIO_ADDRESS,	state);
+		switch (state) {
+		case 0: // init
+			set_pwm(TIMER_ADDRESS, 40000, 10000);
+			Xil_Out32(TIMER1 + TCONF,	2);
+			Xil_Out32(TIMER1 + TMR,	~0);
+			Xil_Out32(TIMER1 + TCONF,	1);
+
+			Xil_Out32(IC + ICCONF,	0x1 | 0x20); // shoud be moved upper probably
+
+			state = 1;
+			break;
+		case 1: {// wait for non-empty
+			u32 icconf = Xil_In32(IC + ICCONF);
+            if (icconf & FIFO_NOT_EMPTY) {
+                switch (read_n) {
+                    case 0:
+                        state = 2;
+                        break;
+                    case 1:
+                        state = 3;
+                        break;
+                    case 2:
+                        state = 4;
+                        break;
+                }
+            }
+            if (icconf & FIFO_OV) {
+                //abort();
+            }
+		} break;
+        case 2: // read impulse posedge
+            impulse_posedge = next_posedge;
+            state = 1;
+            read_n = 1;
+            break;
+        case 3: // imp negedge
+            impulse_negedge = Xil_In32(IC + ICBUF);
+            state = 1;
+            read_n = 2;
+            break;
+        case 4: { // signal end
+            next_posedge = Xil_In32(IC + ICBUF);
+            state = 1;
+            read_n = 0;
+            const float epsilon = 10e-2;
+            float value = (float) (next_posedge - impulse_posedge) / (impulse_negedge - impulse_posedge);
+            if (LAB3_ABS(value - ratio) > epsilon && value > 0) {
+                ratio = value;
+        		char buf[12];
+        		itoa((int)ratio, buf, 10);
+        		print(buf);
+        		print("\n");
+            }
+            if (value < 0) {
+            	print("[Error] Timer overflow probably");
+            }
+        } break;
+		}
+	}
+	return 0;
+}
diff --git a/...metadata/.plugins/org.eclipse.core.resources/.history/43/40a0604688f700171bd7864927f02c1b b/...metadata/.plugins/org.eclipse.core.resources/.history/43/40a0604688f700171bd7864927f02c1b
@@ -0,0 +1,190 @@
+/*
+ * main.c
+ *
+ *  Created on: 27 Nov. 2017
+ *      Author: izoomko
+ */
+
+#include <stdio.h>
+#include "platform.h"
+#include "xil_printf.h"
+#include <xil_io.h>
+#include "mb_interface.h"
+
+
+#define GPIO_ADDRESS	0x40000000
+#define BRAM_ADDRESS	0xC0000000
+
+#define TIMER1 BRAM_ADDRESS
+#define TIMER2 BRAM_ADDRESS + 0xC
+	#define TMR 0x0
+	#define TVAL 0x4
+	#define TCONF 0x8
+
+#define IC BRAM_ADDRESS + 0x18
+	#define ICCONF 0x0
+		#define FIFO_NOT_EMPTY 0x8
+		#define FIFO_OV 0x10
+	#define ICBUF 0x4
+
+
+#define TIMER_ADDRESS	0x41C00000
+#define TCSR0	0x00
+#define TLR0	0x04
+#define TCR0	0x08
+#define TCSR1	0x10
+#define TLR1	0x14
+#define TCR1	0x18
+
+#define C_PER	77
+
+int set_pwm(UINTPTR Addr, u32 period, u32 impulse){
+	Xil_Out32(GPIO_ADDRESS,	0);
+	Xil_Out32(Addr+TCSR0,	0);
+	Xil_Out32(Addr+TCSR1,	1 << 9 /* pwm t1 */ |
+							1 << 2 /* generate signal t1 */ |
+							1 << 1 /* down timer1 */);
+	/*
+	 * When counters are configured to count down (UDT = 1):
+	 *	PWM_PERIOD = (TLR0 + 2) * AXI_CLOCK_PERIOD
+	 *	PWM_HIGH_TIME = (TLR1 + 2) * AXI_CLOCK_PERIOD
+	 */
+	Xil_Out32(Addr+TLR0,	period - 2);
+	Xil_Out32(Addr+TCR0,	0);
+	Xil_Out32(Addr+TLR1,	impulse - 2);
+	Xil_Out32(Addr+TCR1,	0);
+	Xil_Out32(Addr+TCSR0,	1 << 10 /* en all */ |
+							1 << 9  /* pwm t1 */  |
+							1 << 2  /* generate signal t1 */ |
+							1 << 1  /* down timer1 */);
+	Xil_Out32(GPIO_ADDRESS,	impulse);
+	return 0;
+}
+
+void reverse(char str[], int len)
+{
+    int start, end;
+    char temp;
+    for(start=0, end=len-1; start < end; start++, end--) {
+        temp = *(str+start);
+        *(str+start) = *(str+end);
+        *(str+end) = temp;
+    }
+}
+
+char* itoa(int num, char* str, int base)
+{
+    int i = 0;
+    int isNegative = 0;
+
+    /* A zero is same "0" string in all base */
+    if (num == 0) {
+        str[i] = '0';
+        str[i + 1] = '\0';
+        return str;
+    }
+
+    /* negative numbers are only handled if base is 10
+       otherwise considered unsigned number */
+    if (num < 0 && base == 10) {
+        isNegative = 1;
+        num = -num;
+    }
+
+    while (num != 0) {
+        int rem = num % base;
+        str[i++] = (rem > 9)? (rem-10) + 'A' : rem + '0';
+        num = num/base;
+    }
+
+    /* Append negative sign for negative numbers */
+    if (isNegative){
+        str[i++] = '-';
+    }
+
+    str[i] = '\0';
+
+    reverse(str, i);
+
+    return str;
+}
+
+
+#define LAB3_ABS(x) ((x) > (0) ? (x) : (-x))
+int main()
+{
+//    bus_write(0x0, (uint16_t) ~0);
+//    bus_write(0x8, Timer::TimerInc);
+	init_platform();
+    int impulse_posedge = 0;
+    int impulse_negedge = 0;
+    int next_posedge = 0;
+
+    // static int c = 0;
+    int read_n = 0;
+    double ratio = 0;
+    print("GOVNO");
+	int state = 0;
+	while (1) {
+		switch (state) {
+		case 0: // init
+			set_pwm(TIMER_ADDRESS, 40000, 10000);
+			Xil_Out32(TIMER1 + TCONF,	2);
+			Xil_Out32(TIMER1 + TMR,	~0);
+			Xil_Out32(TIMER1 + TCONF,	1);
+
+			Xil_Out32(IC + ICCONF,	0x1 | 0x20); // shoud be moved upper probably
+			microblaze_enable_interrupts();
+			state = 1;
+			break;
+		case 1: {// wait for non-empty
+			u32 icconf = Xil_In32(IC + ICCONF);
+            if (icconf & FIFO_NOT_EMPTY) {
+                switch (read_n) {
+                    case 0:
+                        state = 2;
+                        break;
+                    case 1:
+                        state = 3;
+                        break;
+                    case 2:
+                        state = 4;
+                        break;
+                }
+            }
+            if (icconf & FIFO_OV) {
+                //abort();
+            }
+		} break;
+        case 2: // read impulse posedge
+            impulse_posedge = next_posedge;
+            state = 1;
+            read_n = 1;
+            break;
+        case 3: // imp negedge
+            impulse_negedge = Xil_In32(IC + ICBUF);
+            state = 1;
+            read_n = 2;
+            break;
+        case 4: { // signal end
+            next_posedge = Xil_In32(IC + ICBUF);
+            state = 1;
+            read_n = 0;
+            const float epsilon = 10e-2;
+            float value = (float) (next_posedge - impulse_posedge) / (impulse_negedge - impulse_posedge);
+            if (LAB3_ABS(value - ratio) > epsilon && value > 0) {
+                ratio = value;
+        		char buf[12];
+        		Xil_Out32(GPIO_ADDRESS,	5);
+        		itoa((int)ratio, buf, 10);
+        		print(buf);
+        		print("\n");
+            }
+            if (value < 0) {
+            	print("[Error] Timer overflow probably");
+            }
+        } break;
+		}
+	}
+	return 0;
+}