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[JSC] Enable AVX JIT code generation
https://bugs.webkit.org/show_bug.cgi?id=249322
rdar://problem/103361339

Reviewed by Justin Michaud.

This patch flips a flag so that x86_64 JIT will use AVX if AVX is supported.
This is a part of bringup work of Wasm SIMD on x86_64 where we support SIMD
operation with AVX.

A/B test says neutral on iMac20,1 and MacBookAir8,2 for JetStream2 and Speedometer2.

* Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h:
(JSC::MacroAssemblerX86Common::supportsAVX):

Canonical link: https://commits.webkit.org/257884@main
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Constellation committed Dec 15, 2022
1 parent 952779e commit 67f7666861e7cb1e47c9074c7e4f1154679c7d2b
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Showing 3 changed files with 9 additions and 3 deletions.
@@ -4260,8 +4260,9 @@ class MacroAssemblerX86Common : public AbstractMacroAssembler<Assembler> {

static bool supportsAVX()
{
// AVX still causes mysterious regressions and those regressions can be massive.
return false;
if (s_avxCheckState == CPUIDCheckState::NotChecked)
collectCPUFeatures();
return s_avxCheckState == CPUIDCheckState::Set;
}

static bool supportsAVXForSIMD()
@@ -136,6 +136,12 @@ class MacroAssemblerX86_64 : public MacroAssemblerX86Common {
}
}

void clearSIMDStatus()
{
if (supportsAVX())
m_assembler.vzeroupper();
}

void addDouble(AbsoluteAddress address, FPRegisterID dest)
{
move(TrustedImmPtr(address.m_ptr), scratchRegister());
@@ -6941,7 +6941,6 @@ class X86Assembler {
writer.threeBytesVexNds(simdPrefix, VexImpliedBytes::TwoBytesOp, vexW, (RegisterID)0, (RegisterID)0, (RegisterID)0);
else
writer.twoBytesVex(simdPrefix, (RegisterID)0, (RegisterID)0);
writer.twoBytesVex(simdPrefix, (RegisterID)0, (RegisterID)0);
writer.putByteUnchecked(opcode);
}

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