StructureStubInfo should have GPRReg members not int8_ts

https://bugs.webkit.org/show_bug.cgi?id=179071 Reviewed by Michael Saboff. This patch makes the various RegisterID enums be backed by uint8_t. This means that we can remove the old int8_t members in StructureStubInfo and replace them with the correct enum types. Also, this fixes an indentation issue in ARMv7Assembler.h. * assembler/ARM64Assembler.h: * assembler/ARMAssembler.h: * assembler/ARMv7Assembler.h: (JSC::ARMRegisters::asSingle): (JSC::ARMRegisters::asDouble): * assembler/MIPSAssembler.h: * assembler/X86Assembler.h: * bytecode/InlineAccess.cpp: (JSC::InlineAccess::generateSelfPropertyAccess): (JSC::getScratchRegister): * bytecode/PolymorphicAccess.cpp: (JSC::PolymorphicAccess::regenerate): * bytecode/StructureStubInfo.h: (JSC::StructureStubInfo::valueRegs const): * dfg/DFGSpeculativeJIT.cpp: (JSC::DFG::SpeculativeJIT::compileIn): * ftl/FTLLowerDFGToB3.cpp: (JSC::FTL::DFG::LowerDFGToB3::compileIn): * jit/JITInlineCacheGenerator.cpp: (JSC::JITByIdGenerator::JITByIdGenerator): (JSC::JITGetByIdWithThisGenerator::JITGetByIdWithThisGenerator): Canonical link: https://commits.webkit.org/195199@main git-svn-id: https://svn.webkit.org/repository/webkit/trunk@224243 268f45cc-cd09-0410-ab3c-d52691b4dbfc
WebKit · Oct 31, 2017 · b4850914b475b49ea496a4c13cc15e53103dfc33 · b485091
1 parent c0cfbbb
commit b4850914b475b49ea496a4c13cc15e53103dfc33
Showing 12 changed files with 204 additions and 168 deletions.
diff --git a/Source/JavaScriptCore/ChangeLog b/Source/JavaScriptCore/ChangeLog
@@ -1,3 +1,38 @@
+2017-10-31  Keith Miller  <keith_miller@apple.com>
+
+        StructureStubInfo should have GPRReg members not int8_ts
+        https://bugs.webkit.org/show_bug.cgi?id=179071
+
+        Reviewed by Michael Saboff.
+
+        This patch makes the various RegisterID enums be backed by
+        uint8_t. This means that we can remove the old int8_t members in
+        StructureStubInfo and replace them with the correct enum types.
+
+        Also, this fixes an indentation issue in ARMv7Assembler.h.
+
+        * assembler/ARM64Assembler.h:
+        * assembler/ARMAssembler.h:
+        * assembler/ARMv7Assembler.h:
+        (JSC::ARMRegisters::asSingle):
+        (JSC::ARMRegisters::asDouble):
+        * assembler/MIPSAssembler.h:
+        * assembler/X86Assembler.h:
+        * bytecode/InlineAccess.cpp:
+        (JSC::InlineAccess::generateSelfPropertyAccess):
+        (JSC::getScratchRegister):
+        * bytecode/PolymorphicAccess.cpp:
+        (JSC::PolymorphicAccess::regenerate):
+        * bytecode/StructureStubInfo.h:
+        (JSC::StructureStubInfo::valueRegs const):
+        * dfg/DFGSpeculativeJIT.cpp:
+        (JSC::DFG::SpeculativeJIT::compileIn):
+        * ftl/FTLLowerDFGToB3.cpp:
+        (JSC::FTL::DFG::LowerDFGToB3::compileIn):
+        * jit/JITInlineCacheGenerator.cpp:
+        (JSC::JITByIdGenerator::JITByIdGenerator):
+        (JSC::JITGetByIdWithThisGenerator::JITGetByIdWithThisGenerator):
+
 2017-10-31  Devin Rousso  <webkit@devinrousso.com>
 
         Web Inspector: make ScriptCallStack::maxCallStackSizeToCapture the default value when capturing backtraces

diff --git a/Source/JavaScriptCore/assembler/ARM64Assembler.h b/Source/JavaScriptCore/assembler/ARM64Assembler.h
@@ -157,7 +157,7 @@ inline uint16_t getHalfword(uint64_t value, int which)
 
 namespace ARM64Registers {
 
-typedef enum {
+enum RegisterID : uint8_t {
     // Parameter/result registers.
     x0,
     x1,
@@ -203,7 +203,7 @@ typedef enum {
     x29 = fp,
     x30 = lr,
     zr = 0x3f,
-} RegisterID;
+};
 
 typedef enum {
     pc,

diff --git a/Source/JavaScriptCore/assembler/ARMAssembler.h b/Source/JavaScriptCore/assembler/ARMAssembler.h
@@ -38,7 +38,7 @@ namespace JSC {
 
     namespace ARMRegisters {
 
-        typedef enum {
+        enum RegisterID : uint8_t {
             r0,
             r1,
             r2,
@@ -63,7 +63,7 @@ namespace JSC {
             r13 = sp,
             r14 = lr,
             r15 = pc
-        } RegisterID;
+        };
 
         typedef enum {
             apsr,

diff --git a/Source/JavaScriptCore/assembler/ARMv7Assembler.h b/Source/JavaScriptCore/assembler/ARMv7Assembler.h
@@ -39,142 +39,142 @@ namespace JSC {
 
 namespace ARMRegisters {
 
-    typedef enum {
-        r0,
-        r1,
-        r2,
-        r3,
-        r4,
-        r5,
-        r6,
-        r7,
-        r8,
-        r9,
-        r10,
-        r11,
-        r12,
-        r13,
-        r14,
-        r15,
-
-        fp = r7,   // frame pointer
-        sb = r9,   // static base
-        sl = r10,  // stack limit
-        ip = r12,
-        sp = r13,
-        lr = r14,
-        pc = r15
-    } RegisterID;
+enum RegisterID : uint8_t {
+    r0,
+    r1,
+    r2,
+    r3,
+    r4,
+    r5,
+    r6,
+    r7,
+    r8,
+    r9,
+    r10,
+    r11,
+    r12,
+    r13,
+    r14,
+    r15,
+
+    fp = r7,   // frame pointer
+    sb = r9,   // static base
+    sl = r10,  // stack limit
+    ip = r12,
+    sp = r13,
+    lr = r14,
+    pc = r15
+};
 
-    typedef enum {
-        apsr,
-        fpscr
-    } SPRegisterID;
+typedef enum {
+    apsr,
+    fpscr
+} SPRegisterID;
 
-    typedef enum {
-        s0,
-        s1,
-        s2,
-        s3,
-        s4,
-        s5,
-        s6,
-        s7,
-        s8,
-        s9,
-        s10,
-        s11,
-        s12,
-        s13,
-        s14,
-        s15,
-        s16,
-        s17,
-        s18,
-        s19,
-        s20,
-        s21,
-        s22,
-        s23,
-        s24,
-        s25,
-        s26,
-        s27,
-        s28,
-        s29,
-        s30,
-        s31,
-    } FPSingleRegisterID;
+typedef enum {
+    s0,
+    s1,
+    s2,
+    s3,
+    s4,
+    s5,
+    s6,
+    s7,
+    s8,
+    s9,
+    s10,
+    s11,
+    s12,
+    s13,
+    s14,
+    s15,
+    s16,
+    s17,
+    s18,
+    s19,
+    s20,
+    s21,
+    s22,
+    s23,
+    s24,
+    s25,
+    s26,
+    s27,
+    s28,
+    s29,
+    s30,
+    s31,
+} FPSingleRegisterID;
 
-    typedef enum {
-        d0,
-        d1,
-        d2,
-        d3,
-        d4,
-        d5,
-        d6,
-        d7,
-        d8,
-        d9,
-        d10,
-        d11,
-        d12,
-        d13,
-        d14,
-        d15,
+typedef enum {
+    d0,
+    d1,
+    d2,
+    d3,
+    d4,
+    d5,
+    d6,
+    d7,
+    d8,
+    d9,
+    d10,
+    d11,
+    d12,
+    d13,
+    d14,
+    d15,
 #if CPU(ARM_NEON) || CPU(ARM_VFP_V3_D32)
-        d16,
-        d17,
-        d18,
-        d19,
-        d20,
-        d21,
-        d22,
-        d23,
-        d24,
-        d25,
-        d26,
-        d27,
-        d28,
-        d29,
-        d30,
-        d31,
+    d16,
+    d17,
+    d18,
+    d19,
+    d20,
+    d21,
+    d22,
+    d23,
+    d24,
+    d25,
+    d26,
+    d27,
+    d28,
+    d29,
+    d30,
+    d31,
 #endif // CPU(ARM_NEON) || CPU(ARM_VFP_V3_D32)
-    } FPDoubleRegisterID;
+} FPDoubleRegisterID;
 
 #if CPU(ARM_NEON)
-    typedef enum {
-        q0,
-        q1,
-        q2,
-        q3,
-        q4,
-        q5,
-        q6,
-        q7,
-        q8,
-        q9,
-        q10,
-        q11,
-        q12,
-        q13,
-        q14,
-        q15,
-    } FPQuadRegisterID;
+typedef enum {
+    q0,
+    q1,
+    q2,
+    q3,
+    q4,
+    q5,
+    q6,
+    q7,
+    q8,
+    q9,
+    q10,
+    q11,
+    q12,
+    q13,
+    q14,
+    q15,
+} FPQuadRegisterID;
 #endif // CPU(ARM_NEON)
 
-    inline FPSingleRegisterID asSingle(FPDoubleRegisterID reg)
-    {
-        ASSERT(reg < d16);
-        return (FPSingleRegisterID)(reg << 1);
-    }
-
-    inline FPDoubleRegisterID asDouble(FPSingleRegisterID reg)
-    {
-        ASSERT(!(reg & 1));
-        return (FPDoubleRegisterID)(reg >> 1);
-    }
+inline FPSingleRegisterID asSingle(FPDoubleRegisterID reg)
+{
+    ASSERT(reg < d16);
+    return (FPSingleRegisterID)(reg << 1);
+}
+
+inline FPDoubleRegisterID asDouble(FPSingleRegisterID reg)
+{
+    ASSERT(!(reg & 1));
+    return (FPDoubleRegisterID)(reg >> 1);
+}
 
 } // namespace ARMRegisters
 

diff --git a/Source/JavaScriptCore/assembler/MIPSAssembler.h b/Source/JavaScriptCore/assembler/MIPSAssembler.h
@@ -41,7 +41,8 @@ namespace JSC {
 typedef uint32_t MIPSWord;
 
 namespace MIPSRegisters {
-typedef enum {
+
+enum RegisterID : uint8_t {
     r0 = 0,
     r1,
     r2,
@@ -106,7 +107,7 @@ typedef enum {
     sp = r29,
     fp = r30,
     ra = r31
-} RegisterID;
+};
 
 // Currently, we don't have support for any special purpose registers.
 typedef enum {

diff --git a/Source/JavaScriptCore/assembler/X86Assembler.h b/Source/JavaScriptCore/assembler/X86Assembler.h
@@ -41,7 +41,7 @@ inline bool CAN_SIGN_EXTEND_8_32(int32_t value) { return value == (int32_t)(sign
 
 namespace X86Registers {
 
-typedef enum {
+enum RegisterID : uint8_t {
     eax,
     ecx,
     edx,
@@ -60,7 +60,7 @@ typedef enum {
     r14,
     r15
 #endif
-} RegisterID;
+};
 
 typedef enum {
     eip,