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README.md 2019.2 Vitis™ Application Acceleration Development Flow Tutorials Hot… Dec 2, 2019

README.md

English | 日本語

2019.2 Vitis™ Application Acceleration Development Flow Tutorials

See SDAccel™ Development Environment 2019.1 Tutorials

Getting Started

Developing Accelerated Applications using the Vitis Core Development Kit

Pathways

1. Programming and Execution Model

In the Vitis™ unified software platform, an application is split into a host program and hardware accelerated kernels, with a communication channel between them for data transfer. The host application, written in C/C++ and using API calls like OpenCL™, runs on an x86 server, or Arm embedded processor; the hardware accelerated kernels run within the Xilinx FPGA on a target platform, such as an Alveo™ Data Center accelerator card.

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2. Setting up the Alveo Data Center Accelerator Cards and Vitis Core Development Kit

Alveo Data Center accelerator cards provide compute acceleration performance and flexibility for Data Centers looking to increase throughput. You can install Alveo Data Center accelerator cards in deployment systems for running accelerated applications, or in development systems, you can develop, debug, and optimize applications running on Alveo Data Center accelerator cards.

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3. Building the Accelerated Application — Essential Concepts

The following labs will introduce you to the essential concepts for building and running an accelerated application using the Vitis core development kit.

In this tutorial, you will learn how to do the following:

  • Build an application's host software and the hardware kernel.
  • Run hardware and software emulation on an application.
  • Learn how to generate application profiling reports to better understand an application's performance.
  • Execute an application on an accelerator card.

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4. Your First Program

After learning the essential concepts, you will work through the steps of creating a simple Vitis core development kit application by building the x86 host program and kernel code (compute device), and use a Makefile to build the design. The Vitis core development kit application consists of a host x86 CPU and hardware kernel running on a Xilinx FPGA on an Xilinx® Alveo™ Data Center accelerator card. The kernel code in this example performs a simple vector addition, C[i]= A[i]+ B[i]. This tutorial also demonstrates the host code structure and required API calls in detail.

In this tutorial, you will learn how to do the following:

  • Create a simple hardware kernel code to run on the accelerator card.
  • Create a simple host program code, including making the required API calls to run the kernel.
  • Build the host program and hardware kernel.
  • Profile and optimize the application design.

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5. Optimizing Accelerated FPGA Applications — Based on Vitis Environment Methodology

The methodology for developing optimized accelerated applications is comprised of two major phases: architecting the application, and developing the hardware kernels. In the first phase, you make key decisions about the application architecture by determining which software functions should be accelerated onto FPGA kernels, how much parallelism can be achieved, and how to deliver it in code. In the second phase, you implement the kernels by structuring the source code, and applying the necessary compiler options and pragmas to create the kernel architecture needed to achieve the optimized performance target.

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