v4l: xilinx: Driver support for Xilinx DP Rx subsystem

This patch adds the V4L2 driver for Xilinx DisplayPort receiver subsystem.

The DisplayPort subsystem is a full feature, hierarchically packaged
subsystem with a DisplayPort sink(RX). It can capture video data
in different formats at different resolutions.

The maximum number of lanes supported is fixed in IP configuration.
The number of active lanes can be programmed.

The DisplayPort receiver subsystem works in conjunction with the Video PHY
Controller, configured for DisplayPort protocol. The subsystem outputs
multi-pixel video over an AXI4-Stream interface.

This device driver registers the DisplayPort Subsystem as a V4L2
sub-device having 1 pad. AXI4-Stream output of DP RX fed to the video IP.

This driver helps in training DP core, configuring number of active lanes
to set, setting and handling IP core interrupts.

Signed-off-by: Rajesh Gugulothu <gugulothu.rajesh@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Reviewed-by: Vishal Sagar <vishal.sagar@xilinx.com>
State: pending
[michals: Squashed with
v4l: xilinx: dprx: Remove unused variables
v4l: xilinx: dprx: Fix incorrect comparisons
v4l: xilinx: dprx: Fix uninitialized variables
v4l: xilinx: dprx: Fix warnings for NULL_RETURNS
v4l: xilinx: dprx: Fix warnings for UNINIT
v4l: xilinx: Fix compatible string
v4l: xilinx: update the bits per component
v4l: xilinx: Added support for DP audio
v4l: xilinx: dprxss: Remove double which word
v4l: xilinx: dprxss: Add support for versal
v4l: xilinx: dprx: Disable unplug interrupt when RX is disconnected
v4l: xilinx: dprx: Fix typo in macro
v4l: xilinx: dprx: Generate HPD interrupt in unplug handler
v4l: xilinx: dprx: Disable audio when training is lost
v4l: xilinx: dprx: Correct the DTG disable sequence
v4l: xilinx: dprx: Update max linkrate to extended capability registers
v4l: xilinx: dprx: Set default CDR timeout value
v4l: xilinx: dprx: Enable training timeout
v4l: xilinx: dprxss: Add changes to get gt_quad_base as phy handle
v4l: xilinx: dprx: Align kernel-doc description
v4l: xilinx: dprx: Call retimer reset functions
v4l: xilinx: dprx: Reset the retimer dp data path
v4l: xilinx: dprx: Fix TP2 macro
v4l: xilinx: dprx: Implement access laneset and tp2 interrupt handlers
v4l: xilinx: dprx: Implement prbs7 mode enable in retimer
v4l: xilinx: dprx: Implement prbs7 mode enable in video phy
v4l: xilinx: dprx: Enable training related interrupts in unplug handler
v4l: xilinx: dprx: Enable audio interrupts in no video handler
v4l: xilinx: dprx: Enable or disable INTERRUPT_CAUSE_1 interrupts
v4l: xilinx: dprx: Add support for 8k 25fps resolution
v4l: xilinx: dprx: Update video timings information
v5.15 update
]

drivers/media/platform/xilinx/Kconfig

@@ -140,6 +140,15 @@ config VIDEO_XILINX_VTC
 	help
 	  Driver for the Xilinx Video Timing Controller
 
+config VIDEO_XILINX_DPRXSS
+	tristate "Xilinx DP Rx Subsystem"
+	depends on VIDEO_XILINX
+	help
+	  Driver for Xilinx DisplayPort Rx Subsystem. This is a V4L sub-device
+	  based driver for the DisplayPort receiver subsystem IP. It captures
+	  AXI-Stream video data and output to video IPs. Choose this driver
+	  in a platform where the DisplayPort rx subsystem can be instantiated.
+
 config VIDEO_XILINX_SCD
 	tristate "Xilinx Scene Change Detect"
 	depends on VIDEO_XILINX

drivers/media/platform/xilinx/Makefile

@@ -10,6 +10,7 @@ obj-$(CONFIG_VIDEO_XILINX_CFA) += xilinx-cfa.o
 obj-$(CONFIG_VIDEO_XILINX_CRESAMPLE) += xilinx-cresample.o
 obj-$(CONFIG_VIDEO_XILINX_CSI2RXSS) += xilinx-csi2rxss.o
 obj-$(CONFIG_VIDEO_XILINX_DEMOSAIC) += xilinx-demosaic.o
+obj-$(CONFIG_VIDEO_XILINX_DPRXSS) += xilinx-dprxss.o
 obj-$(CONFIG_VIDEO_XILINX_GAMMA) += xilinx-gamma.o
 obj-$(CONFIG_VIDEO_XILINX_HLS) += xilinx-hls.o
 obj-$(CONFIG_VIDEO_XILINX_M2M) += xilinx-m2m.o