drm: xlnx: Update DP subsystem with downstream version

This patch replaces mainline DP subsystem with downstream version Signed-off-by: Jianqiang Chen <jianqiang.chen@xilinx.com> State: pending [michals: Squashed with gpu: drm: xlnx: Fixed DP sound card registration issue drm: xlnx: zynqmp_dpsub: Pass pcm auxdata when populating sound nodes drm: xlnx: zynqmp: Rebase downstream Display port crtc features drm: xlnx: zynqmp_dpsub: Fix plane ordering drm: xlnx: zynqmp_dpsub: Fix graphics layer blending drm: xlnx: zynqmp_dpsub: Add global alpha support drm: xlnx: Update dependencies for ZynqMP DP drm: xlnx: zynqmp_dpsub: Fix pixel clock issue drm: xlnx: zynqmp: Update planes asynchronously in the legacy entry drm: xlnx: zynqmp: Add XV15 and XV20 formats drm: xlnx: Update ZynqMP DP kconfig setting drm: xlnx: zynqmp: fix -Wunused-variable build warning drm: xlnx: zynqmp_dp: update DP encoder/connector driver with downstream version drm: xlnx: zynqmp_dp: fix suspend/resume issue drm: xlnx: zynqmp_dp: Add reset for display port phy drm: xlnx: zynqmp_dp: update aux drm_dev in dp bind drm: xlnx: zynqmp_dp: release reset for DP before accessing DP registers v5.15 update ]
Xilinx · Feb 1, 2022 · 2d2fa5c476daa40a5aac243bd776cab2568c7111 · 2d2fa5c
1 parent 281ace3
commit 2d2fa5c476daa40a5aac243bd776cab2568c7111
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Showing 9 changed files with 3,425 additions and 1,758 deletions.
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
@@ -1801,8 +1801,6 @@ int drm_dp_aux_register(struct drm_dp_aux *aux)
 {
 	int ret;
 
-	WARN_ON_ONCE(!aux->drm_dev);
-
 	if (!aux->ddc.algo)
 		drm_dp_aux_init(aux);
 

diff --git a/drivers/gpu/drm/xlnx/Kconfig b/drivers/gpu/drm/xlnx/Kconfig
@@ -3,13 +3,9 @@ config DRM_ZYNQMP_DPSUB
 	depends on ARCH_ZYNQMP || COMPILE_TEST
 	depends on COMMON_CLK && DRM && OF
 	depends on DMADEVICES
-	depends on PHY_XILINX_ZYNQMP
-	depends on XILINX_ZYNQMP_DPDMA
-	select DMA_ENGINE
-	select DRM_GEM_CMA_HELPER
-	select DRM_KMS_CMA_HELPER
-	select DRM_KMS_HELPER
-	select GENERIC_PHY
+	select XILINX_DMA_ENGINES
+	select PHY_XILINX_ZYNQMP
+	select XILINX_ZYNQMP_DPDMA
 	help
 	  This is a DRM/KMS driver for ZynqMP DisplayPort controller. Choose
 	  this option if you have a Xilinx ZynqMP SoC with DisplayPort