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clocking-wizard: Add versal clocking wizard support
Add versal clocking wizard support

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
State: pending
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Shubhrajyoti Datta authored and Michal Simek committed May 27, 2021
1 parent efa3b1a commit 81494997bdd4943edc98a4d7689dd28db2960307
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@@ -397,6 +397,15 @@ config COMMON_CLK_XLNX_CLKWZRD
help
Support for the Xilinx Clocking Wizard IP core clock generator.

config COMMON_CLK_XLNX_CLKWZRD_V
tristate "Xilinx Versal Clocking Wizard"
depends on COMMON_CLK && OF
help
Support for the Versal Xilinx Clocking Wizard IP core clock generator.
Adds support for Versal clocking wizard 1.0 and compatible.
This driver supports the Xilinx clocking wizard programmable clock
synthesizer. The number of output is configurable in the design.

source "drivers/clk/actions/Kconfig"
source "drivers/clk/analogbits/Kconfig"
source "drivers/clk/baikal-t1/Kconfig"
@@ -72,6 +72,7 @@ obj-$(CONFIG_COMMON_CLK_VC5) += clk-versaclock5.o
obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o
obj-$(CONFIG_COMMON_CLK_XGENE) += clk-xgene.o
obj-$(CONFIG_COMMON_CLK_XLNX_CLKWZRD) += clk-xlnx-clock-wizard.o
obj-$(CONFIG_COMMON_CLK_XLNX_CLKWZRD_V) += clk-xlnx-clock-wizard-v.o

# please keep this section sorted lexicographically by directory path name
obj-y += actions/

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