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phy: zynqmp: Add phy driver for xilinx zynqmp phy core
ZynqMP SoC has a Gigabit Transceiver with four lanes. All the high speed
peripherals such as USB, SATA, PCIE, Display Port and Ethernet SGMII can
rely on any of the four GT lanes for PHY layer. This patch adds driver
for that ZynqMP GT core.

The DisplayPort requires programming of preemphasis / voltage swing
value at runtime. These functions will be called from DisplayPort
driver when required.

The sata misc settings to use scrambler/descrambler and
encoder/decoder functions.

Because of functional issues in Silicon 1.0 (XCZU9EG) which doesn't
do PMOS calibration properly, software needs to implement work around.

As a software sequence of work around, need to programe any lane to a
valid protocol. Currently serdes driver configures lane 0 (ICM_CFG0) to
PCIe for fixing the above said calibration logic issue.

Currently PCIe doesn't use serdes driver, instead it depends on fsbl for
GT lane initialization. Since serdes driver is reintializing ICM_CFG0,
PCIe is facing link down issues once linux boots.

The patch fixes the above said issue by using ICM_CFG1 instead of ICM_CFG0
for fixing the PMOS calibration issue

Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Piyush Mehta <Piyush.Mehta@xilinx.com>
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Link: https://patchwork.kernel.org/cover/10735681/
      https://patchwork.kernel.org/patch/10735683/
State: waiting (phy)
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mnarani authored and Michal Simek committed Apr 16, 2020
1 parent 3814c17 commit 976601b0f932344ea7739ffabf03dbe7429c0f27
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@@ -67,6 +67,15 @@ source "drivers/phy/rockchip/Kconfig"
source "drivers/phy/samsung/Kconfig"
source "drivers/phy/socionext/Kconfig"
source "drivers/phy/st/Kconfig"

config PHY_XILINX_ZYNQMP
tristate "Xilinx ZynqMP PHY driver"
depends on ARCH_ZYNQMP
select GENERIC_PHY
help
Enable this to support ZynqMP High Speed Gigabit Transceiver
that is part of ZynqMP SoC.

source "drivers/phy/tegra/Kconfig"
source "drivers/phy/ti/Kconfig"

@@ -28,3 +28,4 @@ obj-y += broadcom/ \
socionext/ \
st/ \
ti/
obj-$(CONFIG_PHY_XILINX_ZYNQMP) += phy-zynqmp.o

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