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Menu config does not show external DDR3 controller IP #24

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luxapana opened this issue Sep 16, 2022 · 4 comments
Open

Menu config does not show external DDR3 controller IP #24

luxapana opened this issue Sep 16, 2022 · 4 comments

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@luxapana
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I am running petalinux-config with attached XSA file (renamed as a ZIP file to upload). I expected the menuconfig will show the DDR3 controller (named - mig_7series_1_1) would show up as an option for Primary memory in following configuration page:

image

However, I only see the Manual option.
mb_hardware_platform_wrapper.zip

@varalaxmi-bingi
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Hi Manusha,
The IP for ddr3 controller seems to be incorrect. It should mig_7series instead of mig_7series_1 and instance can be different. Please change and try you will them populated in the menuconfig.

Regards,
Varalaxmi

@luxapana
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Hi Varalaxmi

I have used mig_7 series. Please see the screenshot below. Highlighted one is the one I used.

image

After generating the controller, I wrapped it as a custom IP and used in my BD. Thats why the name is shown as mig_7series_1.

Thanks
Manusha

@varalaxmi-bingi
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Hi Manusha,
your showing the ip catalogue know I am taking about the below

xsct% hsi open_hw_design /proj/xhdsswstaff/varalaxm/dtg/mb_hardware_platform_wrapper.xsa
INFO: [Hsi 55-2053] elapsed time for repository (/proj/xbuilds/SWIP/2022.1_0420_0327/installs/lin64/Vitis/2022.1/data/embeddedsw) loading 2 seconds
mb_hardware_platform_wrapper
xsct% hsi get_cells -hier
axi_bram_ctrl_0 axi_bram_ctrl_0_bram axi_quad_spi_0 axi_timer_0 axi_uart16550_0 clk_wiz_1 mdm_1 microblaze_0 microblaze_0_axi_intc microblaze_0_axi_periph microblaze_0_local_memory_dlmb_bram_if_cntlr microblaze_0_local_memory_dlmb_v10 microblaze_0_local_memory_ilmb_bram_if_cntlr microblaze_0_local_memory_ilmb_v10 microblaze_0_local_memory_lmb_bram microblaze_0_xlconcat mig_7series_1_1 rst_clk_wiz_1_100M
xsct% hsi report_property mig_7series_1_1
ERROR: [Common 17-58] 'mig_7series_1_1' is not a valid first class Tcl object.

xsct% hsi report_property [hsi get_cells -hier mig_7series_1_1]
Property Type Read-only Value
ADDRESS_TAG string true
BD_TYPE string true
CLASS string true cell
CONFIG.C_BASEADDR string true 0x00000000
CONFIG.C_HIGHADDR string true 0x3FFFFFFF
CONFIG.Component_Name string true mb_hardware_platform_mig_7series_1_1_0
CONFIG.EDK_IPTYPE string true PERIPHERAL
CONFIGURABLE bool true 0
CORE_REVISION string true 11
DRIVER_MODE string true
HIER_NAME string true
IP_NAME string true mig_7series_1
IP_TYPE enum true PERIPHERAL
ISPDEFINST bool true 0
IS_HIERARCHICAL bool true 0
IS_PL bool true 1
MULTISOCKETSMP string true
NAME string true mig_7series_1_1
PRODUCT_GUIDE string true
SLAVES string* true
SLR_NUMBER int true -1
VLNV string true xilinx.com:user:mig_7series_1:1.0
xsct%

The highlighted IP_NAME property for mig ip should be mig_7series. you can check our ac701 BSP for reference there we are using MIG IP.

@luxapana
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Thanks, I think understand what you are saying.
When packaging the generated core, I need to give the name 'mig_7series' as below:

image

I will try this out today and thanks for the help.

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