From 85986ee97d86f40c551b4dd6d8ec87c2b2ab5757 Mon Sep 17 00:00:00 2001 From: ZipCPU Date: Sat, 30 Nov 2019 09:33:13 -0500 Subject: [PATCH] Missed a reg v wire in hwbfly, on longmpy --- sw/butterfly.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sw/butterfly.cpp b/sw/butterfly.cpp index 3149f98..047c400 100644 --- a/sw/butterfly.cpp +++ b/sw/butterfly.cpp @@ -1549,7 +1549,7 @@ SLASHLINE "\t\treg ce_phase;\n" "\n" "\t\treg signed [(CWIDTH+IWIDTH+1)-1:0] mpy_pipe_out;\n" - "\t\twire signed [IWIDTH+CWIDTH+3-1:0] longmpy;\n" + "\t\treg signed [IWIDTH+CWIDTH+3-1:0] longmpy;\n" "\n" "\n" "\t\tinitial ce_phase = 1'b1;\n"