diff --git a/com.oracle.max.vm.ext.t1x/src/com/oracle/max/vm/ext/t1x/riscv64/RISCV64T1XCompilation.java b/com.oracle.max.vm.ext.t1x/src/com/oracle/max/vm/ext/t1x/riscv64/RISCV64T1XCompilation.java index 0facc7cbb2..7f9e84e0e3 100644 --- a/com.oracle.max.vm.ext.t1x/src/com/oracle/max/vm/ext/t1x/riscv64/RISCV64T1XCompilation.java +++ b/com.oracle.max.vm.ext.t1x/src/com/oracle/max/vm/ext/t1x/riscv64/RISCV64T1XCompilation.java @@ -413,6 +413,7 @@ protected void emitUnprotectMethod() { objectLiterals.add(T1XTargetMethod.PROTECTED); int dispPos = buf.position(); asm.auipc(scratch, 0); // this gets patched by fixup + asm.addi(scratch, scratch, 0); asm.nop(RISCV64MacroAssembler.PLACEHOLDER_INSTRUCTIONS_FOR_LONG_OFFSETS); asm.str(64, RISCV64.zr, RISCV64Address.createBaseRegisterOnlyAddress(scratch)); patchInfo.addObjectLiteral(dispPos, protectionLiteralIndex); @@ -848,13 +849,11 @@ protected void fixup() { asm.addi(scratch, scratch, (int) offset); asm.nop(RISCV64MacroAssembler.PLACEHOLDER_INSTRUCTIONS_FOR_LONG_OFFSETS); } else { - FatalError.unimplemented(); -// asm.adr(scratch, 0); -// int startPos = buf.position(); -// asm.mov64BitConstant(scratch2, offset); -// asm.add(64, scratch, scratch, scratch2); -// int endPos = buf.position(); -// assert endPos - startPos <= RISCV64MacroAssembler.PLACEHOLDER_INSTRUCTIONS_FOR_LONG_OFFSETS * RISCV64MacroAssembler.INSTRUCTION_SIZE : endPos - startPos; + int startPos = buf.position(); + asm.mov64BitConstant(scratch2, offset); + asm.add(64, scratch, scratch, scratch2); + int endPos = buf.position(); + assert endPos - startPos <= RISCV64MacroAssembler.PLACEHOLDER_INSTRUCTIONS_FOR_LONG_OFFSETS * RISCV64MacroAssembler.INSTRUCTION_SIZE : endPos - startPos; } } else { throw new InternalError("Unknown PatchInfoRISCV64." + tag); diff --git a/com.oracle.max.vm.native/hosted/platform.c b/com.oracle.max.vm.native/hosted/platform.c index a6b92e7275..de3410bb39 100644 --- a/com.oracle.max.vm.native/hosted/platform.c +++ b/com.oracle.max.vm.native/hosted/platform.c @@ -95,6 +95,8 @@ Java_com_sun_max_platform_Platform_nativeGetISA(JNIEnv *env, jclass c) return (*env)->NewStringUTF(env, "ARM"); #elif isa_AARCH64 return (*env)->NewStringUTF(env, "Aarch64"); +#elif isa_RISCV64 + return (*env)->NewStringUTF(env, "Riscv64"); #else # error #endif diff --git a/com.oracle.max.vm.native/platform/isa.h b/com.oracle.max.vm.native/platform/isa.h index f902c38225..79b5f0636e 100644 --- a/com.oracle.max.vm.native/platform/isa.h +++ b/com.oracle.max.vm.native/platform/isa.h @@ -31,6 +31,7 @@ #define isa_POWER 0 #define isa_ARM 0 #define isa_AARCH64 0 +#define isa_RISCV64 0 #if defined(__sparc) || defined(sparc) # undef isa_SPARC @@ -132,6 +133,22 @@ typedef aarch64_OsTeleStateRegisters isa_OsTeleStateRegisters; typedef struct aarch64_CanonicalStateRegisters isa_CanonicalStateRegistersStruct; typedef aarch64_CanonicalStateRegisters isa_CanonicalStateRegisters; +#elif defined (__riscv64__) || defined (RISCV64) || defined(riscv64) +#undef isa_RISCV64 +#define isa_RISCV64 1 +#define isa_IDENTIFIER RISCV64 +#include "riscv64.h" + typedef riscv64_OsTeleIntegerRegisters isa_OsTeleIntegerRegisters; + typedef struct riscv64_CanonicalIntegerRegisters isa_CanonicalIntegerRegistersStruct; + typedef riscv64_CanonicalIntegerRegisters isa_CanonicalIntegerRegisters; + + typedef riscv64_OsTeleFloatingPointRegisters isa_OsTeleFloatingPointRegisters; + typedef struct riscv64_CanonicalFloatingPointRegisters isa_CanonicalFloatingPointRegistersStruct; + typedef riscv64_CanonicalFloatingPointRegisters isa_CanonicalFloatingPointRegisters; + + typedef riscv64_OsTeleStateRegisters isa_OsTeleStateRegisters; + typedef struct riscv64_CanonicalStateRegisters isa_CanonicalStateRegistersStruct; + typedef riscv64_CanonicalStateRegisters isa_CanonicalStateRegisters; #else # error #endif diff --git a/com.oracle.max.vm.native/platform/platform.mk b/com.oracle.max.vm.native/platform/platform.mk index 4ff02c1a46..c5057d61e5 100644 --- a/com.oracle.max.vm.native/platform/platform.mk +++ b/com.oracle.max.vm.native/platform/platform.mk @@ -64,7 +64,10 @@ ifeq ($(TARGETOS),Darwin) TARGETISA ?= $(shell uname -p) endif # Darwin ifeq ($(TARGETOS),Linux) - TARGETISA ?= $(shell uname -m) + # AAA + # TARGETISA ?= $(shell uname -m) + # TARGETISA := aarch64 + TARGETISA := riscv64 endif # Linux ifeq ($(TARGETOS),SunOS) TARGETISA := $(shell isainfo -n) @@ -107,6 +110,10 @@ ifeq ($(TARGETOS),Linux) ifeq ($(TARGETISA), aarch64) ISA := aarch64 endif + # AAA + ifeq ($(TARGETISA), riscv64) + ISA := riscv64 + endif ifeq ($(TARGETISA), armv7l) ISA := arm OTHER_CFLAGS := -marm -O0 -g -mcpu=cortex-a9 @@ -233,10 +240,13 @@ ifeq ($(OS),darwin) endif ifeq ($(OS),linux) - ifneq "$(findstring def, $(origin CC))" "" - # origin of CC is either undefined or default, so set it here - CC = gcc - endif + # AAA + # ifneq "$(findstring def, $(origin CC))" "" + # # origin of CC is either undefined or default, so set it here + # CC = gcc + # endif + # CC = aarch64-linux-gnu-gcc + CC = riscv64-linux-gnu-gcc ifneq "$(findstring def, $(origin CFLAGS))" "" # origin of CFLAGS is either undefined or default, so set it here CFLAGS = -g -Wall -Wno-long-long -Werror -Wextra -Wno-main -Wno-unused-parameter -fPIC -D_GNU_SOURCE -D$(ISA) -DLINUX -D$(TARGET) -D$(TARGET_WORD_SIZE) $(JDK) $(OTHER_CFLAGS) diff --git a/com.oracle.max.vm.native/platform/riscv64.c b/com.oracle.max.vm.native/platform/riscv64.c new file mode 100644 index 0000000000..81d3115091 --- /dev/null +++ b/com.oracle.max.vm.native/platform/riscv64.c @@ -0,0 +1,126 @@ +/* + * Copyright (c) 2017-2018, APT Group, School of Computer Science, + * The University of Manchester. All rights reserved. + * Copyright (c) 2007, 2011, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + */ +#include "isa.h" +#include "log.h" + +void isa_canonicalizeTeleIntegerRegisters(isa_OsTeleIntegerRegisters os, isa_CanonicalIntegerRegisters c) { + +#if os_LINUX +#define CANONICALIZE(reg) c->x##reg = (Word) os->regs[reg] +#else +#define CANONICALIZE(reg, ucReg) c_UNIMPLEMENTED() +#endif + + // CANONICALIZE(0); + CANONICALIZE(1); + // CANONICALIZE(2); this is SP + CANONICALIZE(3); + CANONICALIZE(4); + CANONICALIZE(5); + CANONICALIZE(6); + CANONICALIZE(7); + CANONICALIZE(8); + CANONICALIZE(9); + CANONICALIZE(10); + CANONICALIZE(11); + CANONICALIZE(12); + CANONICALIZE(13); + CANONICALIZE(14); + CANONICALIZE(15); + CANONICALIZE(16); + CANONICALIZE(17); + CANONICALIZE(18); + CANONICALIZE(19); + CANONICALIZE(20); + CANONICALIZE(21); + CANONICALIZE(22); + CANONICALIZE(23); + CANONICALIZE(24); + CANONICALIZE(25); + CANONICALIZE(26); + CANONICALIZE(27); + CANONICALIZE(28); + CANONICALIZE(29); + CANONICALIZE(30); + CANONICALIZE(31); + +#undef CANONICALIZE +} + +void isa_canonicalizeTeleFloatingPointRegisters(isa_OsTeleFloatingPointRegisters os, isa_CanonicalFloatingPointRegisters c) { + log_println("Riscv64: isa_canonicalizeTeleFloatingPointRegisters is not implemented!"); +} + +void isa_canonicalizeTeleStateRegisters(isa_OsTeleStateRegisters os, isa_CanonicalStateRegisters c) { + c->sp = (Word) os->regs[2]; + c->pc = (Word) os->pc; + // TODO ask about this. Not sure what it is. + // c->pstate = (Word) os->pstate; +} + +void isa_printCanonicalIntegerRegisters(isa_CanonicalIntegerRegisters c) { +#define PRINT_REG(reg) log_println(#reg " = %p [%ld]", c->reg, c->reg) + + // PRINT_REG(r0); + PRINT_REG(x1); + // PRINT_REG(x2); // This is SP + PRINT_REG(x3); + PRINT_REG(x4); + PRINT_REG(x5); + PRINT_REG(x6); + PRINT_REG(x7); + PRINT_REG(x8); + PRINT_REG(x9); + PRINT_REG(x10); + PRINT_REG(x11); + PRINT_REG(x12); + PRINT_REG(x13); + PRINT_REG(x14); + PRINT_REG(x15); + PRINT_REG(x16); + PRINT_REG(x17); + PRINT_REG(x18); + PRINT_REG(x19); + PRINT_REG(x20); + PRINT_REG(x21); + PRINT_REG(x22); + PRINT_REG(x23); + PRINT_REG(x24); + PRINT_REG(x25); + PRINT_REG(x26); + PRINT_REG(x27); + PRINT_REG(x28); + PRINT_REG(x29); + PRINT_REG(x30); + PRINT_REG(x31); + +#undef PRINT_REG +} + +void isa_printCanonicalFloatingPointRegisters(isa_CanonicalFloatingPointRegisters c) { + log_println("Riscv64: isa_printCanonicalFloatingPointRegisters is not implemented!"); +} + +void isa_printCanonicalStateRegisters(isa_CanonicalStateRegisters canonicalStateRegisters) { + log_println("sp = %p [%ld]", canonicalStateRegisters->sp, canonicalStateRegisters->sp); + log_println("pc = %p [%ld]", canonicalStateRegisters->pc, canonicalStateRegisters->pc); + // log_println("pstate = %p [%ld]", canonicalStateRegisters->pstate, canonicalStateRegisters->pstate); +} diff --git a/com.oracle.max.vm.native/platform/riscv64.h b/com.oracle.max.vm.native/platform/riscv64.h new file mode 100644 index 0000000000..07a716e4e8 --- /dev/null +++ b/com.oracle.max.vm.native/platform/riscv64.h @@ -0,0 +1,129 @@ +/* + * Copyright (c) 2017-2018, APT Group, School of Computer Science, + * The University of Manchester. All rights reserved. + * Copyright (c) 2007, 2011, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + */ +#ifndef __riscv64_h__ +#define __riscv64_h__ 1 + +#include "word.h" + +#if os_LINUX +# include +# include +// For some reason sys/user.h for RISC-V lacks definitions of user_regs_struct and user_fpsimd_struct. We have to manually define those in our own userriscv64.h +# include "userriscv64.h" +typedef struct user_regs_struct *riscv64_OsTeleIntegerRegisters; +typedef struct user_fpsimd_struct *riscv64_OsTeleFloatingPointRegisters; +typedef struct user_regs_struct *riscv64_OsTeleStateRegisters; +typedef struct { + Word low; + Word high; +}XMMRegister; +#else +# error +#endif +typedef struct riscv64_CanonicalIntegerRegisters { + Word x1; + Word x2; + Word x3; + Word x4; + Word x5; + Word x6; + Word x7; + Word x8; + Word x9; + Word x10; + Word x11; + Word x12; + Word x13; + Word x14; + Word x15; + Word x16; + Word x17; + Word x18; + Word x19; + Word x20; + Word x21; + Word x22; + Word x23; + Word x24; + Word x25; + Word x26; + Word x27; + Word x28; + Word x29; + Word x30; + Word x31; +} riscv64_CanonicalIntegerRegistersAggregate, *riscv64_CanonicalIntegerRegisters; +typedef struct riscv64_CanonicalFloatingPointRegisters { + Word f0; + Word f1; + Word f2; + Word f3; + Word f4; + Word f5; + Word f6; + Word f7; + Word f8; + Word f9; + Word f10; + Word f11; + Word f12; + Word f13; + Word f14; + Word f15; + Word f16; + Word f17; + Word f18; + Word f19; + Word f20; + Word f21; + Word f22; + Word f23; + Word f24; + Word f25; + Word f26; + Word f27; + Word f28; + Word f29; + Word f30; + Word f31; +} riscv64_CanonicalFloatingRegistersAggregate, *riscv64_CanonicalFloatingPointRegisters; + +typedef struct riscv64_CanonicalStateRegisters { + Word sp; + union { + Word pc; + Word rip; + }; + // Word pstate; +} riscv64_CanonicalStateRegistersAggregate, *riscv64_CanonicalStateRegisters; + +extern void riscv64_canonicalizeTeleIntegerRegisters(riscv64_OsTeleIntegerRegisters, riscv64_CanonicalIntegerRegisters); + +extern void riscv64_canonicalizeTeleFloatingPointRegisters(riscv64_OsTeleFloatingPointRegisters, riscv64_CanonicalFloatingPointRegisters); + +extern void riscv64_canonicalizeTeleStateRegisters(riscv64_OsTeleStateRegisters osTeleStateRegisters, riscv64_CanonicalStateRegisters canonicalStateRegisters); + +extern void riscv64_printCanonicalIntegerRegisters(riscv64_CanonicalIntegerRegisters canonicalIntegerRegisters); + +extern void riscv64_printCanonicalFloatingPointRegisters(riscv64_CanonicalFloatingPointRegisters canonicalFloatingPointRegisters); + +extern void riscv64_printCanonicalStateRegisters(riscv64_CanonicalStateRegisters canonicalStateRegisters); +#endif /*__riscv64__*/ diff --git a/com.oracle.max.vm.native/platform/userriscv64.h b/com.oracle.max.vm.native/platform/userriscv64.h new file mode 100644 index 0000000000..23e7b712cd --- /dev/null +++ b/com.oracle.max.vm.native/platform/userriscv64.h @@ -0,0 +1,33 @@ +// TODO: check this is actually working. +// This file has been adapted from https://github.com/riscv/riscv-glibc/blob/riscv-glibc-2.26/sysdeps/unix/sysv/linux/aarch64/sys/user.h + +#define STRINGIFY(s) XSTRINGIFY(s) +#define XSTRINGIFY(s) #s + +// #pragma message ("_SYS_USER_H=" STRINGIFY(_SYS_USER_H)) + +#ifndef _SYS_USER_H +#define _SYS_USER_H 1 +#endif + +#ifndef CREATED_REG_DESCRIPTION +#define CREATED_REG_DESCRIPTION 1 + +// #pragma message ("INSIDEEEEEE") + +struct user_regs_struct +{ + unsigned long long regs[31]; + // unsigned long long sp; + unsigned long long pc; + // unsigned long long pstate; +}; + +struct user_fpsimd_struct +{ + __uint128_t vregs[32]; + // unsigned int fpsr; + // unsigned int fpcr; +}; + +#endif \ No newline at end of file diff --git a/com.oracle.max.vm.native/platform/word.h b/com.oracle.max.vm.native/platform/word.h index b0c644fa0d..ed066cb21b 100644 --- a/com.oracle.max.vm.native/platform/word.h +++ b/com.oracle.max.vm.native/platform/word.h @@ -26,7 +26,7 @@ #undef word_LITTLE_ENDIAN #undef word_BIG_ENDIAN -#if defined(__x86) || defined(__x86_64) || defined(_X86_) || defined(i386) || defined (arm) || defined(__aarch64__) +#if defined(__x86) || defined(__x86_64) || defined(_X86_) || defined(i386) || defined (arm) || defined(__aarch64__) || defined(riscv64) # define word_LITTLE_ENDIAN 1 # define word_BIG_ENDIAN 0 # define MATH_HI(x) *(1+(int*)&x) diff --git a/com.oracle.max.vm.native/substrate/trap.c b/com.oracle.max.vm.native/substrate/trap.c index de2f692f23..ef03d8fb09 100644 --- a/com.oracle.max.vm.native/substrate/trap.c +++ b/com.oracle.max.vm.native/substrate/trap.c @@ -172,6 +172,8 @@ static Address getInstructionPointer(UContext *ucontext) { return ucontext->uc_mcontext.arm_pc; # elif isa_AARCH64 return ucontext->uc_mcontext.pc; +# elif isa_RISCV64 + return ucontext->uc_mcontext.__gregs[0]; // gregs[0] holds the program counter. Please see https://github.com/riscv/riscv-glibc/blob/riscv-glibc-2.26/sysdeps/unix/sysv/linux/riscv/bits/sigcontext.h # endif #elif os_DARWIN return ucontext->uc_mcontext->__ss.__rip; @@ -199,6 +201,8 @@ static void setInstructionPointer(UContext *ucontext, Address stub) { ucontext->uc_mcontext.arm_pc = (greg_t) (stub); # elif isa_AARCH64 ucontext->uc_mcontext.pc = (greg_t) stub; +# elif isa_RISCV64 + ucontext->uc_mcontext.__gregs[0] = (greg_t) stub; # endif #elif os_MAXVE ucontext->rip = (unsigned long) stub; @@ -454,6 +458,9 @@ static void vmSignalHandler(int signal, SigInfo *signalInfo, UContext *ucontext) #elif isa_AARCH64 tla_store3(dtla, TRAP_LATCH_REGISTER, ucontext->uc_mcontext.regs[26]); ucontext->uc_mcontext.regs[26] = (Address) dtla; +#elif isa_RISCV64 + tla_store3(dtla, TRAP_LATCH_REGISTER, ucontext->uc_mcontext.__gregs[30]); + ucontext->uc_mcontext.__gregs[30] = (Address) dtla; #else c_UNIMPLEMENTED(); #endif diff --git a/com.oracle.max.vm.native/tele/linux/linuxTask.c b/com.oracle.max.vm.native/tele/linux/linuxTask.c index d5a08b816e..9a92e91581 100644 --- a/com.oracle.max.vm.native/tele/linux/linuxTask.c +++ b/com.oracle.max.vm.native/tele/linux/linuxTask.c @@ -46,6 +46,9 @@ typedef struct user_regs user_regs_structure; #elif defined __aarch64__ typedef struct user_fpsimd_struct user_fpregs_structure; typedef struct user_regs_struct user_regs_structure; +#elif defined(__riscv64__) || defined(riscv64) || defined(RISCV64) +typedef struct user_fpsimd_struct user_fpregs_structure; +typedef struct user_regs_struct user_regs_structure; #else typedef struct user_fpregs_struct user_fpregs_structure; typedef struct user_regs_struct user_regs_structure; @@ -932,6 +935,8 @@ Java_com_sun_max_tele_debug_linux_LinuxTask_nativeSetInstructionPointer(JNIEnv * registers.uregs[13] = instructionPointer; #elif defined __aarch64__ registers.pc = instructionPointer; +#elif defined(__riscv64__) || defined(riscv64) || defined(RISCV64) + registers.pc = instructionPointer; #else registers.rip = instructionPointer; #endif @@ -1023,8 +1028,16 @@ Java_com_sun_max_tele_debug_linux_LinuxDumpThreadAccess_taskRegisters(JNIEnv *en jbyteArray stateRegisters, jint stateRegistersLength) { prstatus_t * prstatus = (prstatus_t *) ((*env)->GetDirectBufferAddress(env, bytebuffer_status)); elf_fpregset_t *fpregset = (elf_fpregset_t *) ((*env)->GetDirectBufferAddress(env, bytebuffer_fpreg)); - return copyRegisters(env, class, (user_regs_structure *) &prstatus->pr_reg[0], fpregset, + // user_fpregs_structure + //TODO check this actually works + return copyRegisters(env, class, (user_regs_structure *) &prstatus->pr_reg[0], (user_fpregs_structure *) &fpregset, integerRegisters, integerRegistersLength, floatingPointRegisters, floatingPointRegistersLength, stateRegisters, stateRegistersLength); + + + // return copyRegisters(env, class, (user_regs_structure *) &prstatus->pr_reg[0], fpregset, + // integerRegisters, integerRegistersLength, + // floatingPointRegisters, floatingPointRegistersLength, + // stateRegisters, stateRegistersLength); } diff --git a/com.oracle.max.vm.native/tele/linux/linuxTeleProcess.c b/com.oracle.max.vm.native/tele/linux/linuxTeleProcess.c index f45df9a920..877457de88 100644 --- a/com.oracle.max.vm.native/tele/linux/linuxTeleProcess.c +++ b/com.oracle.max.vm.native/tele/linux/linuxTeleProcess.c @@ -65,6 +65,8 @@ boolean task_read_registers(pid_t tid, struct user_fpregs osFloatRegisters; #elif defined __aarch64__ struct user_fpsimd_struct osFloatRegisters; +#elif defined(__riscv64__) || defined(riscv64) || defined(RISCV64) + struct user_fpsimd_struct osFloatRegisters; #else struct user_fpregs_struct osFloatRegisters; #endif @@ -107,6 +109,8 @@ static void gatherThread(JNIEnv *env, pid_t tgid, pid_t tid, jobject linuxTelePr Address stackPointer = (Address) canonicalIntegerRegisters.r13; #elif defined __aarch64__ Address stackPointer = (Address) canonicalStateRegisters.sp; +#elif defined(__riscv64__) || defined(riscv64) || defined(RISCV64) + Address stackPointer = (Address) canonicalStateRegisters.sp; #else Address stackPointer = (Address) canonicalIntegerRegisters.rsp; #endif diff --git a/com.sun.max/src/com/sun/max/platform/Platform.java b/com.sun.max/src/com/sun/max/platform/Platform.java index d4b5e6068a..6b948ed053 100644 --- a/com.sun.max/src/com/sun/max/platform/Platform.java +++ b/com.sun.max/src/com/sun/max/platform/Platform.java @@ -207,7 +207,7 @@ private CiTarget createTarget() { inlineObjects, false, false, - hasIDiv()); + true); } private static final Pattern NON_REGEX_TEST_PATTERN = Pattern.compile("\\w+"); @@ -447,8 +447,9 @@ private static String getOS() { */ @HOSTED_ONLY private static int getPageSize() { - Prototype.loadHostedLibrary(); - return nativeGetPageSize(); + return 4096; +// Prototype.loadHostedLibrary(); +// return nativeGetPageSize(); } private static native int nativeGetPageSize(); @@ -556,9 +557,9 @@ private static Platform createDefaultPlatform0() { map.put("maxve-amd64", new Platform(CPU.AMD64, OS.MAXVE, Ints.K * 8, 32)); map.put("linux-arm", new Platform(CPU.ARMV7, OS.LINUX, Ints.K * 4, 32)); map.put("darwin-arm", new Platform(CPU.ARMV7, OS.DARWIN, Ints.K * 4, 32)); - map.put("linux-aarch64", new Platform(CPU.Aarch64, OS.LINUX, Ints.K * 8, 32)); + map.put("linux-aarch64", new Platform(CPU.Aarch64, OS.LINUX, Ints.K * 4, 32)); map.put("linux-riscv32", new Platform(CPU.RISCV32, OS.LINUX, Ints.K * 4, 32)); - map.put("linux-riscv64", new Platform(CPU.RISCV64, OS.LINUX, Ints.K * 8, 32)); + map.put("linux-riscv64", new Platform(CPU.RISCV64, OS.LINUX, Ints.K * 4, 32)); Supported = Collections.unmodifiableMap(map); Default = map.get("linux-amd64"); }