diff --git a/Firmware/Makefile b/Firmware/Makefile new file mode 100644 index 0000000..53495c5 --- /dev/null +++ b/Firmware/Makefile @@ -0,0 +1,362 @@ +# MCU name +MCU = attiny4 +F_CPU = 8000000 + +# Output format. (can be srec, ihex, binary) +FORMAT = ihex + +# Target file name (without extension). +TARGET = cuff + +# Optimization level, can be [0, 1, 2, 3, s]. 0 turns off optimization. +# (Note: 3 is not always the best optimization level. See avr-libc FAQ.) +OPT = s + +# List C source files here. (C dependencies are automatically generated.) +SRC = cuff.c + +# List Assembler source files here. +# Make them always end in a capital .S. Files ending in a lowercase .s +# will not be considered source files but generated files (assembler +# output from the compiler), and will be deleted upon "make clean"! +# Even though the DOS/Win filesystem matches both .s and .S the same, +# it will preserve the spelling of the filenames, and gcc itself does +# care about how the name is spelled on its command-line. +# Optional compiler flags. +# -g: generate debugging information (for GDB, or for COFF conversion) +# -O*: optimization level +# -f...: tuning, see gcc manual and avr-libc documentation +# -Wall...: warning level +# -Wa,...: tell GCC to pass this to the assembler. +# -ahlms: create assembler listing +CFLAGS = -g -O$(OPT) \ +-funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums \ +-Wall -Wstrict-prototypes \ +-DF_CPU=$(F_CPU) \ +-Wa,-adhlns=$(<:.c=.lst) \ +$(patsubst %,-I%,$(EXTRAINCDIRS)) + + +# Set a "language standard" compiler flag. +# Unremark just one line below to set the language standard to use. +# gnu99 = C99 + GNU extensions. See GCC manual for more information. +#CFLAGS += -std=c89 +#CFLAGS += -std=gnu89 +#CFLAGS += -std=c99 +CFLAGS += -std=gnu99 + + + +# Optional assembler flags. +# -Wa,...: tell GCC to pass this to the assembler. +# -ahlms: create listing +# -gstabs: have the assembler create line number information; note that +# for use in COFF files, additional information about filenames +# and function names needs to be present in the assembler source +# files -- see avr-libc docs [FIXME: not yet described there] +ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs + + + +# Optional linker flags. +# -Wl,...: tell GCC to pass this to linker. +# -Map: create map file +# --cref: add cross reference to map file +LDFLAGS = -Wl,-Map=$(TARGET).map,--cref + + + +# Additional libraries + +# Minimalistic printf version +#LDFLAGS += -Wl,-u,vfprintf -lprintf_min + +# Floating point printf version (requires -lm below) +#LDFLAGS += -Wl,-u,vfprintf -lprintf_flt + +# -lm = math library +LDFLAGS += -lm + + + +# Programming support using avrdude. Settings and variables. + +# Programming hardware: alf avr910 avrisp bascom bsd +# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500 +# +# Type: avrdude -c ? +# to get a full listing. +# +# + +AVRDUDE_PROGRAMMER = avrisp2 + +AVRDUDE_PORT = usb # programmer connected to serial device + +AVRDUDE_WRITE_FLASH = -B 1 -U flash:w:$(TARGET).hex +AVRDUDE_VERIFY_FLASH = -B 1 -U flash:v:$(TARGET).hex +#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep + +AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER) + +# Uncomment the following if you want avrdude's erase cycle counter. +# Note that this counter needs to be initialized first using -Yn, +# see avrdude manual. +#AVRDUDE_ERASE += -y + +# Uncomment the following if you do /not/ wish a verification to be +# performed after programming the device. +#AVRDUDE_FLAGS += -V + +# Increase verbosity level. Please use this when submitting bug +# reports about avrdude. See +# to submit bug reports. +#AVRDUDE_FLAGS += -v -v + + + + +# --------------------------------------------------------------------------- + +# Define directories, if needed. +DIRAVR = c:/winavr +DIRAVRBIN = $(DIRAVR)/bin +DIRAVRUTILS = $(DIRAVR)/utils/bin +DIRINC = . +DIRLIB = $(DIRAVR)/avr/lib + + +# Define programs and commands. +SHELL = sh + +CC = avr-gcc + +OBJCOPY = avr-objcopy +OBJDUMP = avr-objdump +SIZE = avr-size + + +# Programming support using avrdude. +AVRDUDE = avrdude + + +REMOVE = rm -f +COPY = cp + +HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex +ELFSIZE = $(SIZE) -A $(TARGET).elf + + + +# Define Messages +# English +MSG_ERRORS_NONE = Errors: none +MSG_BEGIN = -------- begin -------- +MSG_END = -------- end -------- +MSG_SIZE_BEFORE = Size before: +MSG_SIZE_AFTER = Size after: +MSG_COFF = Converting to AVR COFF: +MSG_EXTENDED_COFF = Converting to AVR Extended COFF: +MSG_FLASH = Creating load file for Flash: +MSG_EEPROM = Creating load file for EEPROM: +MSG_EXTENDED_LISTING = Creating Extended Listing: +MSG_SYMBOL_TABLE = Creating Symbol Table: +MSG_LINKING = Linking: +MSG_COMPILING = Compiling: +MSG_ASSEMBLING = Assembling: +MSG_CLEANING = Cleaning project: + + + + +# Define all object files. +OBJ = $(SRC:.c=.o) $(ASRC:.S=.o) + +# Define all listing files. +LST = $(ASRC:.S=.lst) $(SRC:.c=.lst) + +# Combine all necessary flags and optional flags. +# Add target processor to flags. +ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) +ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS) + + + +# Default target. +all: begin gccversion sizebefore $(TARGET).elf $(TARGET).hex $(TARGET).eep \ + $(TARGET).lss $(TARGET).sym sizeafter finished end + + +# Eye candy. +# AVR Studio 3.x does not check make's exit code but relies on +# the following magic strings to be generated by the compile job. +begin: + @echo + @echo $(MSG_BEGIN) + +finished: + @echo $(MSG_ERRORS_NONE) + +end: + @echo $(MSG_END) + @echo + + +# Display size of file. +sizebefore: + @if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi + +sizeafter: + @if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi + + + +# Display compiler version information. +gccversion : + @$(CC) --version + + + + +# Convert ELF to COFF for use in debugging / simulating in +# AVR Studio or VMLAB. +COFFCONVERT=$(OBJCOPY) --debugging \ + --change-section-address .data-0x800000 \ + --change-section-address .bss-0x800000 \ + --change-section-address .noinit-0x800000 \ + --change-section-address .eeprom-0x810000 + + +coff: $(TARGET).elf + @echo + @echo $(MSG_COFF) $(TARGET).cof + $(COFFCONVERT) -O coff-avr $< $(TARGET).cof + + +extcoff: $(TARGET).elf + @echo + @echo $(MSG_EXTENDED_COFF) $(TARGET).cof + $(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof + + + +reset: + $(AVRDUDE) $(AVRDUDE_FLAGS) + +# Program the device. +program: + $(AVRDUDE) $(AVRDUDE_FLAGS) -U flash:w:cuff.hex + +verify: $(TARGET).hex $(TARGET).eep + $(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_VERIFY_FLASH) + +full: $(TARGET).hex + make program + +read-fuse: + $(AVRDUDE) $(AVRDUDE_FLAGS) -u -U lfuse:r:l.txt:r + $(AVRDUDE) $(AVRDUDE_FLAGS) -u -U hfuse:r:h.txt:r + $(AVRDUDE) $(AVRDUDE_FLAGS) -u -U efuse:r:e.txt:r +# Create final output files (.hex, .eep) from ELF output file. +%.hex: %.elf + @echo + @echo $(MSG_FLASH) $@ + $(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@ + +%.eep: %.elf + @echo + @echo $(MSG_EEPROM) $@ + -$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \ + --change-section-lma .eeprom=0 -O $(FORMAT) $< $@ + +# Create extended listing file from ELF output file. +%.lss: %.elf + @echo + @echo $(MSG_EXTENDED_LISTING) $@ + $(OBJDUMP) -h -S $< > $@ + +# Create a symbol table from ELF output file. +%.sym: %.elf + @echo + @echo $(MSG_SYMBOL_TABLE) $@ + avr-nm -n $< > $@ + + + +# Link: create ELF output file from object files. +.SECONDARY : $(TARGET).elf +.PRECIOUS : $(OBJ) +%.elf: $(OBJ) + @echo + @echo $(MSG_LINKING) $@ + $(CC) $(ALL_CFLAGS) $(OBJ) --output $@ $(LDFLAGS) + + +# Compile: create object files from C source files. +%.o : %.c + @echo + @echo $(MSG_COMPILING) $< + $(CC) -c $(ALL_CFLAGS) $< -o $@ + + +# Compile: create assembler files from C source files. +%.s : %.c + $(CC) -S $(ALL_CFLAGS) $< -o $@ + + +# Assemble: create object files from assembler source files. +%.o : %.S + @echo + @echo $(MSG_ASSEMBLING) $< + $(CC) -c $(ALL_ASFLAGS) $< -o $@ + + + + + + +# Target: clean project. +clean: begin clean_list finished end + +clean_list : + @echo + @echo $(MSG_CLEANING) + $(REMOVE) $(TARGET).hex + $(REMOVE) $(TARGET).eep + $(REMOVE) $(TARGET).obj + $(REMOVE) $(TARGET).cof + $(REMOVE) $(TARGET).elf + $(REMOVE) $(TARGET).map + $(REMOVE) $(TARGET).obj + $(REMOVE) $(TARGET).a90 + $(REMOVE) $(TARGET).sym + $(REMOVE) $(TARGET).lnk + $(REMOVE) $(TARGET).lss + $(REMOVE) $(OBJ) + $(REMOVE) $(LST) + $(REMOVE) $(SRC:.c=.s) + $(REMOVE) $(SRC:.c=.d) + + +# Automatically generate C source code dependencies. +# (Code originally taken from the GNU make user manual and modified +# (See README.txt Credits).) +# +# Note that this will work with sh (bash) and sed that is shipped with WinAVR +# (see the SHELL variable defined above). +# This may not work with other shells or other seds. +# +%.d: %.c + set -e; $(CC) -MM $(ALL_CFLAGS) $< \ + | sed 's,\(.*\)\.o[ :]*,\1.o \1.d : ,g' > $@; \ + [ -s $@ ] || rm -f $@ + + +# Remove the '-' if you want to see the dependency files generated. +-include $(SRC:.c=.d) + + + +# Listing of phony targets. +.PHONY : all begin finish end sizebefore sizeafter gccversion coff extcoff \ + clean clean_list program diff --git a/Firmware/cuff.aps b/Firmware/cuff.aps new file mode 100644 index 0000000..c8718f5 --- /dev/null +++ b/Firmware/cuff.aps @@ -0,0 +1 @@ +cuff19-Jan-2011 15:28:1214-Jun-2011 14:28:02208019-Jan-2011 15:28:1244, 18, 0, 670Atmel AVR Assemblercuff.objC:\Documents and Settings\ladyada\My Documents\Projects\wearable\cuff\cuff.asmC:\Documents and Settings\ladyada\My Documents\Projects\wearable\cuff\falseR00R01R02R03R04R05R06R07R08R09R10R11R12R13R14R15R16R17R18R19R20R21R22R23R24R25R26R27R28R29R30R31000C:\Documents and Settings\ladyada\My Documents\Projects\wearable\cuff\cuff.asmC:\Documents and Settings\ladyada\My Documents\Projects\wearable\cuff\cuff.asmC:\Program Files\Atmel\AVR Tools\AvrAssembler\AppnotesIcuff00100,\cuff.asm00000cuff.asm1 diff --git a/Firmware/cuff.asm b/Firmware/cuff.asm new file mode 100644 index 0000000..24a8199 --- /dev/null +++ b/Firmware/cuff.asm @@ -0,0 +1,64 @@ +.include "tn4def.inc" + + +.equ LED = 0 ; LED connected to PB0 +.equ DELAYTIME = 17 ; 17 ms between PWM changes + +.cseg + +.org 0x0000 + rjmp RESET + +.def temp = R16 ; general purpose temp +.def delaycnt1 = R17 ; counter for 1ms delay loop +.def delayms = R28 ; keeps track of how many ms left in delay + +RESET: + sbi DDRB, LED ; LED output + sbi PORTB, LED ; LED off + + ; set up fast PWM output timer WGM[3:0] = 0101 + ; COM0A1 = 1, COM0A0 = 0 or 1 + ldi temp, 0xC1 ; Fast PWM (PB2 output) + out TCCR0A, temp + ldi temp, 0x81 ; fastest clock + out TCCR0B, temp + + ; we dont use the top of the counter since its only 8 bit + ldi temp, 0 + out OCR0AH, temp + + +LOOPSTART: + ldi ZH, high(PULSETAB*2) + 0x40 ; This is start of Code in Tiny4 (0x4000) + ldi ZL, low (PULSETAB*2) ; init Z-pointer to storage bytes +LOOP: + ld temp, Z+ ; load next led brightness + cpi temp, 0 ; last entry? + brne NORELOAD + ; if temp == 0, means we reached the end, so reload the table index + rjmp LOOPSTART + +NORELOAD: + + out OCR0AL, temp ; Shove the brightness into the PWM driver + + ; delay! + ldi delayms, DELAYTIME ; delay ~17 ms +DELAY: + ldi delaycnt1, 0xFF + DELAY1MS: ; this loop takes about 1ms (with 1 MHz clock) + dec delaycnt1 ; 1 clock + cpi delaycnt1, 0 ; 1 clock + brne DELAY1MS ; 2 clocks (on avg) + dec delayms + cpi delayms, 0 + brne DELAY + + rjmp LOOP + + +PULSETAB: +.db 255, 255, 255, 255, 255, 255, 255, 255, 252, 247, 235, 235, 230, 225, 218, 213, 208, 206, 199, 189, 187, 182, 182, 177, 175, 168, 165, 163, 158, 148, 146, 144, 144, 141, 139, 136, 134, 127, 122, 120, 117, 115, 112, 112, 110, 110, 108, 103, 96, 96, 93, 91, 88, 88, 88, 88, 84, 79, 76, 74, 74, 72, 72, 72, 72, 69, 69, 62, 60, 60, 57, 57, 57, 55, 55, 55, 55, 48, 48, 45, 45, 43, 43, 40, 40, 40, 40, 36, 36, 36, 33, 33, 31, 31, 31, 28, 28, 26, 26, 26, 26, 24, 24, 21, 21, 21, 21, 20, 19, 19, 16, 16, 16, 16, 14, 14, 14, 16, 12, 12, 12, 12, 12, 9, 9, 9, 9, 9, 9, 7, 7, 7, 7, 7, 7, 4, 4, 4, 4, 4, 4, 4, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 4, 4, 4, 4, 4, 7, 7, 7, 7, 7, 7, 9, 9, 9, 12, 12, 12, 14, 14, 16, 16, 16, 16, 21, 21, 21, 21, 24, 24, 26, 28, 28, 28, 31, 36, 33, 36, 36, 40, 40, 43, 43, 45, 48, 52, 55, 55, 55, 57, 62, 62, 64, 67, 72, 74, 79, 81, 86, 86, 86, 88, 93, 96, 98, 100, 112, 115, 117, 124, 127, 129, 129, 136, 141, 144, 148, 160, 165, 170, 175, 184, 189, 194, 199, 208, 213, 220, 237, 244, 252, 255, 255, 255, 255, 255, 255, 255, 0 + + diff --git a/Firmware/cuff.aws b/Firmware/cuff.aws new file mode 100644 index 0000000..78bb106 --- /dev/null +++ b/Firmware/cuff.aws @@ -0,0 +1 @@ + diff --git a/Firmware/cuff.hex b/Firmware/cuff.hex new file mode 100644 index 0000000..dc6f930 --- /dev/null +++ b/Firmware/cuff.hex @@ -0,0 +1,24 @@ +:020000020000FC +:1000000000C0089A109A01EC0EBD01E80DBD00E099 +:1000100007BDF0E4E2E30191003009F4FACF06BD38 +:10002000C1E11FEF1A951030E9F7CA95C030C9F742 +:10003000F2CFFFFFFFFFFFFFFFFFFCF7EBEBE6E177 +:10004000DAD5D0CEC7BDBBB6B6B1AFA8A5A39E9436 +:100050009290908D8B88867F7A78757370706E6EB3 +:100060006C6760605D5B58585858544F4C4A4A481A +:1000700048484845453E3C3C3939393737373730B1 +:10008000302D2D2B2B2828282824242421211F1F04 +:100090001F1C1C1A1A1A1A181815151515141313E3 +:1000A000101010100E0E0E100C0C0C0C0C0909097F +:1000B00009090907070707070704040404040404DF +:1000C000040402020202020202020202020202020C +:1000D0000202020202020202020202020202020200 +:1000E00002020202020202020202020202020202F0 +:1000F00002020202020202020202020204040404D8 +:10010000040707070707070909090C0C0C0E0E1056 +:100110001010101515151518181A1C1C1C1F242159 +:10012000242428282B2B2D3034373737393E3E40B6 +:1001300043484A4F51565656585D60626470737515 +:100140007C7F8181888D9094A0A5AAAFB8BDC2C7DD +:0E015000D0D5DCEDF4FCFFFFFFFFFFFFFF004A +:00000001FF diff --git a/PCB/cuff.brd b/PCB/cuff.brd new file mode 100644 index 0000000..de37eea Binary files /dev/null and b/PCB/cuff.brd differ diff --git a/PCB/cuff.sch b/PCB/cuff.sch new file mode 100644 index 0000000..d80a262 Binary files /dev/null and b/PCB/cuff.sch differ