From 4a7d335a480fc3b9b118aa45168928e58c624cc8 Mon Sep 17 00:00:00 2001 From: Michal Adda Date: Fri, 2 Jun 2023 19:54:37 +0200 Subject: [PATCH] wip --- README.md | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/README.md b/README.md index ff40b3c..3ea504e 100644 --- a/README.md +++ b/README.md @@ -5,6 +5,7 @@ written in Typescript. See it live [here](https://addamichal.github.io/8-bit-cpu-emulator/) ## Supported instructions +``` NOP (0000) + value: No Operation is performed. LDA (0001) + value: Loads number from RAM using value as Memory address to A Register. ADD (0010) + value: Loads number from RAM using value as Memory address to B Register. Stores the sum of A and B Register to A Register. @@ -16,17 +17,22 @@ JC 0111 Similar to jump instruction, but gets performed only if Carry flag is se JZ 1000 Similar to jump instruction, but gets performed only if the Zero flag is set OUT 1110 Copies A Register to Out Register, shows result in the 7 segment display HLT 1111 Halts the clock, stops the execution +``` ## Flags register +``` Zero Flag: Gets set if ADD or SUB instructions result in value zero Carry Flag: Gets set if ADD or SUB instruction overflow (the result value is bigger than 8 bit) +``` ## Clock Module +``` PLS (Pulse clock) button: Toggles the clock from 1 to 0. NXT (Next instruction) button: Executes single instruction Range (Clock speed) control: Sets the clock speed OSC / MAN (Oscilate / Manual) button: Toggles between Oscilate clock mode (Automatic) and manual clock mode (PLS and NXT button needs to be used) RST (Reset) button: Resets the simulation +``` ## Bootstrapper Can be used to set the RAM of the simulations. Supported instructions are converted into their binary representation and copied to RAM. Unknown / misformated instructions are converted as NOP instructions.