Permalink
Commits on Dec 15, 2012
  1. cpu: Move kvm_run into CPUState

    Pass CPUState / {X86,S390}CPU to helper functions.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Dec 1, 2012
  2. cpu: Move kvm_state field into CPUState

    Adapt some functions to take CPUState / {PowerPC,S390}CPU argument.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Dec 1, 2012
  3. ppc_booke: Pass PowerPCCPU to ppc_booke_timers_init()

    Cleans up after passing PowerPCCPU to timer callbacks.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Dec 1, 2012
  4. ppc4xx_devs: Return PowerPCCPU from ppc4xx_init()

    Prepares for passing PowerPCCPU to ppc_booke_timers_init().
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Dec 1, 2012
  5. ppc_booke: Pass PowerPCCPU to {decr,fit,wdt} timer callbacks

    Cleans up after passing PowerPCCPU to booke_update_irq().
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Dec 1, 2012
  6. ppc: Pass PowerPCCPU to [h]decr timer callbacks

    Cleans up after passing PowerPCCPU to [h]decr exception callbacks.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Dec 1, 2012
  7. ppc: Pass PowerPCCPU to [h]decr callbacks

    Cleans up after passing PowerPCCPU to ppc_set_irq().
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Dec 1, 2012
  8. ppc: Pass PowerPCCPU to ppc_set_irq()

    Adapt static caller functions.
    
    This cleans up after passing PowerPCCPU to kvmppc_set_interrupt().
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Dec 1, 2012
  9. kvm: Pass CPUState to kvm_vcpu_ioctl()

    Adapt helper functions to pass X86CPU / PowerPCCPU / S390CPU.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Oct 31, 2012
  10. kvm: Pass CPUState to kvm_arch_*

    Move kvm_vcpu_dirty field into CPUState to simplify things and change
    its type to bool while at it.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Oct 31, 2012
  11. cpu: Move kvm_fd into CPUState

    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Oct 31, 2012
  12. target-alpha: Add support for -cpu ?

    Implement alphabetical listing of CPU subclasses.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Acked-by: Richard Henderson <rth@twiddle.net>
    committed Oct 15, 2012
  13. target-alpha: Turn CPU definitions into subclasses

    Make TYPE_ALPHA_CPU abstract and add types <name>-alpha-cpu.
    Use type inheritence, and turn "2*" models into aliases.
    
    Move cpu_alpha_init() to cpu.c and split out CPU realization.
    Default to creating type "ev67-alpha-cpu" as before.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Acked-by: Richard Henderson <rth@twiddle.net>
    committed Oct 15, 2012
  14. target-alpha: Avoid leaking the alarm timer over reset

    Move the timer from CPUAlphaState to AlphaCPU to avoid the pointer being
    zero'ed once we implement reset. Would cause a segfault in
    sys_helper.c:helper_set_alarm().
    
    This also simplifies timer initialization in Typhoon.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Acked-by: Richard Henderson <rth@twiddle.net>
    committed Oct 31, 2012
  15. alpha: Pass AlphaCPU array to Typhoon

    Also store it in TyphoonCchip.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Acked-by: Richard Henderson <rth@twiddle.net>
    committed Oct 16, 2012
  16. target-alpha: Let cpu_alpha_init() return AlphaCPU

    Replace cpu_init() macro with inline function for backwards
    compatibility.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Acked-by: Richard Henderson <rth@twiddle.net>
    committed Oct 15, 2012
  17. Merge branch 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf

    * 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf: (40 commits)
      pseries: Increase default NVRAM size
      target-ppc: Don't use hwaddr to represent hardware state
      PPC: e500: pci: Export slot2irq calculation
      PPC: E500plat: Make a lot of PCI slots available
      PPC: E500: Move PCI slot information into params
      PPC: E500: Generate dt pci irq map dynamically
      PPC: E500: PCI: Make IRQ calculation more generic
      PPC: E500: PCI: Make first slot qdev settable
      openpic: Accelerate pending irq search
      openpic: fix minor coding style issues
      MSI-X: Fix endianness
      PPC: e500: Declare pci bridge as bridge
      PPC: e500: Add MSI support
      openpic: add Shared MSI support
      openpic: make brr1 model specific
      openpic: convert to qdev
      openpic: remove irq_out
      openpic: rename openpic_t to OpenPICState
      openpic: convert simple reg operations to builtin bitops
      openpic: remove unused type variable
      ...
    blueswirl committed Dec 15, 2012
  18. target-xtensa: fix ITLB/DTLB page protection flags

    With MMU option xtensa architecture has two TLBs: ITLB and DTLB. ITLB is
    only used for code access, DTLB is only for data. However TLB entries in
    both TLBs have attribute field controlling write and exec access. These
    bits need to be properly masked off depending on TLB type before being
    used as tlb_set_page prot argument. Otherwise the following happens:
    
    (1) ITLB entry for some PFN gets invalidated
    (2) DTLB entry for the same PFN gets updated, attributes allow code
        execution
    (3) code at the page with that PFN is executed (possible due to step 2),
        entry for the TB is written into the jump cache
    (4) QEMU TLB entry for the PFN gets replaced with an entry for some
        other PFN
    (5) code in the TB from step 3 is executed (possible due to jump cache)
        and it accesses data, for which there's no DTLB entry, causing DTLB
        miss exception
    (6) re-translation of the TB from step 5 is attempted, but there's no
        QEMU TLB entry nor xtensa ITLB entry for that PFN, which causes ITLB
        miss exception at the TB start address
    (7) ITLB miss exception is handled by the guest, but execution is
        resumed from the beginning of the faulting TB (the point where ITLB
        miss occured), not from the point where DTLB miss occured, which is
        wrong.
    
    With that fix the above scenario causes ITLB miss exception (that used
    to be step 7) at step 3, right at the beginning of the TB.
    
    Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
    Cc: qemu-stable@nongnu.org
    Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
    jcmvbkbc committed with blueswirl Dec 13, 2012
Commits on Dec 14, 2012
  1. console: clip update rectangle

    Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
    Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
    kraxel committed with blueswirl Dec 14, 2012
  2. pixman: fix vnc tight png/jpeg support

    This patch adds an x argument to qemu_pixman_linebuf_fill so it can
    also be used to convert a partial scanline.  Then fix tight + png/jpeg
    encoding by passing in the x+y offset, so the data is read from the
    correct screen location instead of the upper left corner.
    
    Cc: 1087974@bugs.launchpad.net
    Cc: qemu-stable@nongnu.org
    Reported-by: Tim Hardeneck <thardeck@suse.de>
    Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
    Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
    Gerd Hoffmann committed with blueswirl Dec 14, 2012
  3. pixman: update internal copy to pixman-0.28.2

    Some w64 fixes by Stefan Weil found their way into 0.28.2,
    so update the internal copy to that version to improve
    windows support.
    
    Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
    Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
    kraxel committed with blueswirl Dec 14, 2012
  4. Revert "pixman: require 0.18.4 or newer"

    This reverts commit 288fa40.
    
    The only reason old pixman versions didn't work was the missing
    PIXMAN_TYPE_BGRA, which is properly #ifdef'ed now.  So we don't
    have to require a minimum pixman version.
    
    Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
    Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
    kraxel committed with blueswirl Dec 14, 2012
  5. pixman: fix version check for PIXMAN_TYPE_BGRA

    Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
    Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
    kraxel committed with blueswirl Dec 14, 2012
  6. pseries: Increase default NVRAM size

    If no image file for NVRAM is specified, the pseries machine currently
    creates a 16K non-persistent NVRAM by default.  This basically works, but
    is not large enough for current firmware and guest kernels to create all
    the NVRAM partitions they would like to.  Increasing the default size to
    64K addresses this and stops the guest generating error messages.
    
    Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
    Signed-off-by: Alexander Graf <agraf@suse.de>
    dgibson committed with agraf Dec 3, 2012
  7. target-ppc: Don't use hwaddr to represent hardware state

    The hwaddr type is somewhat vaguely defined as being able to contain bus
    addresses on the widest possible bus in the system.  For that reason it's
    discouraged for representing specific pieces of persistent hardware state,
    which should instead use an explicit width type that matches the bits
    available in real hardware.  In particular, because of the possibility that
    the size of hwaddr might change if different buses are added to the target
    in future, it's not suitable for use in vm state descriptions for savevm
    and migration.
    
    This patch purges such unwise uses of hwaddr from the ppc target code,
    which turns out to be just one.  The ppcemb_tlb_t struct, used on a number
    of embedded ppc models to represent a TLB entry contains a hwaddr for the
    real address field.  This patch changes it to be a fixed uint64_t which is
    suitable enough for all machine types which use this structure.
    
    Other uses of hwaddr in CPUPPCState turn out not to be problematic:
    htab_base and htab_mask are just used for the convenience of the TCG code;
    the underlying machine state is the SDR1 register, which is stored with
    a suitable type already.  Likewise the mpic_cpu_base field is only used
    internally and does not represent fundamental hardware state which needs to
    be saved.
    
    Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
    Signed-off-by: Alexander Graf <agraf@suse.de>
    dgibson committed with agraf Dec 3, 2012
  8. PPC: e500: pci: Export slot2irq calculation

    We need the calculation method to get from a PCI slot ID to its respective
    interrupt line twice. Once in the internal map function and once when
    assembling the device tree.
    
    So let's extract the calculation to a separate function that can be called
    by both users.
    
    Signed-off-by: Alexander Graf <agraf@suse.de>
    agraf committed Dec 13, 2012
  9. PPC: E500plat: Make a lot of PCI slots available

    The ppce500 machine doesn't have to stick to hardware limitations,
    as it's defined as being fully device tree based.
    
    Thus we can change the initial PCI slot ID to 0x1 which gives us a
    whopping 31 PCI devices we can support with this machine now!
    
    Signed-off-by: Alexander Graf <agraf@suse.de>
    agraf committed Dec 12, 2012
  10. PPC: E500: Move PCI slot information into params

    We have a params struct that allows us to expose differences between
    e500 machine models. Include PCI slot information there, so we can have
    different machines with different PCI slot topology.
    
    Signed-off-by: Alexander Graf <agraf@suse.de>
    agraf committed Dec 12, 2012
  11. PPC: E500: Generate dt pci irq map dynamically

    Today we're hardcoding the PCI interrupt map in the e500 machine file.
    Instead, let's write it dynamically so that different machine types
    can have different slot properties.
    
    Signed-off-by: Alexander Graf <agraf@suse.de>
    agraf committed Dec 12, 2012
  12. PPC: E500: PCI: Make IRQ calculation more generic

    The IRQ line calculation is more or less hardcoded today. Instead, let's
    write it as an algorithmic function that theoretically allows an arbitrary
    number of PCI slots.
    
    Signed-off-by: Alexander Graf <agraf@suse.de>
    agraf committed Dec 12, 2012
  13. PPC: E500: PCI: Make first slot qdev settable

    Today the first slot id in our e500 pci implementation is hardcoded to
    0x11. Keep it there as default, but allow users to change the default to
    a different id.
    
    Signed-off-by: Alexander Graf <agraf@suse.de>
    agraf committed Dec 12, 2012
  14. openpic: Accelerate pending irq search

    When we're done with one interrupt, we need to search for the next pending
    interrupt in the queue. This search has grown quite big now that we have
    more than 256 possible irq lines.
    
    So let's memorize how many interrupts we have pending in our bitmaps, so
    that we can always bail out in the usual case - the one where we're all done.
    
    Signed-off-by: Alexander Graf <agraf@suse.de>
    agraf committed Dec 13, 2012
  15. openpic: fix minor coding style issues

    This patch removes all remaining occurences of spaces before function
    parameter indicating parenthesis.
    
    Signed-off-by: Alexander Graf <agraf@suse.de>
    agraf committed Dec 12, 2012
  16. MSI-X: Fix endianness

    The MSI-X vector tables are usually stored in little endian in memory,
    so let's mark the accessors as such.
    
    This fixes MSI-X on e500 for me.
    
    Signed-off-by: Alexander Graf <agraf@suse.de>
    Acked-by: Michael S. Tsirkin <mst@redhat.com>
    agraf committed Dec 6, 2012
  17. PPC: e500: Declare pci bridge as bridge

    The new PCI host bridge device needs to identify itself as PCI host bridge.
    Declare it as such.
    
    Signed-off-by: Alexander Graf <agraf@suse.de>
    agraf committed Dec 8, 2012