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Branch: qom-cpu-microb…
Commits on Apr 24, 2012
  1. target-microblaze: QOM'ify CPU init

    authored
    Move code from cpu_mb_init() to a QOM initfn.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Tested-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
    [AF: Leave cpu_reset() call in cpu_mb_init()]
  2. target-microblaze: QOM'ify CPU reset

    authored
    Move code from cpu_state_reset() to QOM mb_cpu_reset().
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Tested-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
  3. target-microblaze: QOM'ify CPU

    authored
    Embed CPUMBState as first member of QOM MicroBlazeCPU.
    
    Let CPUClass::reset() call cpu_state_reset() for now.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Tested-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
    [AF: Updated cpu.c to include cpu-qom.h indirectly via cpu.h]
  4. target-cris: Start QOM'ifying CPU init

    authored
    Move VR-independent code from cpu_cris_init() into an initfn.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  5. target-cris: QOM'ify CPU reset

    authored
    Move code from cpu_state_reset() into QOM cris_cpu_reset().
    Let CPU init call cpu_reset().
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  6. target-cris: QOM'ify CPU

    authored
    Embed CPUCRISState as first member of QOM CRISCPU.
    
    Let CPUClass::reset() call cpu_state_reset() for now.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
Commits on Apr 23, 2012
  1. Merge remote-tracking branch 'origin/master' into staging

    Anthony Liguori authored
    * origin/master:
      qtest: fix memread and memwrite on 32 bit hosts
  2. Merge remote-tracking branch 'qmp/queue/qmp' into staging

    Anthony Liguori authored
    * qmp/queue/qmp:
      qapi: g_hash_table_find() instead of GHashTableIter.
      qmp: make block job command naming consistent
  3. @blueswirl

    qtest: fix memread and memwrite on 32 bit hosts

    blueswirl authored
    Use PRIx64 to print 64 bit values to avoid truncation
    on 32 bit hosts.
    
    Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
    Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
  4. Merge remote-tracking branch 'kwolf/for-anthony' into staging

    Anthony Liguori authored
    * kwolf/for-anthony: (38 commits)
      qemu-iotests: Fix test 031 for qcow2 v3 support
      qemu-iotests: Add -o and make v3 the default for qcow2
      qcow2: Zero write support
      qemu-iotests: Test backing file COW with zero clusters
      qemu-iotests: add a simple test for write_zeroes
      qcow2: Support for feature table header extension
      qcow2: Support reading zero clusters
      qcow2: Version 3 images
      qcow2: Ignore reserved bits in check_refcounts
      qcow2: Ignore reserved bits in refcount table entries
      qcow2: Simplify count_cow_clusters
      qcow2: Refactor qcow2_free_any_clusters
      qcow2: Ignore reserved bits in L1/L2 entries
      qcow2: Fail write_compressed when overwriting data
      qcow2: Ignore reserved bits in count_contiguous_clusters()
      qcow2: Ignore reserved bits in get_cluster_offset
      qcow2: Save disk size in snapshot header
      Specification for qcow2 version 3
      qcow2: Fix refcount block allocation during qcow2_alloc_cluster_at()
      iotests: Resolve test failures caused by hostname
      ...
  5. Merge remote-tracking branch 'origin/master' into staging

    Anthony Liguori authored
    * origin/master:
      fix BCD mask for date (Solaris 2.5 guest hang fix)
  6. @blueswirl

    fix BCD mask for date (Solaris 2.5 guest hang fix)

    Artyom Tarasenko authored blueswirl committed
    Fix BCD mask for date. The most visible effect of this patch is
    Solaris 2.5.1 doesn't hang at boot if the day of month is >21.
    
    Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
    Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
  7. Merge remote-tracking branch 'origin/master' into staging

    Anthony Liguori authored
    * origin/master: (27 commits)
      target-arm: Move reset handling to arm_cpu_reset
      target-arm: Drop cpu_reset_model_id()
      target-arm: Move cache ID register setup to cpu specific init fns
      target-arm: Move OMAP cp15_i_{max,min} reset to cpu_state_reset
      target-arm: Move feature register setup to per-CPU init fns
      target-arm: Move iWMMXT wCID reset to cpu_state_reset
      target-arm: Drop JTAG_ID documentation
      target-arm: Move SCTLR reset value setup to per cpu init fns
      target-arm: Move CTR setup to per cpu init fns
      target-arm: Move MVFR* setup to per cpu init fns
      target-arm: Move FPSID config to cpu init fns
      target-arm: Move feature bit settings to CPU init fns
      target-arm: Add QOM subclasses for each ARM cpu implementation
      target-arm: remind to keep arm features in sync with linux-user/elfload.c
      tci: GETPC() macro must return an uintptr_t
      gdbstub: Synchronize CPU state unconditionally in gdb_set_cpu_pc
      softfloat: make USE_SOFTFLOAT_STRUCT_TYPES compile
      target-xtensa: add tests for LOOPNEZ and LOOPGTZ
      target-xtensa: fix LOOPNEZ/LOOPGTZ translation
      qtest: add m48t59 tests for Sparc
      ...
  8. @nodakai

    qapi: g_hash_table_find() instead of GHashTableIter.

    nodakai authored Luiz Capitulino committed
    GHashTableIter was first introduced in glib 2.16.
    This patch removes it in favor of older g_hash_table_find()
    for better compatibility with RHEL5.
    
    Signed-off-by: NODA, Kai <nodakai@gmail.com>
    Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
  9. qmp: make block job command naming consistent

    Stefan Hajnoczi authored Luiz Capitulino committed
    The block streaming and job commands used '_' instead of '-' for reasons
    of compatibility with libvirt, which already included support for the
    '_' naming.  However, the semantics of block_job_cancel have changed and
    libvirt now needs to handle the new semantics.
    
    Since the old semantics were never in a QEMU release we can still rename
    the commands to use '-' instead of '_'.  Libvirt is also happy because
    the new name can be used to distinguish QEMU binaries that support the
    latest block-job-cancel semantics from those that include a downstream
    block_job_cancel command.
    
    Therefore, let's apply the QAPI/QMP naming rules to the block streaming
    and job commands.  QEMU 1.1 will be the first release with these
    commands so no upstream users can break.
    
    Note that HMP commands are left with '_' because that is the convention
    there.
    
    Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
    Reviewed-by: Eric Blake <eblake@redhat.com>
    Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
  10. Merge remote-tracking branch 'sstabellini/build_fix' into staging

    Anthony Liguori authored
    * sstabellini/build_fix:
      xen: add a dummy xc_hvm_inject_msi for Xen < 4.2
      xen,configure: detect Xen 4.2
  11. Merge remote-tracking branch 'stefanha/trivial-patches' into staging

    Anthony Liguori authored
    * stefanha/trivial-patches:
      Add .gitignore for tests/
      e1000: Fix spelling (segmentaion -> segmentation) in debug output
      spice-qemu-char.c: Show what name is unsupported
      pflash_cfi01: remove redundant line
      qxl: Add missing GCC_FMT_ATTR and fix format specifier
      fix block_job_set_speed name in documentation
      error.c: don't return value for void function
  12. Merge remote-tracking branch 'mdroth/qga-pull-4-19-12' into staging

    Anthony Liguori authored
    * mdroth/qga-pull-4-19-12:
      qemu-ga: fix help output
      qemu-ga: generate missing stubs for fsfreeze
  13. Merge remote-tracking branch 'bonzini/nbd-next' into staging

    Anthony Liguori authored
    * bonzini/nbd-next:
      nbd: obey FUA on reads
      nbd: do not include block_int.h
      nbd: do not block in nbd_wr_sync if no data at all is available
      nbd: consistently return negative errno values
      nbd: consistently check for <0 or >=0
      nbd: consistently use ssize_t
      nbd: avoid out of bounds access to recv_coroutine array
  14. Merge remote-tracking branch 'bonzini/scsi-next' into staging

    Anthony Liguori authored
    * bonzini/scsi-next:
      scsi: add SANITIZE command
      SCSI emulation: should tell the guest that we actually support thin provisioning
      SCSI emulation: Support unmap via WRITE_SAME_10.
      scsi: advertise DPOFUA
      scsi: small refactoring of MMC mode-sense
      scsi: support FUA on reads
      scsi: add a started field to SCSIDiskReq
      scsi: force unit access on VERIFY
      scsi: add support for FUA on writes
      scsi: move scsi_flush_complete around
      scsi: make code more homogeneous in AIO callback functions
      scsi: add missing test for cancelled request
      virtio-scsi: add multiqueue capability
      virtio: add virtio_queue_get_id
      virtio-scsi: prepare migration format for multiqueue
      scsi: fix memory leak
  15. Merge remote-tracking branch 'stefanha/tracing' into staging

    Anthony Liguori authored
    * stefanha/tracing:
      tracetool: handle DTrace keywords 'in', 'next', 'self'
      tracetool: Add MAINTAINERS info
      tracetool: Add support for the 'dtrace' backend
      tracetool: Add support for the 'ust' backend
      tracetool: Add support for the 'simple' backend
      tracetool: Add support for the 'stderr' backend
      tracetool: Add module for the 'h' format
      tracetool: Add module for the 'c' format
      tracetool: Rewrite infrastructure as python modules
Commits on Apr 21, 2012
  1. @pm215

    target-arm: Move reset handling to arm_cpu_reset

    pm215 authored
    Now that cpu_reset_model_id() has gone we can move the
    reset code over to the class reset function and have cpu_state_reset
    simply do a reset on the CPU QOM object.
    
    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
    Acked-by: Andreas Färber <afaerber@suse.de>
  2. @pm215

    target-arm: Drop cpu_reset_model_id()

    pm215 authored
    cpu_reset_model_id() is now empty and we can remove it.
    
    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
    Acked-by: Andreas Färber <afaerber@suse.de>
  3. @pm215

    target-arm: Move cache ID register setup to cpu specific init fns

    pm215 authored
    Move cache ID register reset out of cpu_reset_model_id() by
    creating a field for the reset value in ARMCPU and setting it
    up in the cpu specific init functions.
    
    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
    Acked-by: Andreas Färber <afaerber@suse.de>
  4. @pm215

    target-arm: Move OMAP cp15_i_{max,min} reset to cpu_state_reset

    pm215 authored
    Move the OMAP-specific cp15_i_{max,min} reset to cpu_state_reset;
    since these registers are only accessible on CPUs with the
    OMAPCP feature set there's no need to guard this reset with
    either a CPUID or feature bit check.
    
    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
    Reviewed-by: Andreas Färber <afaerber@suse.de>
  5. @pm215

    target-arm: Move feature register setup to per-CPU init fns

    pm215 authored
    Move feature register value setup to per-CPU init functions.
    
    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
    Acked-by: Andreas Färber <afaerber@suse.de>
  6. @pm215

    target-arm: Move iWMMXT wCID reset to cpu_state_reset

    pm215 authored
    Move the iWMMXT wCID reset to cpu_state_reset(). Since
    we use the same value for all CPUs with this feature
    (with the major/minor revision fields set to the QEMU
    specific 'Q' value) there's no need to create an ARMCPU
    field just for this.
    
    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
    Reviewed-by: Andreas Färber <afaerber@suse.de>
  7. @pm215

    target-arm: Drop JTAG_ID documentation

    pm215 authored
    None of the machines in QEMU offer a JTAG debug interface, so this info
    was unused. Further, the PXA250 ID contradicts the February 2002
    Developer's Manual, which has it as 0xn9264013 with n the MIDR Revision.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
  8. @pm215

    target-arm: Move SCTLR reset value setup to per cpu init fns

    pm215 authored
    Move the reset value of SCTLR to ARMCPU, initialised in
    the per-cpu init functions. It can then be reset by a
    simple copy, and we can drop the code from cpu_reset_model_id().
    
    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
    Acked-by: Andreas Färber <afaerber@suse.de>
  9. @pm215

    target-arm: Move CTR setup to per cpu init fns

    pm215 authored
    Move CTR (cache type register) value to an ARMCPU field
    set up by per-cpu init fns.
    
    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
    Acked-by: Andreas Färber <afaerber@suse.de>
  10. @pm215

    target-arm: Move MVFR* setup to per cpu init fns

    pm215 authored
    Move the MVFR* VFP feature register values to ARMCPU,
    so they are set up by the implementation-specific instance
    init functions rather than in cpu_reset_model_id().
    
    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
    Acked-by: Andreas Färber <afaerber@suse.de>
  11. @pm215

    target-arm: Move FPSID config to cpu init fns

    pm215 authored
    Move the reset FPSID to the ARMCPU struct, and set it in the
    per-implementation instance init function. At reset we then
    just copy the reset value into the CPUARMState field.
    
    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
    Acked-by: Andreas Färber <afaerber@suse.de>
  12. @pm215

    target-arm: Move feature bit settings to CPU init fns

    pm215 authored
    Move the setting of the feature bits from cpu_reset_model_id()
    to each CPU's instance init function. This requires us to move
    the features field in CPUARMState so that it is not cleared
    on reset.
    
    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
    Acked-by: Andreas Färber <afaerber@suse.de>
  13. @pm215

    target-arm: Add QOM subclasses for each ARM cpu implementation

    pm215 authored
    Register subclasses for each ARM CPU implementation.
    
    Let arm_cpu_list() enumerate CPU subclasses in alphabetical order,
    except for special value "any".
    
    Replace cpu_arm_find_by_name()'s string -> CPUID lookup by storing the
    CPUID (aka MIDR, Main ID Register) value in the class.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
  14. @benoit-canet @pm215

    target-arm: remind to keep arm features in sync with linux-user/elflo…

    benoit-canet authored pm215 committed
    …ad.c
    
    Signed-off-by: Benoit Canet <benoit.canet@gmail.com>
    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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