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Commits on Mar 30, 2012
  1. target-xtensa: QOM'ify CPU

    Let xtensa_cpu_list() enumerate CPU classes alphabetically.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Feb 20, 2012
  2. target-sparc: QOM'ify CPU

    Let sparc_cpu_list() enumerate CPU classes alphabetically.
    
    Introduce sparc_env_get_features() to workaround a circular dependency.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Feb 19, 2012
  3. target-microblaze: QOM'ify CPU

    There were no CPU models, so make TYPE_MICROBLAZE_CPU non-abstract.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Feb 19, 2012
  4. target-lm32: QOM'ify CPU

    Let cpu_lm32_list() enumerate CPU classes sorted alphabetically.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Feb 19, 2012
  5. target-cris: QOM'ify CPU

    Let cris_cpu_list() enumerate CPU classes sorted by version.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Feb 19, 2012
  6. target-ppc: Prepare finalizer for PowerPCCPU

    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Feb 19, 2012
  7. target-ppc: QOM'ify CPU

    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Feb 17, 2012
  8. target-i386: QOM'ify CPU

    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Feb 17, 2012
  9. target-alpha: QOM'ify CPU

    Embed CPUAlphaState in AlphaCPU.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Feb 13, 2012
  10. target-m68k: QOM'ify CPU

    Embed CPUM68KState in M68kCPU. Let cpu_state_reset() call cpu_reset().
    Let m68k_cpu_list() enumerate CPU classes alphabetically, except for
    "any".
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Feb 12, 2012
  11. target-mips: QOM'ify CPU

    MIPS was very close to QOM in referencing a CPU definition from
    CPUMIPSState. Turn those structs into classes. This moves most of
    translate_init.c into cpu.c; move the remainder into translate.c
    so that we no longer #include "translate_init.c" there.
    
    Embed CPUMIPSState into MIPSCPU. Let cpu_state_reset() call cpu_reset().
    Let mips_cpu_list() enumerate available CPU classes in alphabetical
    order.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Cc: Hervé Poussineau <hpoussin@reactos.org>
    Cc: Stefan Weil <sw@weilnetz.de>
    Cc: Khansa Butt <khansa@kics.edu.pk>
    Cc: Meador Inge <meadori@codesourcery.com>
    Cc: Jia Liu <proljc@gmail.com>
    committed Feb 6, 2012
  12. target-s390x: QOM'ify CPU

    S/390 ignored -cpu, so there's only one S390CPUClass for now.
    Let cpu_s390x_init() instantiate it.
    
    Embed CPUS390XState into S390CPU. Keep s390x_{tod,cpu}_timer() in
    helper.c but pass the S390CPU to them. Let cpu_state_reset() call
    cpu_reset().
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Cc: Ulrich Hecht <uli@suse.de>
    committed Feb 6, 2012
  13. hw/sh7750: QOM'ify SH7750 SoC

    For now derive directly from Object. Move CPU-independent initialization
    to an initfn. Add a "cpu-model" property and move CPU-dependent init
    code to sh7750_realize().
    
    Update Shix and R2D boards accordingly. Add the SoC as /sh7750 to
    inspect it.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Feb 26, 2012
  14. qdev: Hook up DeviceClass::init to ObjectClass::realize

    On realize, call the qdev init function.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Cc: Anthony Liguori <anthony@codemonkey.ws>
    Cc: Paolo Bonzini <pbonzini@redhat.com>
    committed Mar 24, 2012
  15. qom: Introduce object_realize()

    Wrap setting of Object::realized property, error reporting and exit(1)
    into a helper function.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Cc: Anthony Liguori <anthony@codemonkey.ws>
    Cc: Paolo Bonzini <pbonzini@redhat.com>
    committed Mar 24, 2012
  16. qom: Add "realized" property to Object

    The Object::realized property can only be set once and, on setting it,
    invokes the ObjectClass::realize callback.
    
    Introduce QERR_OBJECT_REALIZE_FAILED for error handling.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Cc: Anthony Liguori <anthony@codemonkey.ws>
    Cc: Paolo Bonzini <pbonzini@redhat.com>
    Cc: Peter Maydell <peter.maydell@linaro.org>
    committed Mar 24, 2012
  17. target-sh4: Make itlb_replacement() use SuperHCPU

    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Feb 26, 2012
  18. target-sh4: Make update_itlb_use() take SuperHCPU

    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Feb 26, 2012
  19. target-sh4: Make copy_utlb_entry_itlb() take SuperHCPU

    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Feb 26, 2012
  20. target-sh4: Make get_{physical,mmu}_address() take SuperHCPU

    Simplifies TLB helper code.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Feb 26, 2012
  21. target-sh4: Make cpu_sh4_{read,write}_mmaped_{i,u}tlb_addr() take CPU

    Change argument type to SuperHCPU and update the SH7750 SoC.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Feb 26, 2012
  22. target-sh4: Make find_*tlb_entry() take SuperHCPU

    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Feb 26, 2012
  23. target-sh4: Make increment_urc() take SuperHCPU

    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Feb 26, 2012
  24. target-sh4: Make cpu_sh4_invalidate_tlb() take SuperHCPU

    Change argument type from CPUSH4State to SuperHCPU.
    This simplifies the SH7750 SoC as its only caller.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Feb 26, 2012
  25. hw/sh7750: Use SuperHCPU

    In place of CPUSH4State use SuperHCPU for SH7750State::cpu field.
    
    Fix tab indentation on those lines and add braces.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Feb 26, 2012
  26. target-sh4: Do not reset features on reset

    Move them out of CPUSH4State so that they are not zero'ed on reset.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Feb 11, 2012
  27. target-sh4: QOM'ify CPU

    Embed CPUSH4State into SuperHCPU. Let cpu_state_reset() call
    cpu_reset(). Let sh4_cpu_list() enumerate CPU classes alphabetically.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Feb 11, 2012
  28. target-unicore32: Move CPU-dependent init into initfn

    Instead of setting values in a CPUID switch, do so in initfn functions.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
    committed Mar 29, 2012
  29. target-unicore32: QOM'ify CPU

    Embed CPUUniCore32State as first member of UniCore32CPU.
    
    Contributed under GPLv2+.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
    committed Feb 14, 2012
  30. target-unicore32: License future contributions under GPLv2+

    This is to limit relicensing obstacles to the pending IBM investigation.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
    committed Mar 15, 2012
Commits on Mar 29, 2012
  1. target-unicore32: Relicense to GPLv2+

    Adopt the license text suggested by Guan Xue-tao (with a minor
    simplification) for all target-unicore/ files except helper.c.
    
    To helper.c Anthony Liguori contributed a qemu_malloc() -> g_malloc()
    conversion, still pending IBM relicensing approval, so that remains
    GPLv2 for now.
    
    By relicensing all possible parts now, we avoid having to formally
    relicense new, e.g., QOM code.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
    Signed-off-by: Stefan Weil <sw@weilnetz.de>
    Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
    Signed-off-by: Dor Laor <dlaor@redhat.com>
    committed Mar 13, 2012
  2. MAINTAINERS: Add entry for UniCore32

    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
    committed Mar 13, 2012
  3. target-arm: Minimalistic CPU QOM'ification

    Introduce only one non-abstract type TYPE_ARM_CPU and do not touch
    cp15 registers to not interfere with Peter's ongoing remodelling.
    Embed CPUARMState as first (additional) field of ARMCPU.
    
    Let CPUClass::reset() call cpu_state_reset() for now.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    committed Mar 23, 2012
  4. target-arm: Drop cpu_arm_close()

    It's unused, so no need to QOM'ify it later.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
    committed Mar 23, 2012
  5. qemu tcg: Remove one entry of INDEX_op_ld_i64 from ppc_op_defs

    There two entries of INDEX_op_ld_i64 in the ppc_op_defs.  That causes an
    assertion failure in tcg_add_target_add_op_defs() when --enable-debug is
    used on a ppc64 backend (that's ppc64 host, not target).
    
    Signed-off-by: Li Zhang <zhlcindy@linux.vnet.ibm.com>
    Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
    Signed-off-by: malc <av1474@comtv.ru>
    Li Zhang committed with malc Mar 29, 2012