Skip to content

HTTPS clone URL

Subversion checkout URL

You can clone with HTTPS or Subversion.

Download ZIP
branch: qom-cpu-realize
Commits on Jan 27, 2013
  1. target-xtensa: Move TCG initialization to XtensaCPU initfn

    authored
    Combine this with breakpoint handler registration, guarding both with
    tcg_enabled() to suppress also TCG init for qtest. Rename the handler to
    xtensa_breakpoint_handler() since it needs to become global.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  2. target-unicore32: Move TCG initialization to UniCore32CPU initfn

    authored
    Normalize the "inited" logic and add a tcg_enabled() check to suppress
    it for qtest.
    
    Ensures that a QOM-created UniCore32CPU is usable.
    
    Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  3. target-sparc: Move TCG initialization to SPARCCPU initfn

    authored
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  4. target-sh4: Move TCG initialization to SuperHCPU initfn

    authored
    Add a tcg_enabled() check to suppress it for qtest.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  5. target-s390x: Move TCG initialization to S390CPU initfn

    authored
    Ensures that a QOM-created S390CPU is usable.
    
    Acked-by: Richard Henderson <rth@twiddle.net>
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  6. target-ppc: Move TCG initialization to PowerPCCPU initfn

    authored
    Ensures that a QOM-created PowerPCCPU is usable.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  7. target-mips: Move TCG initialization to MIPSCPU initfn

    authored
    Make mips_tcg_init() non-static and add tcg_enabled() check to suppress
    it for qtest.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  8. target-microblaze: Move TCG initialization to MicroBlazeCPU initfn

    authored
    Split off TCG initialization from cpu_mb_init() into mb_tcg_init() to
    call it from the initfn.
    
    Ensures that a QOM-created MicroBlazeCPU is usable.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  9. target-m68k: Move TCG initialization to M68kCPU initfn

    authored
    Add a tcg_enabled() check to suppress it for qtest.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  10. target-lm32: Move TCG initialization to LM32CPU initfn

    authored
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  11. target-cris: Move TCG initialization to CRISCPU initfn

    authored
    Split out TCG initialization from cpu_cris_init(). Avoid CPUCRISState
    dependency for v10-specific initialization and for non-v10 by inlining
    the decision into the initfn as well.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  12. target-arm: Move TCG initialization to ARMCPU initfn

    authored
    Ensures that a QOM-created ARMCPU is usable.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  13. target-xtensa: Introduce QOM realizefn for XtensaCPU

    authored
    Introduce realizefn and set realized = true in cpu_xtensa_init().
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  14. target-unicore32: Introduce QOM realizefn for UniCore32CPU

    authored
    Introduce a realizefn and set realized = true in uc32_cpu_init().
    
    Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
    [AF: Invoke the parent's realizefn]
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  15. target-sparc: Introduce QOM realizefn for SPARCCPU

    authored
    Introduce realizefn and set realized = true in cpu_sparc_init().
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  16. target-sh4: Introduce QOM realizefn for SuperHCPU

    authored
    Introduce a realizefn and set realized = true in cpu_sh4_init().
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  17. target-s390x: Introduce QOM realizefn for S390CPU

    authored
    Introduce realizefn and set realized = true in cpu_s390x_init().
    
    Defer CPU reset from initfn to realizefn.
    
    Acked-by: Richard Henderson <rth@twiddle.net>
    [AF: Invoke parent's realizefn]
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  18. target-mips: Introduce QOM realizefn for MIPSCPU

    authored
    Introduce a realizefn and set realized = true from cpu_mips_init().
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  19. target-microblaze: Introduce QOM realizefn for MicroBlazeCPU

    authored
    Introduce realizefn and set realized = true from cpu_mb_init().
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  20. target-m68k: Introduce QOM realizefn for M68kCPU

    authored
    Introduce realizefn and set realized = true in cpu_m68k_init().
    
    Split off GDB registration to a new m68k_cpu_init_gdb() so that it can
    be called from the realizefn.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  21. target-lm32: Introduce QOM realizefn for LM32CPU

    authored
    Introduce a realizefn and set realized = true in cpu_lm32_init().
    
    Also move cpu_reset() call from initfn to realizefn.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  22. target-cris: Introduce QOM realizefn for CRISCPU

    authored
    Introduce realizefn and set realized = true from cpu_cris_init().
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  23. target-ppc: Update PowerPCCPU to QOM realizefn

    authored
    Adapt ppc_cpu_realize() signature, hook it up to DeviceClass and set
    realized = true in cpu_ppc_init().
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  24. target-openrisc: Update OpenRISCCPU to QOM realizefn

    authored
    Update the openrisc_cpu_realize() signature, hook it up to
    DeviceClass::realize and set realized = true in cpu_openrisc_init().
    
    qapi/error.h is now included through qdev and no longer needed.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Cc: Jia Liu <proljc@gmail.com>
  25. target-i386: Update X86CPU to QOM realizefn

    authored
    Adapt the signature of x86_cpu_realize(), hook up to
    DeviceClass::realize and set realized = true in cpu_x86_init().
    
    The QOM realizefn cannot depend on errp being non-NULL as in
    cpu_x86_init(), so use a local Error to preserve error handling behavior
    on APIC initialization errors.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Cc: Igor Mammedov <imammedo@redhat.com>
    Cc: Eduardo Habkost <ehabkost@redhat.com>
  26. target-arm: Update ARMCPU to QOM realizefn

    authored
    Turn arm_cpu_realize() into a QOM realize function, no longer called
    via cpu.h prototype. To maintain the semantics of cpu_init(), set
    realized = true explicitly in cpu_arm_init().
    
    Move GDB coprocessor registration, CPU reset and vCPU initialization
    into the realizefn.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  27. target-alpha: Update AlphaCPU to QOM realizefn

    authored
    Update the alpha_cpu_realize() signature and hook up to
    DeviceClass::realize. Set realized = true in cpu_alpha_init().
    
    qapi/error.h is included through qdev now and no longer needed.
    
    Acked-by: Richard Henderson <rth@twiddle.net>
    [AF: Invoke parent's realizefn]
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  28. cpu: Prepare QOM realizefn

    authored
    Overwrite the default implementation with a no-op, no longer
    attempting to call DeviceClass::init.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  29. target-m68k: Use type_register() instead of type_register_static()

    authored
    According to its documentation, type_register_static()'s TypeInfo
    argument should exist for the life type of the type.
    Therefore use type_register() when registering the list of CPU subtypes.
    
    No functional change with the current implementation.
    
    Cf. 918fd08 for arm.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  30. target-unicore32: Use type_register() instead of type_register_static()

    authored
    According to its documentation, type_register_static()'s TypeInfo
    argument should exist for the life type of the type.
    Therefore use type_register() when registering the list of CPU subtypes.
    
    No functional change with the current implementation.
    
    Cf. 918fd08 for arm.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  31. target-openrisc: Use type_register() instead of type_register_static()

    authored
    According to its documentation, type_register_static()'s TypeInfo
    argument should exist for the life type of the type.
    Therefore use type_register() when registering the list of CPU subtypes.
    
    No functional change with the current implementation.
    
    Cf. 918fd08 for arm.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  32. target-unicore32: Catch attempt to instantiate abstract type in cpu_i…

    authored
    …nit()
    
    Will avoid -cpu uc32-cpu asserting.
    
    Cc: qemu-stable@nongnu.org
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  33. target-openrisc: Catch attempt to instantiate abstract type in cpu_in…

    authored
    …it()
    
    Fixes -cpu openrisc-cpu asserting.
    
    Cc: qemu-stable@nongnu.org
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  34. target-m68k: Catch attempt to instantiate abstract type in cpu_init()

    authored
    This fixes -cpu m68k-cpu asserting.
    
    Cc: qemu-stable@nongnu.org
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  35. target-arm: Catch attempt to instantiate abstract type in cpu_init()

    authored
    This fixes -cpu arm-cpu asserting.
    
    Cc: qemu-stable@nongnu.org
    Acked-by: Peter Maydell <peter.maydell@linaro.org>
    Signed-off-by: Andreas Färber <afaerber@suse.de>
Something went wrong with that request. Please try again.