Commits
qom-cpu-sh4-cl…
Name already in use
Commits on Jan 21, 2013
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target-sh4: Move PVR/PRR/CVR into SuperHCPUClass
They are never changed once initialized, and moving them to the class will allow to inspect them before instantiating. Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-sh4: Introduce SuperHCPU subclasses
Store legacy name in SuperHCPUClass for -cpu ? and for case-insensitive class lookup. List CPUs by iterating over TYPE_SUPERH_CPU subclasses. Signed-off-by: Andreas Färber <afaerber@suse.de>
Commits on Jan 20, 2013
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target-xtensa: Move TCG initialization to XtensaCPU initfn
Combine this with breakpoint handler registration, guarding both with tcg_enabled() to suppress also TCG init for qtest. Rename the handler to xtensa_breakpoint_handler() since it needs to become global. Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-unicore32: Move TCG initialization to UniCore32CPU initfn
Normalize the "inited" logic and add a tcg_enabled() check to suppress it for qtest. Ensures that a QOM-created UniCore32CPU is usable. Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-sparc: Move TCG initialization to SPARCCPU initfn
Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-sh4: Move TCG initialization to SuperHCPU initfn
Add a tcg_enabled() check to suppress it for qtest. Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-s390x: Move TCG initialization to S390CPU initfn
Ensures that a QOM-created S390CPU is usable. Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-ppc: Move TCG initialization to PowerPCCPU initfn
Ensures that a QOM-created PowerPCCPU is usable. Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-mips: Move TCG initialization to MIPSCPU initfn
Make mips_tcg_init() non-static and add tcg_enabled() check to suppress it for qtest. Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-microblaze: Move TCG initialization to MicroBlazeCPU initfn
Split off TCG initialization from cpu_mb_init() into mb_tcg_init() to call it from the initfn. Ensures that a QOM-created MicroBlazeCPU is usable. Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-m68k: Move TCG initialization to M68kCPU initfn
Add a tcg_enabled() check to suppress it for qtest. Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-lm32: Move TCG initialization to LM32CPU initfn
Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-cris: Move TCG initialization to CRISCPU initfn
Split out TCG initialization from cpu_cris_init(). Avoid CPUCRISState dependency for v10-specific initialization and for non-v10 by inlining the decision into the initfn as well. Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-arm: Move TCG initialization to ARMCPU initfn
Ensures that a QOM-created ARMCPU is usable. Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-xtensa: Introduce QOM realizefn for XtensaCPU
Introduce realizefn and set realized = true in cpu_xtensa_init(). Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-unicore32: Introduce QOM realizefn for UniCore32CPU
Introduce a realizefn and set realized = true in uc32_cpu_init(). Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [AF: Invoke the parent's realizefn] Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-sparc: Introduce QOM realizefn for SPARCCPU
Introduce realizefn and set realized = true in cpu_sparc_init(). Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-sh4: Introduce QOM realizefn for SuperHCPU
Introduce a realizefn and set realized = true in cpu_sh4_init(). Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-s390x: Introduce QOM realizefn for S390CPU
Introduce realizefn and set realized = true in cpu_s390x_init(). Defer CPU reset from initfn to realizefn. Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-mips: Introduce QOM realizefn for MIPSCPU
Introduce a realizefn and set realized = true from cpu_mips_init(). Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-microblaze: Introduce QOM realizefn for MicroBlazeCPU
Introduce realizefn and set realized = true from cpu_mb_init(). Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-m68k: Introduce QOM realizefn for M68kCPU
Introduce realizefn and set realized = true in cpu_m68k_init(). Split off GDB registration to a new m68k_cpu_init_gdb() so that it can be called from the realizefn. Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-lm32: Introduce QOM realizefn for LM32CPU
Introduce a realizefn and set realized = true in cpu_lm32_init(). Also move cpu_reset() call from initfn to realizefn. Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-cris: Introduce QOM realizefn for CRISCPU
Introduce realizefn and set realized = true from cpu_cris_init(). Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-ppc: Update PowerPCCPU to QOM realizefn
Adapt ppc_cpu_realize() signature, hook it up to DeviceClass and set realized = true in cpu_ppc_init(). Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-openrisc: Update OpenRISCCPU to QOM realizefn
Update the openrisc_cpu_realize() signature, hook it up to DeviceClass::realize and set realized = true in cpu_openrisc_init(). qapi/error.h is now included through qdev and no longer needed. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Jia Liu <proljc@gmail.com>
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target-i386: Update X86CPU to QOM realizefn
Adapt the signature of x86_cpu_realize(), hook up to DeviceClass::realize and set realized = true in cpu_x86_init(). The QOM realizefn cannot depend on errp being non-NULL as in cpu_x86_init(), so use a local Error to preserve error handling behavior on APIC initialization errors. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Igor Mammedov <imammedo@redhat.com> Cc: Eduardo Habkost <ehabkost@redhat.com>
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target-arm: Update ARMCPU to QOM realizefn
Turn arm_cpu_realize() into a QOM realize function, no longer called via cpu.h prototype. To maintain the semantics of cpu_init(), set realized = true explicitly in cpu_arm_init(). Move GDB coprocessor registration, CPU reset and vCPU initialization into the realizefn. Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-alpha: Update AlphaCPU to QOM realizefn
Update the alpha_cpu_realize() signature and hook up to DeviceClass::realize. Set realized = true in cpu_alpha_init(). qapi/error.h is included through qdev now and no longer needed. Signed-off-by: Andreas Färber <afaerber@suse.de>
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Overwrite the default implementation with a no-op, no longer attempting to call DeviceClass::init. Signed-off-by: Andreas Färber <afaerber@suse.de>
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*-user: Don't reset X86CPU again
Since commit 65dee38 (target-i386: move cpu_reset and reset callback to cpu.c) the x86 CPU is reset through cpu_init() but was still reset immediately after in linux-user and bsd-user. Similarly it was reset again in linux-user after cpu_copy(), defeating its very purpose. Clean this up. Fixing the ppc and sparc cases of cpu_copy() and overhauling its implementation is left for another day. Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Peter Maydell <peter.maydell@linaro.org>
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target-openrisc: Clean up triple QOM casts
Instead of calling openrisc_env_get_cpu(), casting to CPU() via the ENV_GET_CPU() compatibility macro and casting back to OPENRISC_CPU(), just call openrisc_env_get_cpu() directly. ENV_GET_CPU() is meant as workaround for target-independent code only. Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-microblaze: Drop unused cpu_mb_close() prototype
Such a function never existed. Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-cris: Drop unused cpu_cris_close() prototype
Such a function never existed. Signed-off-by: Andreas Färber <afaerber@suse.de>
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target-openrisc: Drop OpenRISCCPUList
It was missed in the previous cleanup because its naming did not match the *CPUListState pattern. Use the generalized CPUListState instead. Signed-off-by: Andreas Färber <afaerber@suse.de>