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Commits on Jan 31, 2013
  1. target-unicore32: Rename CPU subtypes

    authored
    In the initial conversion of CPU models to QOM types, model names were
    mapped 1:1 to type names. As a side effect this gained us a type "any",
    which is now a device.
    
    To avoid "-device any" silliness and to pave the way for compiling
    multiple targets into one executable, adopt a <name>-<arch>-cpu scheme.
    
    No functional changes for -cpu arguments.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  2. target-openrisc: Rename CPU subtypes

    authored
    Model names were mapped 1:1 to type names. As a side effect this
    registered a type "any", which is now a device.
    
    To avoid "-device any" silliness and to pave the way for compiling
    multiple targets into one executable, adopt a <name>-<arch>-cpu scheme.
    
    No functional changes for -cpu arguments or -cpu ? output.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  3. target-openrisc: TYPE_OPENRISC_CPU should be abstract

    authored
    A basic assumption of CPU subtypes is that only specific models get
    instantiated. A user is not supposed to instantiate an <arch>-cpu.
    Suppress it via abstract = true, which also drops or32-cpu from
    -cpu ? output.
    
    Cc: qemu-stable@nongnu.org
    Cc: Jia Liu <proljc@gmail.com>
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  4. target-m68k: Mark as unmigratable

    authored
    It neither defined CPU_SAVE_VERSION nor implemented cpu_{save,load}().
    Mark M68kCPU as unmigratable at device level.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Reviewed-by: Juan Quintela <quintela@redhat.com>
  5. target-s390x: Mark as unmigratable

    authored
    CPU_SAVE_VERSION was undefined, so "cpu_common" VMState and
    cpu_{save,load}() were not registered. They were no-ops.
    Therefore there is no backwards compatibility to keep, so we can mark
    S390CPU as unmigratable at device level.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Acked-by: Alexander Graf <agraf@suse.de>
    Reviewed-by: Juan Quintela <quintela@redhat.com>
  6. target-sh4: Mark as unmigratable

    authored
    It neither defined CPU_SAVE_VERSION nor implemented cpu{save,load}().
    Mark it as unmigratable at device level.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Reviewed-by: Juan Quintela <quintela@redhat.com>
  7. target-xtensa: Mark as unmigratable

    authored
    There was no CPU_SAVE_VERSION defined, so neither "cpu_common" VMState
    nor cpu_{save,load}() were registered. Their implementation was no-op.
    Therefore there is no backwards compatibility to keep, so mark XtensaCPU
    as unmigratable at device level.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Reviewed-by: Juan Quintela <quintela@redhat.com>
  8. target-microblaze: Mark as unmigratable

    authored
    cpu_{save,load} were no-ops, so de facto it is unmigratable and no
    backwards compatibility to keep. Therefore mark the MicroBlazeCPU as
    unmigratable at device level the QOM way and suppress "cpu_common"
    VMState registration by dropping CPU_SAVE_VERSION.
    
    Signed-off-by: Juan Quintela <quintela@redhat.com>
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Reviewed-by: Juan Quintela <quintela@redhat.com>
  9. target-unicore32: Mark as unmigratable

    authored
    CPU_SAVE_VERSION 2 was bogus as both save and load would just throw a
    hw_error(). Therefore we can without problems suppress registration of
    "cpu_common" VMState by dropping CPU_SAVE_VERSION define and provide an
    unmigratable "cpu" VMStateDescription for UniCore32CPU at device level
    instead, where we can attach this the QOM way.
    
    Signed-off-by: Juan Quintela <quintela@redhat.com>
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Reviewed-by: Juan Quintela <quintela@redhat.com>
  10. target-m68k: Rename CPU types

    authored
    In the initial conversion of CPU models to QOM types, model names were
    mapped 1:1 to type names. As a side effect this gained us a type "any",
    which is now a device.
    
    To avoid "-device any" silliness and to pave the way for compiling
    multiple targets into one executable, adopt a <name>-<arch>-cpu scheme.
    
    No functional changes for -cpu arguments or -cpu ? output.
    
    Signed-off-by: Andreas Färber <afaerber@suse.de>
  11. @aurel32

    ide/mmio: QOM'ify MMIO IDE for R2D

    authored aurel32 committed
    It was not qdev'ified before, so turn it into a SysBusDevice.
    Keep mmio_ide_init_drives() around to attach the hard drive.
    
    Signed-off-by: Andreas Färberr <afaerber@suse.de>
    Cc: Markus Armbruster <armbru@redhat.com>
    Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
  12. @petar-jovanovic @aurel32

    target-mips: fix incorrect test for MTHLIP

    petar-jovanovic authored aurel32 committed
    The pos field in the DSPControl register is not correctly initialized.
    Per documentation, the result of MTHLIP is unpredictable if the value of the
    pos field before the execution is greater than 32.
    
    Signed-off-by: Petar Jovanovic <petarj@mips.com>
    Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
  13. @petar-jovanovic @aurel32

    target-mips: enable access to DSP ASE if implemented

    petar-jovanovic authored aurel32 committed
    compute_hflags() will reset DSP h-flags, so MX bit should be initially set
    for usermode in cpu_state_reset() if DSP ASE is implemented.
    This change will bring back user-mode support for DSP ASE, since one of the
    recent changes broke it.
    
    Signed-off-by: Petar Jovanovic <petarj@mips.com>
    Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
  14. @rsandifo @aurel32

    target-mips: Unfuse {,N}M{ADD,SUB}.fmt

    rsandifo authored aurel32 committed
    Turn MADD.fmt, MSUB.fmt, NMADD.fmt and NMSUB.fmt from fused to unfused
    operations, so that they behave in the same way as a separate multiplication
    and addition.  The instructions were only fused in early MIPS IV processors.
    
    Signed-off-by: Richard Sandiford <rdsandiford@googlemail.com>
    Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
  15. @rsandifo @aurel32

    target-mips: Sign-extend the result of LWR

    rsandifo authored aurel32 committed
    Sign-extend the result of LWR, as is already done for LWL.  This is necessary
    in the case where LWR loads the full word (i.e. the address is actually
    aligned).  In the other cases, it is implementation defined whether the
    upper 32 bits of the result are unchanged or a copy of bit 31.  The latter
    seems easier to implement.
    
    Previously the code used:
    
        (oldval & (0xfffffffe << (31 - bitshift))) | (newval >> bitshift)
    
    which zeroed the upper bits of the register, losing any previous sign
    extension in the unaligned cases.
    
    Signed-off-by: Richard Sandiford <rdsandiford@googlemail.com>
    Reviewed-by: Richard Henderson <rth@twiddle.net>
    Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
  16. @rsandifo @aurel32

    target-mips: Fix signedness of loads in MIPS16 RESTOREs

    rsandifo authored aurel32 committed
    Make RESTORE use sign-extending rather than zero-extending loads.
    
    Signed-off-by: Richard Sandiford <rdsandiford@googlemail.com>
    Reviewed-by: Richard Henderson <rth@twiddle.net>
    Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
  17. @aurel32

    Merge branch 'target-arm.next' of git://git.linaro.org/people/pmaydel…

    aurel32 authored
    …l/qemu-arm
    
    * 'target-arm.next' of git://git.linaro.org/people/pmaydell/qemu-arm:
      target-arm: Rename CPU types
      target-arm: Fix TCG temp leaks for WI and UNDEF VFP sysreg writes
  18. @aurel32

    target-mips: implement DSP (d)append sub-class with TCG

    aurel32 authored
    DSP instruction from the (d)append sub-class can be implemented with
    TCG. Use a different function for these instructions are they are quite
    different from compare-pick sub-class.
    
    Fix BALIGN instruction for negative value, where the value should be
    zero-extended before being shift to the right.
    
    Reviewed-by: Richard Henderson <rth@twiddle.net>
    Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
  19. @aurel32

    target-mips: use DSP unions for reduction add instructions

    aurel32 authored
    Reviewed-by: Richard Henderson <rth@twiddle.net>
    Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
  20. @aurel32

    target-mips: use DSP unions for unary DSP operators

    aurel32 authored
    This allow to reduce the number of macros.
    
    Reviewed-by: Richard Henderson <rth@twiddle.net>
    Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
  21. @aurel32

    target-mips: use DSP unions for binary DSP operators

    aurel32 authored
    This allow to reduce the number of macros.
    
    Reviewed-by: Richard Henderson <rth@twiddle.net>
    Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
  22. @aurel32

    target-mips: add unions to access DSP elements

    aurel32 authored
    Instead of playing with bit shifting, add two unions (one for 32-bit
    values, one for 64-bit ones) to access all the DSP elements with the
    correct type.
    
    This make the code easier to read and less error prone, and allow GCC
    to vectorize the code in some cases.
    
    Reviewed-by: Eric Johnson <ericj@mips.com>
    Reviewed-by: Richard Henderson <rth@twiddle.net>
    Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
  23. @aurel32

    target-mips: generate a reserved instruction exception on CPU without…

    aurel32 authored
    … DSP
    
    On CPU without DSP ASE support, a reserved instruction exception (instead of
    a DSP ASE sate disabled) should be generated.
    
    Reviewed-by: Richard Henderson <rth@twiddle.net>
    Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
  24. @aurel32

    target-mips: copy insn_flags in DisasContext

    aurel32 authored
    Copy insn_flags in DisasContext to avoid passing a CPUMIPSState pointer
    to subroutines, as suggested by Richard Henderson. Change subroutines to
    use this new field and remove the first argument.
    
    Reviewed-by: Richard Henderson <rth@twiddle.net>
    Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
  25. @aurel32

    target-mips: fix DSP loads with rd = 0

    aurel32 authored
    When rd is 0, which still need to do the actually load to possibly
    generate a TLB exception.
    
    Reviewed-by: Eric Johnson <ericj@mips.com>
    Reviewed-by: Richard Henderson <rth@twiddle.net>
    Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Commits on Jan 30, 2013
  1. Merge remote-tracking branch 'pmaydell/arm-devs.next' into staging

    Anthony Liguori authored
    # By Christoffer Dall (1) and Peter Maydell (1)
    # Via Peter Maydell
    * pmaydell/arm-devs.next:
      hw/vexpress: Use correct HBI (board model number) for vexpress-a15
      hw/arm_sysctl: Clear sysctl cfgctrl start bit
  2. Merge remote-tracking branch 'stefanha/trivial-patches' into staging

    Anthony Liguori authored
    # By Markus Armbruster (12) and others
    # Via Stefan Hajnoczi
    * stefanha/trivial-patches:
      qmp-commands.hx: s/tray-open/tray_open/ to match qapi schema
      tests: Fix {rtc, m48t59}-test build on illumos
      qemu-pixman.h: Avoid mutual inclusion loop with console.h
      qemu-ga: Fix unchecked strdup() by converting to g_strdup()
      qapi: Fix unchecked strdup() by converting to g_strdup()
      libcacard: Fix unchecked strdup() by converting to g_strdup()
      qemu-log: Plug trivial memory leak in cpu_set_log_filename()
      qemu-log: Fix unchecked strdup() by converting to g_strdup()
      virtfs-proxy-helper: Fix unchecked strdup() by conv. to g_strdup()
      spice: Fix unchecked strdup() by converting to g_strdup()
      readline: Fix unchecked strdup() by converting to g_strdup()
      hw/9pfs: Fix unchecked strdup() by converting to g_strdup()
      g_strdup(NULL) returns NULL; simplify
      g_malloc(0) and g_malloc0(0) return NULL; simplify
      xilinx_axidma: Fix debug mode compile messages
      cadence_gem: Debug mode compile fixes
      cadence_ttc: Debug mode compile fixes
      vnc: Clean up vncws_send_handshake_response()
  3. Merge remote-tracking branch 'afaerber-or/prep-up' into staging

    Anthony Liguori authored
    # By Andreas Färber
    # Via Andreas Färber
    * afaerber-or/prep-up:
      prep: Move PReP machine to hw/ppc/
      prep_pci: Convert to QOM realizefn
      prep_pci: Create PCIBus and PCIDevice in-place
  4. Merge remote-tracking branch 'agraf/s390-for-upstream' into staging

    Anthony Liguori authored
    # By Cornelia Huck (13) and others
    # Via Alexander Graf
    * agraf/s390-for-upstream:
      s390: Drop set_bit usage in virtio_ccw.
      s390: css error codes.
      s390: Use s390_cpu_physical_memory_map for tpi.
      sclpconsole: Don't instantiate sclpconsole with -nodefaults
      s390: Add s390-ccw-virtio machine.
      s390-virtio: Check for NULL device in reset hypercall
      s390: Move hw files to hw/s390x
      virtio-s390: add a reset function to virtio-s390 devices
      s390: Make typeinfo const
      s390: Add new channel I/O based virtio transport.
      s390-virtio: Factor out some initialization code.
      s390: Wire up channel I/O in kvm.
      s390: Virtual channel subsystem support.
      s390: Add channel I/O instructions.
      s390: I/O interrupt and machine check injection.
      s390: Channel I/O basic definitions.
      s390: Add mapping helper functions.
      s390: Lowcore mapping helper.
      s390: Add default support for SCLP console
  5. @pm215

    target-arm: Rename CPU types

    authored pm215 committed
    In the initial conversion of CPU models to QOM types, model names were
    mapped 1:1 to type names. As a side effect this gained us a type "any",
    which is now a device.
    
    To avoid "-device any" silliness and to pave the way for compiling
    multiple targets into one executable, adopt a <name>-<arch>-cpu scheme.
    This leads to names like arm926-arm-cpu but is easiest to handle.
    
    No functional changes for -cpu arguments or -cpu ? output.
    
    Suggested-by: Eduardo Habkost <ehabkost@redhat.com>
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Signed-off-by: Andreas Färber <afaerber@suse.de>
    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
  6. @pm215

    target-arm: Fix TCG temp leaks for WI and UNDEF VFP sysreg writes

    pm215 authored
    Fix a leak of a TCG temporary in code paths for VFP system register
    writes for cases which UNDEF or are write-ignored.
    
    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
  7. @pm215

    hw/vexpress: Use correct HBI (board model number) for vexpress-a15

    pm215 authored
    The vexpress-a15 QEMU model is supposed to be a V2P-CA15; the HBI
    (a kind of board model number) for this coretile is 237, not 217.
    
    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
  8. @chazy @pm215

    hw/arm_sysctl: Clear sysctl cfgctrl start bit

    chazy authored pm215 committed
    The start bit should only be set to indicate that a function call is
    underway, right now.  When done with function, clear it.
    
    Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
  9. qmp-commands.hx: s/tray-open/tray_open/ to match qapi schema

    Michal Privoznik authored Stefan Hajnoczi committed
    Currently, we are using 'tray_open' in QMP and 'tray-open' in
    HMP. However, the QMP documentation was mistakenly using the
    HMP version.
    
    Signed-off-by: Michal Privoznik <mprivozn@redhat.com>
    Reviewed-by: Eric Blake <eblake@redhat.com>
    Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
  10. tests: Fix {rtc, m48t59}-test build on illumos

    authored Stefan Hajnoczi committed
    Struct tm does not have tm_gmtoff field on illumos.
    Fix the build by not zero-initializing these fields on Solaris.
    
    Cc: qemu-stable@nongnu.org
    Signed-off-by: Andreas Färber <andreas.faerber@web.de>
    Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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