From 1d97af092a1726664d946ef054c982db288cae0f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Andreas=20F=C3=A4rber?= <andreas.faerber@web.de>
Date: Fri, 25 Nov 2011 02:14:28 +0100
Subject: [PATCH] target-rl78: Implement MOVW sfrp,#word
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This is the first instruction of GCC-generated _start, thus starting to
make target-rl78 "usable".

Signed-off-by: Andreas Färber <andreas.faerber@web.de>
---
 target-78k0/translate.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/target-78k0/translate.c b/target-78k0/translate.c
index 4fe598233c..cdb4c325fb 100644
--- a/target-78k0/translate.c
+++ b/target-78k0/translate.c
@@ -82,7 +82,23 @@ static int rl78_disas_mov_addr16_byte(RL78CPU *cpu, uint8_t opcode, DisasContext
     return 4;
 }
 
+/* MOVW sfrp,#word */
+static int rl78_disas_movw_sfrp_word(RL78CPU *cpu, uint8_t opcode, DisasContext *s)
+{
+    uint8_t sfrp = cpu_ldub_code(&cpu->env, s->pc + 1) & ~0x1;
+    uint16_t data = cpu_lduw_code(&cpu->env, s->pc + 2);
+    TCGv addr = tcg_const_tl(0xFFF00 | sfrp);
+    TCGv val = tcg_const_tl(data);
+
+    LOG_ASM("MOVW %02" PRIx8 "H, #%04" PRIx16 "H\n", sfrp, data);
+    tcg_gen_qemu_st16(val, addr, 0);
+    tcg_temp_free(addr);
+    tcg_temp_free(val);
+    return 4;
+}
+
 static const OpcodeHandler rl78_1st_map[256] = {
+    [0xCB] = rl78_disas_movw_sfrp_word,
     [0xCF] = rl78_disas_mov_addr16_byte,
 };