Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Already on GitHub? Sign in to your account

create a mode to recognize verilog ( a hardware description language ) #494

Closed
akashmathew opened this Issue Nov 5, 2011 · 2 comments

Comments

Projects
None yet
3 participants

hi,
is it possible to create a mode in ace to recognize verilog ( a hardware description language ),
i am trying to make a file editor for verilog using ace. I want it to do highlighting an find syntax error.
pls help :)
thanks in advance
akash
@gissues:{"order":34.78260869565247,"status":"backlog"}

Contributor

fjakobs commented Nov 8, 2011

Sure. that should not be too hard. Just take any of the existing modes and the wiki article https://github.com/ajaxorg/ace/wiki/Creating-or-Extending-an-Edit-Mode

Member

nightwing commented Mar 28, 2013

Now creating new modes is very easy, they can be automatically converted from textmate and there are several verilog textmate bundles available. If you still need this, please pick one of them, and i'll add it to ace.

@nightwing nightwing closed this Mar 28, 2013

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment