diff --git a/AlifSemiconductor.AzureRTOS.pdsc b/AlifSemiconductor.AzureRTOS.pdsc new file mode 100644 index 0000000..9dca4f4 --- /dev/null +++ b/AlifSemiconductor.AzureRTOS.pdsc @@ -0,0 +1,1899 @@ + + + + AlifSemiconductor + AzureRTOS + AzureRTOS support for Alif Semiconductor M55_HP and M55_HE device + https://www.alifsemi.com/ + support@alifsemi.com + + + + + + - update sample codes + - Add SD card support + + + - Fix QA findings + + + - Update NETX Ethernet Driver + - Add USBX DCD support + - Update test application for Camera, I2S, CRC and SPI based ThermoMeter + - Add test applications for Comparator, MRAM Flash, HWSEM and Video + - Add USBX DCD support + + + - Add NETX Ethernet Driver + - Add Cloud Support packages and examples + - Add THREADX based sample device test applications + + + - Add Modem iperf demo app + - update nx utility + + + Grouped NETX Demo App + + + Added support for AzureRTOS NETX + updated URL + Move sample application as templates + + + Added support for AzureRTOS FILEX + Fixed some tags indentation + Moved AzureRTOS THREADX Code into separate folder + Fixed some Schemas validity error + + + Initial Release + + + + + Alifsemiconductor + AzureRTOS + + + + + + + + + + + + + + + + + + + + + + + + + + Alif Semiconductor Armv8-M architecture based device + + + + + Components required for AzureRTOS + + + + + + + + Components required for AzureRTOS FILEX + + + + + + Components required for AzureRTOS FILEX SD Driver + + + + + Components required for AzureRTOS NETX + + + + + + Components required for AzureRTOS USBX + + + + + + + + + + + + + + + + Alif Semiconductor port of AzureRTOS for its M55 device + + + Release version 6.1.3 + + // enabling global pre include + #define TX_SINGLE_MODE_SECURE + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + High-performance, FAT-compatible file system + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + SD card driver for Alif Semiconductor Soc + + + + + + + + + + + + + + + + High-performance implementation of TCP/IP protocol standards + + // enabling global pre include + #define NX_PACKET_ALIGNMENT 8 + #define NX_DHCP_CLIENT_USER_CREATE_PACKET_POOL + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Alif Semiconductor Ethernet Driver + + #define RTE_Drivers_ETH 1 + + + + + + + + + + + + + + + Alif Semiconductor IoT Support + + // enabling global pre include + #define NX_AZURE_DISABLE_IOT_SECURITY_MODULE + #define NX_DNS_CLIENT_USER_CREATE_PACKET_POOL + #define NX_ENABLE_EXTENDED_NOTIFY_SUPPORT + #define NX_SECURE_ENABLE + #define NXD_MQTT_CLOUD_ENABLE + #define NX_DNS_MAX_RETRIES 100 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + High-performance, USB Stack for embedded device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + High-performance, USB Stack for embedded device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + High-performance, USB Stack for embedded device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/FILEX/driver/fx_sd_driver.h b/FILEX/driver/fx_sd_driver.h new file mode 100644 index 0000000..9f74570 --- /dev/null +++ b/FILEX/driver/fx_sd_driver.h @@ -0,0 +1,39 @@ +/* Copyright (C) 2022 Alif Semiconductor - All Rights Reserved. + * Use, distribution and modification of this code is permitted under the + * terms stated in the Alif Semiconductor Software License Agreement + * + * You should have received a copy of the Alif Semiconductor Software + * License Agreement with this file. If not, please write to: + * contact@alifsemi.com, or visit: https://alifsemi.com/license + * + */ + +/**************************************************************************//** + * @file fx_sd_driver.h + * @author Deepak Kumar + * @email deepak@alifsemi.com + * @version V0.0.1 + * @date 28-Nov-2022 + * @brief SD Driver FileX entry APIs. + * @bug None. + * @Note None + ******************************************************************************/ + +#ifndef FX_SD_DRIVER_H +#define FX_SD_DRIVER_H + +#include "fx_api.h" +#include "sd.h" + +#ifdef __cplusplus +extern "C" +{ +#endif + +VOID _fx_sd_driver(FX_MEDIA *media_ptr); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/FILEX/driver/inc/fx_sd_driver_private.h b/FILEX/driver/inc/fx_sd_driver_private.h new file mode 100644 index 0000000..4f07e2c --- /dev/null +++ b/FILEX/driver/inc/fx_sd_driver_private.h @@ -0,0 +1,39 @@ +/* Copyright (C) 2022 Alif Semiconductor - All Rights Reserved. + * Use, distribution and modification of this code is permitted under the + * terms stated in the Alif Semiconductor Software License Agreement + * + * You should have received a copy of the Alif Semiconductor Software + * License Agreement with this file. If not, please write to: + * contact@alifsemi.com, or visit: https://alifsemi.com/license + * + */ + +/**************************************************************************//** + * @file fx_sd_driver_private.h + * @author Deepak Kumar + * @email deepak@alifsemi.com + * @version V0.0.1 + * @date 28-Nov-2022 + * @brief SD Driver FileX entry APIs. + * @bug None. + * @Note None + ******************************************************************************/ + +#ifndef FX_SD_DRIVER_PRIVATE_H +#define FX_SD_DRIVER_PRIVATE_H + +#include "fx_api.h" + +#ifdef __cplusplus +extern "C" +{ +#endif + +UINT _fx_partition_offset_calculate(void *partition_sector, UINT partition, + ULONG *partition_start, ULONG *partition_size); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/FILEX/driver/inc/sd.h b/FILEX/driver/inc/sd.h new file mode 100644 index 0000000..168d5e6 --- /dev/null +++ b/FILEX/driver/inc/sd.h @@ -0,0 +1,143 @@ +/* Copyright (C) 2022 Alif Semiconductor - All Rights Reserved. + * Use, distribution and modification of this code is permitted under the + * terms stated in the Alif Semiconductor Software License Agreement + * + * You should have received a copy of the Alif Semiconductor Software + * License Agreement with this file. If not, please write to: + * contact@alifsemi.com, or visit: https://alifsemi.com/license + * + */ + +/**************************************************************************//** + * @file sd.h + * @author Deepak Kumar + * @email deepak@alifsemi.com + * @version V0.0.1 + * @date 28-Nov-2022 + * @brief exposed SD Driver variables and APIs. + * @bug None. + * @Note None + ******************************************************************************/ +#ifndef _SD_H_ +#define _SD_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "sd_core.h" + +//#define PRINTF_DEBUG +#define SD_4BIT_MODE + +/** + * @brief SD driver status enum definition + */ +typedef enum{ + SD_OK, + SD_HOST_INIT_ERR, + SD_CARD_INIT_ERR, + SD_RD_ERR, + SD_WR_ERR, + SD_TIMEOUT_ERR +}sd_drv_status_t; + +/** + * @brief SD Card status enum definition + */ +typedef enum{ + SD_INIT = -1, + SD_IDLE, + SD_READY, + SD_IDENT, + SD_STBY, + SD_TRAN, + SD_DATA, + SD_RCV, + SD_PRG, + SD_DIS, + SD_RESV +}sd_status_t; + +/** + * @brief SD Card Information Structure definition + */ +typedef struct{ + uint32_t CardType; /*!< Specifies the card Type */ + uint32_t CardVersion; /*!< Specifies the card version */ + uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */ + uint32_t SectorCount; /*!< Specifies the Card Capacity in blocks */ + uint32_t SectorSize; /*!< Specifies one block size in bytes */ + uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */ + uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */ + uint32_t BusSpeed; /*!< Clock */ + uint16_t Class; /*!< Specifies the class of the card class */ + uint8_t isCardPresent; /*!< is card present flag */ +}SD_CardInfoTypeDef; + +/** + * @brief SD command structure definition + */ +typedef struct{ + uint32_t arg; /*!< SD Command Argument */ + uint16_t xfer_mode; /*!< SD Command transfer mode */ + uint8_t cmdidx; /*!< SD Command index */ +}SD_CmdTypeDef; + +/** + * @brief Global SD Handle Information Structure definition + */ +typedef struct{ + SD_TypeDef *sd_hc; /*!< SD controller registers base address */ + SD_CmdTypeDef sd_cmd; /*!< SD Command info */ + SD_CardInfoTypeDef SdCard; /*!< SD Card information */ + uint32_t HC_Caps; /*!< Host Controller capabilities */ + __IO uint32_t Context; /*!< SD transfer context */ + __IO uint32_t ErrorCode; /*!< SD Card Error codes */ + uint32_t CSD[4]; /*!< SD card specific data table */ + uint32_t CID[4]; /*!< SD card identification number table */ + sd_status_t State; /*!< SD card State */ + uint16_t HC_Version; /*!< Host controller version */ + uint8_t BusWidth; /*!< 1Bit, 4Bit, 8Bit Mode */ +}SD_HandleTypeDef; + +/** + * @brief Disk IO Driver structure definition + */ +typedef struct +{ + sd_drv_status_t (*disk_initialize) (uint8_t); /*!< Initialize Disk Drive */ + sd_status_t (*disk_status) (SD_HandleTypeDef *); /*!< Get Disk Status */ + sd_drv_status_t (*disk_read) (uint32_t, uint16_t, volatile unsigned char *); /*!< Read Sector(s) */ + sd_drv_status_t (*disk_write) (uint32_t, uint32_t, volatile unsigned char *); /*!< Write Sector(s) */ +}Diskio_TypeDef; + +extern const Diskio_TypeDef SD_Driver; + +/* SD Driver function forward declaration */ +sd_status_t SD_status(SD_HandleTypeDef *); +sd_drv_status_t SD_init(uint8_t); +sd_drv_status_t SD_host_init(SD_HandleTypeDef *); +sd_drv_status_t SD_card_init(SD_HandleTypeDef *); +uint8_t getCmdRspType(uint8_t); +hc_status_t HC_SendCMD(SD_HandleTypeDef *, SD_CmdTypeDef *); +hc_status_t HC_reset(SD_HandleTypeDef *, uint8_t); +hc_status_t HC_reset(SD_HandleTypeDef *, uint8_t); +hc_status_t HC_SetBusPower(SD_HandleTypeDef *, uint8_t); +hc_status_t HC_SetClkFreq(SD_HandleTypeDef *, uint16_t); +hc_status_t HC_IdentifyCard(SD_HandleTypeDef *); +hc_status_t HC_GetCardIFCond(SD_HandleTypeDef *); +hc_status_t HC_GetCardOPCond(SD_HandleTypeDef *); +hc_status_t HC_GetCardCID(SD_HandleTypeDef *); +hc_status_t HC_GetCardCSD(SD_HandleTypeDef *); +sd_drv_status_t SD_write(uint32_t, uint32_t, volatile unsigned char *); +sd_drv_status_t SD_read(uint32_t, uint16_t, volatile unsigned char *); +sd_drv_status_t SDErrorHandler(); +hc_status_t HC_ConfigDMA(SD_HandleTypeDef *, uint8_t); +hc_status_t HC_SetBus_Width(SD_HandleTypeDef *, uint8_t); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/FILEX/driver/inc/sd_core.h b/FILEX/driver/inc/sd_core.h new file mode 100644 index 0000000..8cfa306 --- /dev/null +++ b/FILEX/driver/inc/sd_core.h @@ -0,0 +1,333 @@ +/* Copyright (C) 2022 Alif Semiconductor - All Rights Reserved. + * Use, distribution and modification of this code is permitted under the + * terms stated in the Alif Semiconductor Software License Agreement + * + * You should have received a copy of the Alif Semiconductor Software + * License Agreement with this file. If not, please write to: + * contact@alifsemi.com, or visit: https://alifsemi.com/license + * + */ + +/**************************************************************************//** + * @file sd_core.h + * @author Deepak Kumar + * @email deepak@alifsemi.com + * @version V0.0.1 + * @date 28-Nov-2022 + * @brief SD Host Controller Register mapping. + * @bug None. + * @Note None + ******************************************************************************/ + +#ifndef _SD_CORE_H_ +#define _SD_CORE_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes */ +#include "RTE_Device.h" +#include "RTE_Components.h" +#include CMSIS_device_header +#include "stdint.h" + +/** + * @brief SD host Interface register mapping + */ +typedef struct +{ + __IO uint32_t SDMASA; /* SDMASA_R, Address offset: 0x00 */ + __IO uint16_t BLOCK_SIZE; /* BLOCK_SIZE_R Address offset: 0x04 */ + __IO uint16_t BLOCKCOUNT; /* BLOCKCOUNT_R Address offset: 0x06 */ + __IO uint32_t ARG; /* SDIO argument register, Address offset: 0x08 */ + __IO uint16_t XFER_MODE; /* XFER_MODE_R */ + __IO uint16_t CMD; /* SDIO command register, Address offset: 0x0C */ + __IO const uint32_t RESP01; /* SDIO response 01 register, Address offset: 0x10 */ + __IO const uint32_t RESP23; /* SDIO response 23 register, Address offset: 0x14 */ + __IO const uint32_t RESP45; /* SDIO response 45 register, Address offset: 0x18 */ + __IO const uint32_t RESP67; /* SDIO response 67 register, Address offset: 0x1C */ + __IO uint32_t BUF_DATA; + __IO const uint32_t PSTATE; + __IO uint8_t HOST_CTRL1; + __IO uint8_t PWR_CTRL; /* SDIO power control register, Address offset: 0x00 */ + __IO uint8_t BGAP_CTRL; + __IO uint8_t WUP_CTRL; + __IO uint16_t CLK_CTRL; /* SDI clock control register, Address offset: 0x04 */ + __IO uint8_t TOUT_CTRL; + __IO uint8_t SW_RST; + __IO uint16_t NORMAL_INT_STAT; + __IO uint16_t ERROR_INT_STAT; + __IO uint16_t NORMAL_INT_STAT_EN; + __IO uint16_t ERROR_INT_STAT_EN; + __IO uint16_t NORMAL_INT_SIGNAL_EN; + __IO uint16_t ERROR_INT_SIGNAL_EN; + __IO uint16_t AUTO_CMD_STAT; + __IO uint16_t HOST_CTRL2; + __IO uint32_t CAPABILITIES1; + __IO uint32_t CAPABILITIES2; + __IO uint32_t CURR_CAPABILITIES1; + __IO uint32_t CURR_CAPABILITIES2; + __IO uint16_t FORCE_AUTO_CMD_STAT; + __IO uint16_t FORCE_ERROR_INT_STAT; + __IO uint32_t ADMA_ERR_STAT; + __IO uint32_t ADMA_SA_LOW; + __IO uint32_t ADMA_SA_HIGH; + __IO uint16_t PRESET_INIT; + __IO uint16_t PRESET_DS; + __IO uint16_t PRESET_HS; + __IO uint16_t PRESET_SDR12; + __IO uint16_t PRESET_SDR25; + __IO uint16_t PRESET_SDR50; + __IO uint16_t PRESET_SDR104; + __IO uint16_t PRESET_DDR50; +}SDIO_TypeDef; + +#define SD_TypeDef SDIO_TypeDef +#define SDIO ((SDIO_TypeDef *) SDMMC_BASE) +#define HC_VERSION_REG (SDMMC_BASE + 0xFE) +#define HC_VERSION_REG_MASK 0xFFFF + +/** + * @brief Host controller driver status enum definition + */ +typedef enum{ + HC_OK, + HC_ERR, + HC_SD_INV_STATE +}hc_status_t; + +/* SDMMC Device ID Constnat */ +#define SD_DEV_ID 1 + +/* Host Controller Specific Constant */ +#define HC_SPEC_V3 0x0002U /**< HC spec version 3 */ +#define HC_SPEC_V2 0x0001U /**< HC spec version 2 */ +#define HC_SPEC_V1 0x0000U /**< HC spec version 1 */ +#define HC_SPEC_VER_MASK 0x00FFU /**< Host Specification version mask */ + +/* Software Reset Register */ +#define SD_SW_RST_ALL_Pos 0 +#define SD_SW_RST_ALL_MASK (0<