From 29974d82b7237d6a3a4e0fac0b3da1039bd6da2d Mon Sep 17 00:00:00 2001 From: "Ong, Lean Kim" Date: Fri, 8 Dec 2023 08:14:32 +0800 Subject: [PATCH] make f2s bridge as axi4 instead of ace-lite Signed-off-by: Ong, Lean Kim --- sm_soc_devkit_ghrd/hps_subsys/construct_subsys_hps.tcl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sm_soc_devkit_ghrd/hps_subsys/construct_subsys_hps.tcl b/sm_soc_devkit_ghrd/hps_subsys/construct_subsys_hps.tcl index 7ec40ac..858b8d0 100755 --- a/sm_soc_devkit_ghrd/hps_subsys/construct_subsys_hps.tcl +++ b/sm_soc_devkit_ghrd/hps_subsys/construct_subsys_hps.tcl @@ -65,7 +65,7 @@ add_component_param "intel_agilex_5_soc agilex_hps f2sdram_address_width $f2sdram_addr_width f2s_data_width $f2s_data_width f2s_address_width $f2h_addr_width - f2s_mode acelite + f2s_mode axi4 LWH2F_Width $lwh2f_width LWH2F_Address_Width $lwh2f_addr_width EMIF_AXI_Enable $hps_emif_en