From f4b0169f010691b0a6ca25d893d5851b6a727e95 Mon Sep 17 00:00:00 2001 From: y Date: Fri, 8 Sep 2023 09:25:31 +0800 Subject: [PATCH] New makefile flow -remove the extra tcl file Signed-off-by: y --- sm_soc_devkit_ghrd/create_ghrd_qsys.tcl | 26 +- .../agilex_hps_io48_delay_chain_solver.tcl | 48 -- .../agilex_hps_parameter_solver.tcl | 73 --- .../hps_subsys/agilex_hps_pinmux_solver.tcl | 510 ------------------ sm_soc_devkit_ghrd/hps_subsys/agilex_io48.tcl | 191 ------- .../hps_subsys/arguments_solver.tcl | 424 --------------- .../hps_subsys/design_config.tcl | 106 ---- sm_soc_devkit_ghrd/hps_subsys/utils.tcl | 332 ------------ .../agilex_hps_io48_delay_chain_solver.tcl | 48 -- .../agilex_hps_parameter_solver.tcl | 73 --- .../jtag_subsys/agilex_hps_pinmux_solver.tcl | 510 ------------------ .../jtag_subsys/agilex_io48.tcl | 191 ------- .../jtag_subsys/arguments_solver.tcl | 424 --------------- .../jtag_subsys/design_config.tcl | 106 ---- sm_soc_devkit_ghrd/jtag_subsys/utils.tcl | 332 ------------ sm_soc_devkit_ghrd/peripheral_subsys/Makefile | 2 +- .../agilex_hps_io48_delay_chain_solver.tcl | 48 -- .../agilex_hps_parameter_solver.tcl | 73 --- .../agilex_hps_pinmux_solver.tcl | 510 ------------------ .../peripheral_subsys/agilex_io48.tcl | 191 ------- .../peripheral_subsys/arguments_solver.tcl | 424 --------------- .../peripheral_subsys/design_config.tcl | 106 ---- .../peripheral_subsys/utils.tcl | 332 ------------ 23 files changed, 14 insertions(+), 5066 deletions(-) delete mode 100755 sm_soc_devkit_ghrd/hps_subsys/agilex_hps_io48_delay_chain_solver.tcl delete mode 100755 sm_soc_devkit_ghrd/hps_subsys/agilex_hps_parameter_solver.tcl delete mode 100755 sm_soc_devkit_ghrd/hps_subsys/agilex_hps_pinmux_solver.tcl delete mode 100755 sm_soc_devkit_ghrd/hps_subsys/agilex_io48.tcl delete mode 100755 sm_soc_devkit_ghrd/hps_subsys/arguments_solver.tcl delete mode 100755 sm_soc_devkit_ghrd/hps_subsys/design_config.tcl delete mode 100755 sm_soc_devkit_ghrd/hps_subsys/utils.tcl delete mode 100755 sm_soc_devkit_ghrd/jtag_subsys/agilex_hps_io48_delay_chain_solver.tcl delete mode 100755 sm_soc_devkit_ghrd/jtag_subsys/agilex_hps_parameter_solver.tcl delete mode 100755 sm_soc_devkit_ghrd/jtag_subsys/agilex_hps_pinmux_solver.tcl delete mode 100755 sm_soc_devkit_ghrd/jtag_subsys/agilex_io48.tcl delete mode 100755 sm_soc_devkit_ghrd/jtag_subsys/arguments_solver.tcl delete mode 100755 sm_soc_devkit_ghrd/jtag_subsys/design_config.tcl delete mode 100755 sm_soc_devkit_ghrd/jtag_subsys/utils.tcl delete mode 100755 sm_soc_devkit_ghrd/peripheral_subsys/agilex_hps_io48_delay_chain_solver.tcl delete mode 100755 sm_soc_devkit_ghrd/peripheral_subsys/agilex_hps_parameter_solver.tcl delete mode 100755 sm_soc_devkit_ghrd/peripheral_subsys/agilex_hps_pinmux_solver.tcl delete mode 100755 sm_soc_devkit_ghrd/peripheral_subsys/agilex_io48.tcl delete mode 100755 sm_soc_devkit_ghrd/peripheral_subsys/arguments_solver.tcl delete mode 100755 sm_soc_devkit_ghrd/peripheral_subsys/design_config.tcl delete mode 100755 sm_soc_devkit_ghrd/peripheral_subsys/utils.tcl diff --git a/sm_soc_devkit_ghrd/create_ghrd_qsys.tcl b/sm_soc_devkit_ghrd/create_ghrd_qsys.tcl index 4f38ffe..5f15d3e 100755 --- a/sm_soc_devkit_ghrd/create_ghrd_qsys.tcl +++ b/sm_soc_devkit_ghrd/create_ghrd_qsys.tcl @@ -25,19 +25,19 @@ source ./utils.tcl package require -exact qsys 19.1 -if {$fpga_peripheral_en == 1} { -source ./peripheral_subsys/construct_subsys_peripheral.tcl -reload_ip_catalog -} - -if {$jtag_ocm_en == 1} { -source ./jtag_subsys/construct_subsys_jtag_master.tcl -reload_ip_catalog -} -if {$hps_en == 1} { -source ./hps_subsys/construct_subsys_hps.tcl -reload_ip_catalog -} +#if {$fpga_peripheral_en == 1} { +#source ./peripheral_subsys/construct_subsys_peripheral.tcl +#reload_ip_catalog +#} +# +#if {$jtag_ocm_en == 1} { +#source ./jtag_subsys/construct_subsys_jtag_master.tcl +#reload_ip_catalog +#} +#if {$hps_en == 1} { +#source ./hps_subsys/construct_subsys_hps.tcl +#reload_ip_catalog +#} create_system $qsys_name diff --git a/sm_soc_devkit_ghrd/hps_subsys/agilex_hps_io48_delay_chain_solver.tcl b/sm_soc_devkit_ghrd/hps_subsys/agilex_hps_io48_delay_chain_solver.tcl deleted file mode 100755 index ed388ae..0000000 --- a/sm_soc_devkit_ghrd/hps_subsys/agilex_hps_io48_delay_chain_solver.tcl +++ /dev/null @@ -1,48 +0,0 @@ -#**************************************************************************** -# -# SPDX-License-Identifier: MIT-0 -# Copyright(c) 2019-2020 Intel Corporation. -# -#**************************************************************************** -# -# This file means to solve chain delay assignment to all IO48 pins -# -#**************************************************************************** - -# Initialize IO48 chain delay assignment based on port properties -set io48_output_pin [list "JTAG:TDO" "SDMMC:CCLK" "USB*:STP" "EMAC*:TX_CLK" "EMAC*:TX_CTL" "EMAC*:TXD0" "EMAC*:TXD1" "EMAC*:TXD2" "EMAC*:TXD3" "MDIO*:MDC" \ - "SPIM0:CLK" "SPIM0:MOSI" "SPIM0:SS0_N" "SPIS0:MISO" "UART0:TX" "UART0:RTS_N" "NAND:ALE" "NAND:CE_N" "NAND:CLE" "NAND:WE_N" "NAND:RE_N" "NAND:WP_N" \ - ] -set io48_input_pin [list "JTAG:TCK" "JTAG:TMS" "JTAG:TDI" "USB*:CLK" "USB*:DIR" "USB*:NXT" "EMAC*:RX_CLK" "EMAC*:RX_CTL" "EMAC*:RXD0" "EMAC*:RXD1" "EMAC*:RXD2" "EMAC*:RXD3" \ - "SPIM0:MISO" "SPIS0:CLK" "SPIS0:MOSI" "SPIS0:SS0_N" "UART0:RX" "UART0:CTS_N" "NAND:RB" "HPS_OSC_CLK" "TRACE:CLK" "TRACE:D0" "TRACE:D1" "TRACE:D2" "TRACE:D3" \ - "TRACE:D10" "TRACE:D9" "TRACE:D8" "TRACE:D7" "TRACE:D6" "TRACE:D15" "TRACE:D14" "TRACE:D13" "TRACE:D12" "TRACE:D11" \ - ] -set io48_bidirect_pin [list "SDMMC:CMD" "SDMMC:D0" "SDMMC:D1" "SDMMC:D2" "SDMMC:D3" "SDMMC:D4" "SDMMC:D5" "SDMMC:D6" "SDMMC:D7" "I2CEMAC*:SDA" "I2CEMAC*:SCL" \ - "USB*:DATA0" "USB*:DATA1" "USB*:DATA2" "USB*:DATA3" "USB*:DATA4" "USB*:DATA5" "USB*:DATA6" "USB*:DATA7" "I2C*:SDA" "I2C*:SCL" \ - "MDIO*:MDIO" "NAND:ADQ0" "NAND:ADQ1" "NAND:ADQ2" "NAND:ADQ3" "NAND:ADQ4" "NAND:ADQ5" "NAND:ADQ6" "NAND:ADQ7" "NAND:ADQ8" "NAND:ADQ9" \ - "NAND:ADQ10" "NAND:ADQ11" "NAND:ADQ12" "NAND:ADQ13" "NAND:ADQ14" "NAND:ADQ15" "GPIO" \ - ] - -set io48_pinmux_assignment [list $io48_q1_assignment $io48_q2_assignment $io48_q3_assignment $io48_q4_assignment] -set count 0 -array set output_dly_chain_io48 [] -array set input_dly_chain_io48 [] -foreach io_quadrant $io48_pinmux_assignment { - foreach io_pin $io_quadrant { - if [string match [lindex $io48_output_pin 3] $io_pin] { - set output_dly_chain_io48($count) 45 - set input_dly_chain_io48($count) 0 - } elseif [string match [lindex $io48_input_pin 3] $io_pin] { - set output_dly_chain_io48($count) 0 - set input_dly_chain_io48($count) 0 - } elseif [string match [lindex $io48_bidirect_pin 3] $io_pin] { - set output_dly_chain_io48($count) 0 - set input_dly_chain_io48($count) 0 - } else { - set output_dly_chain_io48($count) 0 - set input_dly_chain_io48($count) 0 - } - incr count - } -} - diff --git a/sm_soc_devkit_ghrd/hps_subsys/agilex_hps_parameter_solver.tcl b/sm_soc_devkit_ghrd/hps_subsys/agilex_hps_parameter_solver.tcl deleted file mode 100755 index c693e8e..0000000 --- a/sm_soc_devkit_ghrd/hps_subsys/agilex_hps_parameter_solver.tcl +++ /dev/null @@ -1,73 +0,0 @@ -#**************************************************************************** -# -# SPDX-License-Identifier: MIT-0 -# Copyright(c) 2019-2020 Intel Corporation. -# -#**************************************************************************** -# -# This file means to solve AGILEX HPS parameters value with each related argument passed in -# -#**************************************************************************** - -#set h2f_width $h2f_width -#if {$h2f_width == 32} { -# set s2f_width 1 -#} elseif {$h2f_width == 64} { -# set s2f_width 2 -#} elseif {$h2f_width == 128} { -# set s2f_width 3 -#} else { -# set s2f_width 0 -#} - -#set f2s_width $f2h_width -#if {$f2h_width > 0} { -# set f2s_width 3 -#} else { -# set f2s_width 0 -#} - -#set lwh2f_width $lwh2f_width -#if {$lwh2f_width > 0} { -# set lwh2f_width 1 -#} else { -# set lwh2f_width 0 -#} - -# H2F IRQ enablement -set h2f_emac0_irq_en 0 -set h2f_emac1_irq_en 0 -set h2f_emac2_irq_en 0 -set h2f_gpio_irq_en 0 -set h2f_i2cemac0_irq_en 0 -set h2f_i2cemac1_irq_en 0 -set h2f_i2cemac2_irq_en 0 -set h2f_i2c0_irq_en 0 -set h2f_i2c1_irq_en 0 -set h2f_i3c0_irq_en 0 -set h2f_i3c1_irq_en 0 -set h2f_nand_irq_en 0 -set h2f_sdmmc_irq_en 0 -set h2f_spim0_irq_en 0 -set h2f_spim1_irq_en 0 -set h2f_spis0_irq_en 0 -set h2f_spis1_irq_en 0 -set h2f_uart0_irq_en 0 -set h2f_uart1_irq_en 0 -set h2f_usb0_irq_en 0 -set h2f_usb1_irq_en 0 - - -# Validation of parameter combinations correctness -#if {$h2f_f2h_loopback_en == 1} { -# if {$f2h_addr_width > $h2f_addr_width} { -# puts "Error: FPGA-to-SoC Bridge address range is greater than connected SoC-to-FPGA Bridge accessible range" -# } -#} -# -#if {$lwh2f_f2h_loopback_en == 1} { -# if {$f2h_addr_width > $lwh2f_addr_width} { -# puts "Error: FPGA-to-SoC Bridge address range is greater than connected SoC-to-FPGA Lightweight Bridge accessible range" -# } -#} - diff --git a/sm_soc_devkit_ghrd/hps_subsys/agilex_hps_pinmux_solver.tcl b/sm_soc_devkit_ghrd/hps_subsys/agilex_hps_pinmux_solver.tcl deleted file mode 100755 index 30d91c6..0000000 --- a/sm_soc_devkit_ghrd/hps_subsys/agilex_hps_pinmux_solver.tcl +++ /dev/null @@ -1,510 +0,0 @@ -#**************************************************************************** -# -# SPDX-License-Identifier: MIT-0 -# Copyright(c) 2019-2020 Intel Corporation. -# -#**************************************************************************** -# -# This file means to solve pinmux enablement of each peripheral to IO48 quadrants -# -#**************************************************************************** - -# List variables for enabling peripherals of each Io48 quadrant -set hps_sdmmc4b_q1_en 0 -set hps_sdmmc4b_q1_sel_en 0 -set hps_sdmmc4b_q1_alt_en 0 -set hps_sdmmc8b_q1_alt_en 0 -set hps_sdmmc12b_q1_alt_en 0 -set hps_sdmmc2b_q2_alt_en 0 -set hps_sdmmc4b_q2_alt_en 0 -set hps_sdmmc4b_q3_en 0 -set hps_sdmmc4b_q3_alt_en 0 -set hps_sdmmc12b_q3_alt_en 0 -set hps_sdmmc_pupd_q2_en 0 -set hps_sdmmc_pwr_q2_en 0 -set hps_sdmmc_dstrb_q2_en 0 -set hps_sdmmc_pupd_q4_en 0 -set hps_sdmmc_pwr_q4_en 0 -set hps_sdmmc_dstrb_q4_en 0 - -set hps_usb0_en 0 -set hps_usb1_en 0 - -set hps_emac0_rmii_en 0 -set hps_emac0_rgmii_en 0 -set hps_emac1_rmii_en 0 -set hps_emac1_rgmii_en 0 -set hps_emac2_rmii_en 0 -set hps_emac2_rgmii_en 0 -set hps_emac0_q1_en 0 -set hps_emac1_q1_en 0 -set hps_emac2_q1_en 0 - -set hps_spim0_q1_en 0 -set hps_spim0_q4_en 0 -set hps_spim0_q4_alt_en 0 -set hps_spim0_2ss_en 0 -set hps_spim1_q1_en 0 -set hps_spim1_q2_en 0 -set hps_spim1_q3_en 0 -set hps_spim1_2ss_en 0 - -set hps_spis0_q1_en 0 -set hps_spis0_q2_en 0 -set hps_spis0_q3_en 0 -set hps_spis1_q1_en 0 -set hps_spis1_q3_en 0 -set hps_spis1_q4_en 0 - -set hps_uart0_q1_en 0 -set hps_uart0_q2_en 0 -set hps_uart0_q3_en 0 -set hps_uart0_fc_en 0 -set hps_uart1_q1_en 0 -set hps_uart1_q3_en 0 -set hps_uart1_q4_en 0 -set hps_uart1_fc_en 0 - -set hps_mdio0_q1_en 0 -set hps_mdio0_q3_en 0 -set hps_mdio0_q4_en 0 -set hps_mdio1_q1_en 0 -set hps_mdio1_q4_en 0 -set hps_mdio2_q1_en 0 -set hps_mdio2_q3_en 0 - -set hps_i2c0_q1_en 0 -set hps_i2c0_q2_en 0 -set hps_i2c0_q3_en 0 -set hps_i2c1_q1_en 0 -set hps_i2c1_q2_en 0 -set hps_i2c1_q3_en 0 -set hps_i2c1_q4_en 0 - -set hps_i2c_emac0_q1_en 0 -set hps_i2c_emac0_q3_en 0 -set hps_i2c_emac0_q4_en 0 -set hps_i2c_emac1_q1_en 0 -set hps_i2c_emac1_q4_en 0 -set hps_i2c_emac2_q1_en 0 -set hps_i2c_emac2_q3_en 0 -set hps_i2c_emac2_q4_en 0 - -set hps_i3c0_q1_en 0 -set hps_i3c0_q2_en 0 -set hps_i3c0_q3_en 0 -set hps_i3c0_q4_en 0 -set hps_i3c1_q1_en 0 -set hps_i3c1_q2_en 0 -set hps_i3c1_q3_en 0 -set hps_i3c1_q4_en 0 - -set hps_nand_q12_en 0 -set hps_nand_q34_en 0 -set hps_nand_16b_en 0 - -set hps_trace_q12_en 0 -set hps_trace_q34_en 0 -set hps_trace_8b_en 0 -set hps_trace_12b_en 0 -set hps_trace_16b_en 0 -set hps_trace_alt_en 0 - -set hps_cm_q 0 -set hps_cm_io 0 -set hps_cm_alt_en 0 - -set hps_gpio0_en 0 -set hps_gpio0_list "" -set hps_gpio1_en 0 -set hps_gpio1_list "" -set hps_pll_out_en 0 - -set hps_jtag_en 0 -set hps_io_custom "" - -# Initialize IO48 Pinmux assignment for each quadrant -set io48_q1_assignment "" -set io48_q2_assignment "" -set io48_q3_assignment "" -set io48_q4_assignment "" -for {set i 0} {$i < 12} {incr i} { - lappend io48_q1_assignment NONE - lappend io48_q2_assignment NONE - lappend io48_q3_assignment NONE - lappend io48_q4_assignment NONE -} - -source ./agilex_io48.tcl - -# Assigning individual IO48 peripherals -if {$hps_jtag_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 8 11 JTAG:TCK JTAG:TMS JTAG:TDO JTAG:TDI] -} - -#SDMMC Q1 -if {$hps_sdmmc4b_q1_en == 1} { - #puts "[llength $io48_q1_assignment]" - set io48_q1_assignment [lreplace $io48_q1_assignment 0 2 SDMMC:DATA0 SDMMC:DATA1 SDMMC:CLK] -} -if {$hps_sdmmc4b_q1_sel_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 3 3 SDMMC:LVL_SEL] -} -if {$hps_sdmmc4b_q1_alt_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 4 4 SDMMC:WRITE_PROTECT] -} -if {$hps_sdmmc8b_q1_alt_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 5 7 SDMMC:DATA2 SDMMC:DATA3 SDMMC:CMD] -} -if {$hps_sdmmc12b_q1_alt_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 8 11 SDMMC:DATA4 SDMMC:DATA5 SDMMC:DATA6 SDMMC:DATA7] -} - -#SDMMC Q2 -if {$hps_sdmmc_pupd_q2_en == 1} { - set io48_q2_assignment [lreplace $io48_q2_assignment 0 0 SDMMC:PU_PD_DATA2] -} -if {$hps_sdmmc_pwr_q2_en == 1} { - set io48_q2_assignment [lreplace $io48_q2_assignment 1 1 SDMMC:BUS_PWR] -} -if {$hps_sdmmc_dstrb_q2_en == 1} { - set io48_q2_assignment [lreplace $io48_q2_assignment 3 3 SDMMC:DATA_STROBE] -} - -#SDMMC Q3 -if {$hps_sdmmc4b_q3_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 0 2 SDMMC:DATA0 SDMMC:DATA1 SDMMC:CCLK] - set io48_q3_assignment [lreplace $io48_q3_assignment 5 7 SDMMC:DATA2 SDMMC:DATA3 SDMMC:CMD] -} -if {$hps_sdmmc4b_q3_alt_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 4 4 SDMMC:WRITE_PROTECT] -} -if {$hps_sdmmc12b_q3_alt_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 8 11 SDMMC:DATA4 SDMMC:DATA5 SDMMC:DATA6 SDMMC:DATA7] -} - -#SDMMC Q4 -if {$hps_sdmmc_pupd_q4_en == 1} { - set io48_q4_assignment [lreplace $io48_q4_assignment 0 0 SDMMC:PU_PD_DATA2] -} -if {$hps_sdmmc_pwr_q4_en == 1} { - set io48_q4_assignment [lreplace $io48_q4_assignment 1 1 SDMMC:BUS_PWR -} -if {$hps_sdmmc_dstrb_q4_en == 1} { - set io48_q4_assignment [lreplace $io48_q4_assignment 3 3 SDMMC:DATA_STROBE -} - -if {$hps_usb0_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 0 11 USB0:CLK USB0:STP USB0:DIR USB0:DATA0 USB0:DATA1 USB0:NXT USB0:DATA2 USB0:DATA3 USB0:DATA4 USB0:DATA5 USB0:DATA6 USB0:DATA7] -} -if {$hps_usb1_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 0 11 USB1:CLK USB1:STP USB1:DIR USB1:DATA0 USB1:DATA1 USB1:NXT USB1:DATA2 USB1:DATA3 USB1:DATA4 USB1:DATA5 USB1:DATA6 USB1:DATA7] -} - -if {$hps_emac0_rgmii_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 0 11 EMAC0:TX_CLK EMAC0:TX_CTL EMAC0:RX_CLK EMAC0:RX_CTL EMAC0:TXD0 EMAC0:TXD1 EMAC0:RXD0 EMAC0:RXD1 EMAC0:TXD2 EMAC0:TXD3 EMAC0:RXD2 EMAC0:RXD3] -} elseif {$hps_emac0_rmii_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 0 7 EMAC0:TX_CLK EMAC0:TX_CTL EMAC0:RX_CLK EMAC0:RX_CTL EMAC0:TXD0 EMAC0:TXD1 EMAC0:RXD0 EMAC0:RXD1] -} - -if {$hps_emac1_rgmii_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 0 11 EMAC1:TX_CLK EMAC1:TX_CTL EMAC1:RX_CLK EMAC1:RX_CTL EMAC1:TXD0 EMAC1:TXD1 EMAC1:RXD0 EMAC1:RXD1 EMAC1:TXD2 EMAC1:TXD3 EMAC1:RXD2 EMAC1:RXD3] -} elseif {$hps_emac1_rmii_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 0 7 EMAC1:TX_CLK EMAC1:TX_CTL EMAC1:RX_CLK EMAC1:RX_CTL EMAC1:TXD0 EMAC1:TXD1 EMAC1:RXD0 EMAC1:RXD1] -} - -if {$hps_emac2_rgmii_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 0 11 EMAC2:TX_CLK EMAC2:TX_CTL EMAC2:RX_CLK EMAC2:RX_CTL EMAC2:TXD0 EMAC2:TXD1 EMAC2:RXD0 EMAC2:RXD1 EMAC2:TXD2 EMAC2:TXD3 EMAC2:RXD2 EMAC2:RXD3] -} elseif {$hps_emac2_rmii_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 0 7 EMAC2:TX_CLK EMAC2:TX_CTL EMAC2:RX_CLK EMAC2:RX_CTL EMAC2:TXD0 EMAC2:TXD1 EMAC2:RXD0 EMAC2:RXD1] -} - -if {$hps_emac0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 0 1 EMAC0:PPS0 EMAC0:PPSTRIG0] -} elseif {$hps_emac1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 2 3 EMAC1:PPS1 EMAC1:PPSTRIG1] -} elseif {$hps_emac2_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 4 5 EMAC2:PPS2 EMAC2:PPSTRIG2] -} - -if {$hps_spim0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 4 7 SPIM0:CLK SPIM0:MOSI SPIM0:MISO SPIM0:SS0_N] - if {$hps_spim0_2ss_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 0 0 SPIM0:SS1_N] - } -} elseif {$hps_spim0_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 8 11 SPIM0:CLK SPIM0:MOSI SPIM0:MISO SPIM0:SS0_N] - if {$hps_spim0_2ss_en == 1} { - #HOW TO DIFFERENTIATE THE 5 7 SINGLE ELEMENT BUT NOT 5 7 REFER TO 5 6 7 (SAME AS SDMMC AND EMAC CASE THAT HAS AN EMPTY BIT IN MIDDLE OF THE LIST) - set io48_q4_assignment [lreplace $io48_q4_assignment 5 5 SPIM0:SS1_N] - } -} elseif {$hps_spim0_q4_alt_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 6 9 SPIM0:MISO SPIM0:SS0_N SPIM0:CLK SPIM0:MOSI SPIM0:MISO SPIM0:SS0_N] - if {$hps_spim0_2ss_en == 1} { - set io48_q4_assignment [lreplace $io48_q4_assignment 5 5 SPIM0:SS1_N] - } -} - -if {$hps_spim1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 8 11 SPIM1:CLK SPIM1:MOSI SPIM1:MISO SPIM1:SS0_N] - if {$hps_spim1_2ss_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 1 1 SPIM1:SS1_N] - } -} elseif {$hps_spim1_q2_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 8 11 SPIM1:CLK SPIM1:MOSI SPIM1:MISO SPIM1:SS0_N] - if {$hps_spim1_2ss_en == 1} { - set io48_q2_assignment [lreplace $io48_q2_assignment 7 7 SPIM1:SS1_N] - } -} elseif {$hps_spim1_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 0 3 SPIM1:CLK SPIM1:MOSI SPIM1:MISO SPIM1:SS0_N] - if {$hps_spim1_2ss_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 4 4 SPIM1:SS1_N] - } -} - -if {$hps_spis0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 0 3 SPIS0:CLK SPIS0:MOSI SPIS0:SS0_N SPIS0:MISO] -} elseif {$hps_spis0_q2_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 8 11 SPIS0:CLK SPIS0:MOSI SPIS0:SS0_N SPIS0:MISO] -} elseif {$hps_spis0_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 8 11 SPIS0:CLK SPIS0:MOSI SPIS0:SS0_N SPIS0:MISO] -} - -if {$hps_spis1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 8 11 SPIS1:CLK SPIS1:MOSI SPIS1:SS0_N SPIS1:MISO] -} elseif {$hps_spis1_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 4 7 SPIS1:CLK SPIS1:MOSI SPIS1:SS0_N SPIS1:MISO] -} elseif {$hps_spis1_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 8 11 SPIS1:CLK SPIS1:MOSI SPIS1:SS0_N SPIS1:MISO] -} - -if {$hps_uart0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 2 3 UART0:TX UART0:RX] - if {$hps_uart0_fc_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 0 1 UART0:CTS_N UART0:RTS_N] - } -} elseif {$hps_uart0_q2_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 10 11 UART0:TX UART0:RX] - if {$hps_uart0_fc_en == 1} { - set io48_q2_assignment [lreplace $io48_q2_assignment 8 9 UART0:CTS_N UART0:RTS_N] - } -} elseif {$hps_uart0_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 2 3 UART0:TX UART0:RX] - if {$hps_uart0_fc_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 0 1 UART0:CTS_N UART0:RTS_N] - } -} - -if {$hps_uart1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 6 7 UART1:TX UART1:RX] - if {$hps_uart1_fc_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 4 5 UART1:CTS_N UART1:RTS_N] - } -} elseif {$hps_uart1_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 6 7 UART1:TX UART1:RX] - if {$hps_uart1_fc_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 4 5 UART1:CTS_N UART1:RTS_N] - } -} elseif {$hps_uart1_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 2 3 UART1:TX UART1:RX] - if {$hps_uart1_fc_en == 1} { - set io48_q4_assignment [lreplace $io48_q4_assignment 4 5 UART1:CTS_N UART1:RTS_N] - } -} - -if {$hps_mdio0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 10 11 MDIO0:MDIO MDIO0:MDC] -} elseif {$hps_mdio0_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 10 11 MDIO0:MDIO MDIO0:MDC] -} elseif {$hps_mdio0_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 10 11 MDIO0:MDIO MDIO0:MDC] -} - -if {$hps_mdio1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 8 9 MDIO1:MDIO MDIO1:MDC] -} elseif {$hps_mdio1_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 6 7 MDIO1:MDIO MDIO1:MDC] -} - -if {$hps_mdio2_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 6 7 MDIO2:MDIO MDIO2:MDC] -} elseif {$hps_mdio2_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 8 9 MDIO2:MDIO MDIO2:MDC] -} - -if {$hps_i2c0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 4 5 I2C0:SDA I2C0:SCL] -} elseif {$hps_i2c0_q2_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 10 11 I2C0:SDA I2C0:SCL] -} elseif {$hps_i2c0_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 2 3 I2C0:SDA I2C0:SCL] -} - -if {$hps_i2c1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 2 3 I2C1:SDA I2C1:SCL] -} elseif {$hps_i2c1_q2_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 8 9 I2C1:SDA I2C1:SCL] -} elseif {$hps_i2c1_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 6 7 I2C1:SDA I2C1:SCL] -} elseif {$hps_i2c1_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 0 1 I2C1:SDA I2C1:SCL] -} - -if {$hps_i2c_emac0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 10 11 I2CEMAC0:SDA I2CEMAC0:SCL] -} elseif {$hps_i2c_emac0_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 10 11 I2CEMAC0:SDA I2CEMAC0:SCL] -} elseif {$hps_i2c_emac0_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 10 11 I2CEMAC0:SDA I2CEMAC0:SCL] -} - -if {$hps_i2c_emac1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 8 9 I2CEMAC1:SDA I2CEMAC1:SCL] -} elseif {$hps_i2c_emac1_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 6 7 I2CEMAC1:SDA I2CEMAC1:SCL] -} - -if {$hps_i2c_emac2_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 6 7 I2CEMAC2:SDA I2CEMAC2:SCL] -} elseif {$hps_i2c_emac2_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 8 9 I2CEMAC2:SDA I2CEMAC2:SCL] -} elseif {$hps_i2c_emac2_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 8 9 I2CEMAC2:SDA I2CEMAC2:SCL] -} - -if {$hps_i3c0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 10 11 I3C0:SDA I3C0:SCL] -} elseif {$hps_i3c0_q2_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 6 7 I3C0:SDA I3C0:SCL] -} elseif {$hps_i3c0_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 6 7 I3C0:SDA I3C0:SCL] -} elseif {$hps_i3c0_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q3_assignment 4 5 I3C0:SDA I3C0:SCL] -} - -if {$hps_i3c1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 8 9 I3C1:SDA I3C1:SCL] -} elseif {$hps_i3c1_q2_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 4 5 I3C1:SDA I3C1:SCL] -} elseif {$hps_i3c1_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 4 5 I3C1:SDA I3C1:SCL] -} elseif {$hps_i3c1_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q3_assignment 2 3 I3C1:SDA I3C1:SCL] -} - -if {$hps_nand_q12_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 0 11 NAND:DATA0 NAND:DATA1 NAND:WE_N NAND:RE_N NAND:WP_N NAND:DATA2 NAND:DATA3 NAND:CLE NAND:DATA4 NAND:DATA5 NAND:DATA6 NAND:DATA7] -set io48_q2_assignment [lreplace $io48_q2_assignment 0 3 NAND:ALE NAND:RB_N NAND:CE_N NAND:DQS] - if {$hps_nand_16b_en == 1} { - set io48_q2_assignment [lreplace $io48_q2_assignment 0 11 NAND:ALE NAND:RB_N NAND:CE_N NAND:DQS NAND:DATA8 NAND:DATA9 NAND:DATA10 NAND:DATA11 NAND:DATA12 NAND:DATA13 NAND:DATA14 NAND:DATA15] - } -} elseif {$hps_nand_q34_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 0 11 NAND:DATA0 NAND:DATA1 NAND:WE_N NAND:RE_N NAND:WP_N NAND:DATA2 NAND:DATA3 NAND:CLE NAND:DATA4 NAND:DATA5 NAND:DATA6 NAND:DATA7] -set io48_q4_assignment [lreplace $io48_q4_assignment 0 3 NAND:ALE NAND:RB_N NAND:CE_N NAND:DQS] - if {$hps_nand_16b_en == 1} { - set io48_q4_assignment [lreplace $io48_q4_assignment 0 11 NAND:ALE NAND:RB_N NAND:CE_N NAND:DQS NAND:DATA8 NAND:DATA9 NAND:DATA10 NAND:DATA11 NAND:DATA12 NAND:DATA13 NAND:DATA14 NAND:DATA15] - } -} - -if {$hps_trace_q12_en} { -set io48_q2_assignment [lreplace $io48_q2_assignment 7 11 TRACE:CLK TRACE:D0 TRACE:D1 TRACE:D2 TRACE:D3] - if {$hps_trace_alt_en == 1} { - if {$hps_trace_8b_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 3 6 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_12b_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 11 11 TRACE:D11] - set io48_q1_assignment [lreplace $io48_q1_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_16b_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 7 11 TRACE:D15 TRACE:D14 TRACE:D13 TRACE:D12 TRACE:D11] - set io48_q1_assignment [lreplace $io48_q1_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } - } else { - if {$hps_trace_8b_en == 1} { - set io48_q2_assignment [lreplace $io48_q2_assignment 3 6 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_12b_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 11 11 TRACE:D11] - set io48_q2_assignment [lreplace $io48_q2_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_16b_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 7 11 TRACE:CLK TRACE:D0 TRACE:D1 TRACE:D2 TRACE:D3] - set io48_q2_assignment [lreplace $io48_q2_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } - } -} elseif {$hps_trace_q34_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 7 11 TRACE:CLK TRACE:D0 TRACE:D1 TRACE:D2 TRACE:D3] - if {$hps_trace_alt_en == 1} { - if {$hps_trace_8b_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 3 6 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_12b_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 11 11 TRACE:D11] - set io48_q3_assignment [lreplace $io48_q3_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_16b_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 7 11 TRACE:D15 TRACE:D14 TRACE:D13 TRACE:D12 TRACE:D11] - set io48_q3_assignment [lreplace $io48_q3_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } - } else { - if {$hps_trace_8b_en == 1} { - set io48_q4_assignment [lreplace $io48_q4_assignment 3 6 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_12b_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 11 11 TRACE:D11] - set io48_q4_assignment [lreplace $io48_q4_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_16b_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 7 11 TRACE:CLK TRACE:D0 TRACE:D1 TRACE:D2 TRACE:D3] - set io48_q4_assignment [lreplace $io48_q4_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } - } -} - -if {$hps_cm_q == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment [expr $hps_cm_io-1] [expr $hps_cm_io-1] HCLK:HPS_OSC_CLK] -} elseif {$hps_cm_q == 2} { -set io48_q2_assignment [lreplace $io48_q2_assignment [expr $hps_cm_io-1] [expr $hps_cm_io-1] HCLK:HPS_OSC_CLK] -} elseif {$hps_cm_q == 3} { -set io48_q3_assignment [lreplace $io48_q3_assignment [expr $hps_cm_io-1] [expr $hps_cm_io-1] HCLK:HPS_OSC_CLK] -} elseif {$hps_cm_q == 4} { -set io48_q4_assignment [lreplace $io48_q4_assignment [expr $hps_cm_io-1] [expr $hps_cm_io-1] HCLK:HPS_OSC_CLK] -} elseif {$hps_cm_alt_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 0 3 CM:PLL_CLK0 CM:PLL_CLK1 CM:PLL_CLK2 CM:PLL_CLK3] -} - -if {$hps_gpio0_en == 1} { - foreach io_num [split $hps_gpio0_list] { - if {$io_num < 12} { - set io48_q1_assignment [lreplace $io48_q1_assignment $io_num $io_num GPIO0:IO${io_num}] - #set io48_q1_assignment [lreplace $io48_q1_assignment $io_num $io_num GPIO0] - } else { - set io48_q2_assignment [lreplace $io48_q2_assignment [expr $io_num-12] [expr $io_num-12] GPIO0:IO${io_num}] - #set io48_q2_assignment [lreplace $io48_q2_assignment [expr $io_num-12] [expr $io_num-12] GPIO0] - } - } -} - -if {$hps_gpio1_en == 1} { - foreach io_num [split $hps_gpio1_list] { - if {$io_num < 12} { - set io48_q3_assignment [lreplace $io48_q3_assignment $io_num $io_num GPIO1:IO${io_num}] - #set io48_q3_assignment [lreplace $io48_q3_assignment $io_num $io_num GPIO1] - } else { - set io48_q4_assignment [lreplace $io48_q4_assignment [expr $io_num-12] [expr $io_num-12] GPIO1:IO${io_num}] - #set io48_q4_assignment [lreplace $io48_q4_assignment [expr $io_num-12] [expr $io_num-12] GPIO1] - } - } -} - -if {$hps_io_custom != ""} { - foreach {io_num value} $hps_io_custom { - if {$io_num < 12} { - set io48_q1_assignment [lreplace $io48_q1_assignment $io_num $io_num $value] - } elseif {$io_num <24} { - set io48_q2_assignment [lreplace $io48_q2_assignment [expr $io_num-12] [expr $io_num-12] $value] - } elseif {$io_num <36} { - set io48_q3_assignment [lreplace $io48_q3_assignment [expr $io_num-24] [expr $io_num-24] $value] - } elseif {$io_num <48} { - set io48_q4_assignment [lreplace $io48_q4_assignment [expr $io_num-36] [expr $io_num-36] $value] - } - } -} - -#puts "[llength $io48_q1_assignment]" -puts "Sorted IO48 assignment:\n$io48_q1_assignment\n$io48_q2_assignment\n$io48_q3_assignment\n$io48_q4_assignment\n" - - diff --git a/sm_soc_devkit_ghrd/hps_subsys/agilex_io48.tcl b/sm_soc_devkit_ghrd/hps_subsys/agilex_io48.tcl deleted file mode 100755 index 32a74bf..0000000 --- a/sm_soc_devkit_ghrd/hps_subsys/agilex_io48.tcl +++ /dev/null @@ -1,191 +0,0 @@ -#**************************************************************************** -# -# SPDX-License-Identifier: MIT-0 -# Copyright(c) 2019-2021 Intel Corporation. -# -#**************************************************************************** -# -# This file host all the enabled HPS Daugther Card -# -#**************************************************************************** -# -# -# Following are HPS IO quadrants feature for individual peripherals -# Variable naming convention: hps___en -# Set default of veriables disable - - # -- the quadrant # of CM:HPS_OSC_CLK selected - # -- the IO # within a quadrant for CM:HPS_OSC_CLK -set hps_cm_q 0 -set hps_cm_io 0 -set hps_pll_clk0_en 0 -set hps_pll_clk1_en 0 -set hps_pll_clk2_en 0 -set hps_pll_clk3_en 0 -set hps_jtag_en 0 -set hps_spim0_q1_en 0 -set hps_spim0_q4_en 0 -set hps_spim1_q1_en 0 -set hps_spim1_q2_en 0 -set hps_spim1_q3_en 0 -set hps_spis0_q1_en 0 -set hps_spis0_q2_en 0 -set hps_spis0_q3_en 0 -set hps_spis1_q1_en 0 -set hps_spis1_q3_en 0 -set hps_spis1_q4_en 0 -set hps_uart0_q1_en 0 -set hps_uart0_q2_en 0 -set hps_uart0_q3_en 0 -set hps_uart1_q1_en 0 -set hps_uart1_q3_en 0 -set hps_i2c0_q1_en 0 -set hps_i2c0_q2_en 0 -set hps_i2c0_q3_en 0 -set hps_i2c1_q1_en 0 -set hps_i2c1_q2_en 0 -set hps_i2c1_q3_en 0 -set hps_i2c1_q4_en 0 -set hps_i2c_emac0_q1_en 0 -set hps_i2c_emac0_q3_en 0 -set hps_i2c_emac0_q4_en 0 -set hps_i2c_emac1_q1_en 0 -set hps_i2c_emac1_q4_en 0 -set hps_i2c_emac2_q1_en 0 -set hps_i2c_emac2_q3_en 0 -set hps_i2c_emac2_q4_en 0 -set hps_pps_emac0_q1_en 0 -set hps_pps_emac0_q3_en 0 -set hps_pps_emac1_q1_en 0 -set hps_pps_emac2_q1_en 0 -set hps_pps_emac2_q3_en 0 -set hps_trig_emac0_q1_en 0 -set hps_trig_emac0_q3_en 0 -set hps_trig_emac1_q1_en 0 -set hps_trig_emac2_q1_en 0 -set hps_trig_emac2_q3_en 0 -set hps_emac0_q2_en 0 -set hps_emac1_q3_en 0 -set hps_emac2_q4_en 0 -set hps_mdio0_q1_en 0 -set hps_mdio0_q3_en 0 -set hps_mdio0_q4_en 0 -set hps_mdio1_q1_en 0 -set hps_mdio1_q4_en 0 -set hps_mdio2_q3_en 0 -set hps_i3c0_q1_en 0 -set hps_i3c0_q2_en 0 -set hps_i3c0_q3_en 0 -set hps_i3c0_q4_en 0 -set hps_i3c1_q1_en 0 -set hps_i3c1_q2_en 0 -set hps_i3c1_q3_en 0 -set hps_i3c1_q4_en 0 -set hps_nand_q12_en 0 -set hps_nand_q34_en 0 -set hps_sdmmc4b_q1_en 0 -set hps_sdmmc8b_q1_en 0 -set hps_sdmmc_wp_q1_en 0 -set hps_sdmmc_pupd_q2_en 0 -set hps_sdmmc_pwr_q2_en 0 -set hps_sdmmc_dstrb_q2_en 0 -set hps_sdmmc4b_q3_en 0 -set hps_sdmmc8b_q3_en 0 -set hps_sdmmc_wp_q3_en 0 -set hps_sdmmc_pupd_q4_en 0 -set hps_sdmmc_pwr_q4_en 0 -set hps_sdmmc_dstrb_q4_en 0 -set hps_usb0_en 0 -set hps_usb1_en 0 -set hps_trace_en 0 -set hps_gpio0_en 0 -set hps_gpio0_list "" -set hps_gpio1_en 0 -set hps_gpio1_list "" - - -if {$daughter_card == "devkit_dc_oobe"} { -set hps_cm_q 1 -set hps_cm_io 1 -set hps_gpio0_en 1 -set hps_gpio0_list "1 10 11" -set hps_uart0_q1_en 1 -set hps_emac2_q1_en 1 -set hps_mdio2_q1_en 1 -#temporary turn off I3C for first compilation succeed -set hps_i3c1_q1_en 1 -set hps_usb1_en 1 -#temporary turn off sdmmc for first compilation succeed -set hps_sdmmc4b_q3_en 1 -set hps_gpio1_en 1 -set hps_gpio1_list "3 4" -set hps_jtag_en 1 -set hps_emac2_rgmii_en 1 - -} elseif {$daughter_card == "devkit_dc_nand"} { -set hps_emac0_q1_en 1 -set hps_uart0_q1_en 1 -set hps_i2c0_q1_en 1 -set hps_gpio0_en 1 -set hps_gpio0_list "6 7" -set hps_i3c1_q1_en 1 -set hps_mdio0_q1_en 1 -set hps_emac0_rgmii_en 1 -set hps_nand_q34_en 1 -set hps_gpio1_en 1 -set hps_gpio1_list "16 19" -set hps_cm_q 4 -set hps_cm_io 6 -set hps_spis1_q4_en 1 - -} elseif {$daughter_card == "debug2"} { -set hps_emac0_q1_en 1 -set hps_uart0_q1_en 1 -set hps_spim0_q1_en 1 -set hps_i3c1_q1_en 1 -set hps_mdio0_q1_en 1 -set hps_emac0_rgmii_en 1 -set hps_sdmmc4b_q3_en 1 -set hps_gpio1_en 1 -set hps_gpio1_list "3 4" -set hps_jtag_en 1 -set hps_sdmmc_pupd_q4_en 1 -set hps_cm_q 4 -set hps_cm_io 2 -set hps_trace_q34_en 1 -set hps_trace_8b_en 1 - -} elseif {$daughter_card == "tsn_phy_aic0"} { -set hps_emac0_q1_en 1 -set hps_uart0_q1_en 1 -set hps_emac2_q1_en 1 -set hps_mdio2_q1_en 1 -set hps_cm_q 1 -set hps_cm_io 10 -set hps_mdio0_q1_en 1 -set hps_emac0_rgmii_en 1 -set hps_sdmmc4b_q1_en 1 -#set hps_sdmmc4b_q1_sel_en 1 -#set hps_sdmmc4b_q1_alt_en 1 -set hps_jtag_en 1 -set hps_emac2_rgmii_en 1 - -} elseif {$daughter_card == "tsn_phy_aic2"} { -set hps_emac0_q1_en 1 -set hps_emac1_q1_en 1 -set hps_emac2_q1_en 1 -set hps_mdio2_q1_en 1 -set hps_mdio1_q1_en 1 -set hps_mdio0_q1_en 1 -set hps_emac0_rgmii_en 1 -set hps_emac1_rgmii_en 1 -set hps_emac2_rgmii_en 1 - -} elseif {$daughter_card == "none"} { -puts "Disable all HPS IO48 IO" -set hps_io_off 1 - -} else { -puts "Inserted daughter_card variant: $daughter_card NOT supported" -} - diff --git a/sm_soc_devkit_ghrd/hps_subsys/arguments_solver.tcl b/sm_soc_devkit_ghrd/hps_subsys/arguments_solver.tcl deleted file mode 100755 index f5dc059..0000000 --- a/sm_soc_devkit_ghrd/hps_subsys/arguments_solver.tcl +++ /dev/null @@ -1,424 +0,0 @@ -#**************************************************************************** -# -# SPDX-License-Identifier: MIT-0 -# Copyright(c) 2019-2021 Intel Corporation. -# -#**************************************************************************** -# -# This file resolves all passed in arguments into GHRD understood parameterizable setting - -# Following are list of arguments supported and its valid values for current subsystem -# device_family : -# device : -# subsys_name : -# project_name : -# board : devkit, mUDV2, mUDV1, char, cypress, hemon, lookout, mcgowan, pyramid -# hps_emif_en : 1 or 0 -# hps_emif_ecc_en : 1 or 0 -# hps_first_config : 1 or 0 HPS initialization sequence. HPS_FIRST or FPGA_FIRST -# h2f_width : 128, 64, 32 or 0(as disable) -# f2h_width : 256 or 0(as disable) -# f2sdram_width : 0:Unused, 256-bit"} -# lwh2f_width : 32 or 0(as disable) -# hps_f2s_irq_en : 1 or 0 -# daughter_card : Daughter card selection, either "none" -# hps_f2h_irq_en : 1 or 0 -# f2h_free_clk_en : 1 or 0 -# -# Each argument made available for configuration has a default value in design_config.tcl file -# The value can be passed in through Makefile. -# -# -# hps_emif_en, -# hps_emif_ecc_en, -# io48_dc, -# h2f_width, -# f2h_width, -# lwh2f_width, -# f2sdram_width, -# hps_first_config, -# hps_f2h_irq_en, -# f2h_free_clk_en - -#**************************************************************************** - -source ./design_config.tcl - - -proc check_then_accept { param } { - if {$param == device_family || device || qsys_name || project_name} { - puts "-- Accepted paramter \$param = $param" - } else { - puts "Warning: Inserted parameter \"$param\" is not supported for this script. " - } -} - - -if { ![ info exists device_family ] } { - set device_family $DEVICE_FAMILY -} else { - puts "-- Accepted parameter \$device_family = $device_family" -} - -if { ![ info exists device ] } { - set device $DEVICE -} else { - puts "-- Accepted parameter \$device = $device" -} - -if { ![ info exists subsys_name ] } { - set subsys_name $SUBSYS_NAME -} else { - puts "-- Accepted parameter \$subsys_name = $subsys_name" -} - -# if { ![ info exists project_name ] } { - # set project_name $PROJECT_NAME -# } else { - # puts "-- Accepted parameter \$project_name = $project_name" -# } - -# if { ![ info exists top_name ] } { - # set top_name $TOP_NAME -# } else { - # puts "-- Accepted parameter \$top_name = $top_name" -# } - -# if { ![ info exists clk_gate_en ] } { - # set clk_gate_en $CLK_GATE_EN -# } else { - # puts "-- Accepted parameter \$clk_gate_en = $clk_gate_en" -# } - -## ---------------- -## Board -## ---------------- - -if { ![ info exists board ] } { - set board $BOARD -} else { - puts "-- Accepted parameter \$board = $board" -} - -# if { ![ info exists board_pwrmgt ] } { - # set board_pwrmgt $BOARD_PWRMGT -# } else { - # puts "-- Accepted parameter \$board_pwrmgt = $board_pwrmgt" -# } - -# Loading Board default configuration settings -# set board_config_file "./board/board_${board}_config.tcl" -# if {[file exist $board_config_file]} { - # source $board_config_file -# } else { - # error "Error: $board_config_file not exist!! Please make sure the board settings files are included in folder ./board/" -# } - -#qsys generate consume this arguments -# if { ![ info exists fpga_peripheral_en ] } { - # set fpga_peripheral_en $FPGA_PERIPHERAL_EN -# } else { - # puts "-- Accepted parameter \$fpga_peripheral_en = $fpga_peripheral_en" -# } -# if { $fpga_peripheral_en == 1} { - # if {[ info exists isPeriph_pins_available ] } { - # if { $isPeriph_pins_available == 0} { - # set fpga_peripheral_en 0 - # puts "-- Turn OFF fpga_peripheral_en because \"isPeriph_pins_available\" is disable" - # } - # } else { - # set fpga_peripheral_en 0 - # puts "-- Turn OFF fpga_peripheral_en because \"isPeriph_pins_available\" is not available" - # } -# } - -## ---------------- -## OCM -## ---------------- - -# if { ![ info exists jtag_ocm_en ] } { - # set jtag_ocm_en $JTAG_OCM_EN -# } else { - # puts "-- Accepted parameter \$jtag_ocm_en = $jtag_ocm_en" -# } - -# if { ![ info exists ocm_datawidth ] } { - # set ocm_datawidth $OCM_DATAWIDTH -# } else { - # puts "-- Accepted parameter \$ocm_datawidth = $ocm_datawidth" -# } - -# if { ![ info exists ocm_memsize ] } { - # set ocm_memsize $OCM_MEMSIZE -# } else { - # puts "-- Accepted parameter \$ocm_memsize = $ocm_memsize" -# } - -## ---------------- -## HPS -## ---------------- - -if { ![ info exists hps_emif_en ] } { - set hps_emif_en $HPS_EMIF_EN -} else { - puts "-- Accepted parameter \$hps_emif_en = $hps_emif_en" -} - -if { ![ info exists hps_f2h_irq_en ] } { - set hps_f2h_irq_en $HPS_F2H_IRQ_EN -} else { - puts "-- Accepted parameter \$hps_f2h_irq_en = $hps_f2h_irq_en" -} - -if { ![ info exists f2h_free_clk_en ] } { - set f2h_free_clk_en $F2H_FREE_CLK_EN -} else { - puts "-- Accepted parameter \$f2h_free_clk_en = $f2h_free_clk_en" -} - -# if { ![ info exists hps_en ] } { - # set hps_en $HPS_EN -# } else { - # puts "-- Accepted parameter \$hps_en = $hps_en" -# } - -if { ![ info exists sys_initialization ] } { - set sys_initialization $SYS_INITIALIZATION -} else { - puts "-- Accepted parameter \$sys_initialization = $sys_initialization" -} - -if { ![ info exists hps_first_config ] } { - set hps_first_config $HPS_FIRST_CONFIG -} else { - puts "-- Accepted parameter \$hps_first_config = $hps_first_config" -} - - -##to be deleted -# if { ![ info exists hps_dap_mode ] } { - # set hps_dap_mode $HPS_DAP_MODE -# } else { - # puts "-- Accepted parameter \$hps_dap_mode = $hps_dap_mode" -# } - -# if { ![ info exists user0_clk_src_select ] } { - # set user0_clk_src_select $USER0_CLK_SRC_SELECT -# } else { - # puts "-- Accepted parameter \$user0_clk_src_select = $user0_clk_src_select" -# } - -# if { ![ info exists user0_clk_freq ] } { - # set user0_clk_freq $USER0_CLK_FREQ -# } else { - # puts "-- Accepted parameter \$user0_clk_freq = $user0_clk_freq" -# } - -# if { ![ info exists user1_clk_src_select ] } { - # set user1_clk_src_select $USER1_CLK_SRC_SELECT -# } else { - # puts "-- Accepted parameter \$user1_clk_src_select = $user1_clk_src_select" -# } - -# if { ![ info exists user1_clk_freq ] } { - # set user1_clk_freq $USER1_CLK_FREQ -# } else { - # puts "-- Accepted parameter \$user1_clk_freq = $user1_clk_freq" -# } - -if { ![ info exists h2f_width ] } { - set h2f_width $H2F_WIDTH -} else { - puts "-- Accepted parameter \$h2f_width = $h2f_width" -} - -if { ![ info exists f2s_data_width ] } { - set f2s_data_width $F2S_DATA_WIDTH -} else { - puts "-- Accepted parameter \$f2s_data_width = $f2s_data_width" -} - -# if { ![ info exists f2s_address_width ] } { - # set f2s_address_width $F2S_ADDRESS_WIDTH -# } else { - # puts "-- Accepted parameter \$f2s_address_width = $f2s_address_width" -# } - -if { ![ info exists f2sdram_width ] } { - set f2sdram_width $F2SDRAM_WIDTH -} else { - puts "-- Accepted parameter \$f2sdram_width = $f2sdram_width" -} - -if { ![ info exists f2sdram_addr_width ] } { - set f2sdram_addr_width $F2SDRAM_ADDR_WIDTH -} else { - puts "-- Accepted parameter \$f2sdram_addr_width = $f2sdram_addr_width" -} - -if { ![ info exists f2h_width ] } { - set f2h_width $F2H_WIDTH -} else { - puts "-- Accepted parameter \$f2h_width = $f2h_width" -} - -if { ![ info exists lwh2f_width ] } { - set lwh2f_width $LWH2F_WIDTH -} else { - puts "-- Accepted parameter \$lwh2f_width = $lwh2f_width" -} - -if { ![ info exists h2f_addr_width ] } { - set h2f_addr_width $H2F_ADDR_WIDTH -} else { - puts "-- Accepted parameter \$h2f_addr_width = $h2f_addr_width" -} - -if { ![ info exists f2h_addr_width ] } { - set f2h_addr_width $F2H_ADDR_WIDTH -} else { - puts "-- Accepted parameter \$f2h_addr_width = $f2h_addr_width" -} - -if { ![ info exists lwh2f_addr_width ] } { - set lwh2f_addr_width $LWH2F_ADDR_WIDTH -} else { - puts "-- Accepted parameter \$lwh2f_addr_width = $lwh2f_addr_width" -} - -# if { ![ info exists h2f_clk_source ] } { - # set h2f_clk_source $H2F_CLK_SOURCE -# } else { - # puts "-- Accepted parameter \$h2f_clk_source = $h2f_clk_source" -# } - -# if { ![ info exists f2h_clk_source ] } { - # set f2h_clk_source $F2H_CLK_SOURCE -# } else { - # puts "-- Accepted parameter \$f2h_clk_source = $f2h_clk_source" -# } - -# if { ![ info exists lwh2f_clk_source ] } { - # set lwh2f_clk_source $LWH2F_CLK_SOURCE -# } else { - # puts "-- Accepted parameter \$lwh2f_clk_source = $lwh2f_clk_source" -# } - -# if { ![ info exists ocm_clk_source ] } { - # set ocm_clk_source $OCM_CLK_SOURCE -# } else { - # puts "-- Accepted parameter \$ocm_clk_source = $ocm_clk_source" -# } - -# if { ![ info exists secure_f2h_axi_slave ] } { - # set secure_f2h_axi_slave $SECURE_F2H_AXI_SLAVE -# } else { - # puts "-- Accepted parameter \$secure_f2h_axi_slave = $secure_f2h_axi_slave" -# } - -# if { ![ info exists hps_peri_irq_loopback_en ] } { - # set hps_peri_irq_loopback_en $HPS_PERI_IRQ_LOOPBACK_EN -# } else { - # puts "-- Accepted parameter \$hps_peri_irq_loopback_en = $hps_peri_irq_loopback_en" -# } - -if { ![ info exists hps_f2s_irq_en ] } { - set hps_f2s_irq_en $HPS_F2S_IRQ_EN -} else { - puts "-- Accepted parameter \$hps_f2s_irq_en = $hps_f2s_irq_en" -} - -if { ![ info exists daughter_card ] } { - set daughter_card $DAUGHTER_CARD -} else { - puts "-- Accepted parameter \$daughter_card = $daughter_card" -} - -# if { ![ info exists cross_trigger_en ] } { - # set cross_trigger_en $CROSS_TRIGGER_EN -# } else { - # puts "-- Accepted parameter \$cross_trigger_en = $cross_trigger_en" -# } - -# if { ![ info exists hps_stm_en ] } { - # set hps_stm_en $HPS_STM_EN -# } else { - # puts "-- Accepted parameter \$hps_stm_en = $hps_stm_en" -# } - -# if { ![ info exists ftrace_en ] } { - # set ftrace_en $FTRACE_EN -# } else { - # puts "-- Accepted parameter \$ftrace_en = $ftrace_en" -# } - -# if { ![ info exists ftrace_output_width ] } { - # set ftrace_output_width $FTRACE_OUTPUT_WIDTH -# } else { - # puts "-- Accepted parameter \$ftrace_output_width = $ftrace_output_width" -# } - -# if { ![ info exists hps_pll_source_export ] } { - # set hps_pll_source_export $HPS_PLL_SOURCE_EXPORT -# } else { - # puts "-- Accepted parameter \$hps_pll_source_export = $hps_pll_source_export" -# } - -# if { ![ info exists reset_watchdog_en ] } { - # set reset_watchdog_en $RESET_WATCHDOG_EN -# } else { - # puts "-- Accepted parameter \$reset_watchdog_en = $reset_watchdog_en" -# } - -# if { ![ info exists reset_hps_warm_en ] } { - # set reset_hps_warm_en $RESET_HPS_WARM_EN -# } else { - # puts "-- Accepted parameter \$reset_hps_warm_en = $reset_hps_warm_en" -# } - -# if { ![ info exists reset_h2f_cold_en ] } { - # set reset_h2f_cold_en $RESET_H2F_COLD_EN -# } else { - # puts "-- Accepted parameter \$reset_h2f_cold_en = $reset_h2f_cold_en" -# } - -# if { ![ info exists reset_sdm_watchdog_cfg ] } { - # set reset_sdm_watchdog_cfg $RESET_SDM_WATCHDOG_CFG -# } else { - # puts "-- Accepted parameter \$reset_sdm_watchdog_cfg = $reset_sdm_watchdog_cfg" -# } - -# ---------------- -# Parameter Auto Derivation -# ---------------- - -# Default option -set hps_io_off 0 - -# if {$hps_en == 1} { -# puts "Solver INFO: hps ENABLED" -# } else { -# puts "Solver INFO: NO hps" -# } - -# if {$board == "char"} { -# puts "Warning: Overriding Settings for Char BOARD" -# set user0_clk_src_select 1 -# set fpga_peripheral_en 0 -# } - -# for cct_adapter -# if {$f2s_address_width > 32 && $f2sdram_width > 0} { - # set cct_en 1 - # set cct_control_interface 2 -# } else { - # set cct_en 0 -# } - -source ./agilex_hps_pinmux_solver.tcl -source ./agilex_hps_parameter_solver.tcl -source ./agilex_hps_io48_delay_chain_solver.tcl - -# Was thinking to enable single TCL entry for flow of TOP RTL, qsys, quartus generation. Ideal still pending implementation -# exec quartus_sh --script=create_ghrd_quartus.tcl $top_quartus_arg -# exec qsys-script --script=create_ghrd_qsys.tcl --quartus-project=$project_name.qpf --cmd="$qsys_arg" diff --git a/sm_soc_devkit_ghrd/hps_subsys/design_config.tcl b/sm_soc_devkit_ghrd/hps_subsys/design_config.tcl deleted file mode 100755 index fcf1ea1..0000000 --- a/sm_soc_devkit_ghrd/hps_subsys/design_config.tcl +++ /dev/null @@ -1,106 +0,0 @@ -#**************************************************************************** -# -# SPDX-License-Identifier: MIT-0 -# Copyright(c) 2019-2021 Intel Corporation. -# -#**************************************************************************** -# USAGE OF THIS FILE -# ------------------ -# Parameters set in this file are served as default value to configure GHRD for generation. -# Higher level sripts that call upon create_ghrd_*.tcl can over-write value of parameters -# by arguments to be passed in during execution of script. -# -#**************************************************************************** - -set SUBSYS_NAME subsys_abc -set PROJECT_NAME ghrd_agilex -set TOP_NAME ghrd_agilex5_top -set DEVICE_FAMILY "Agilex 5" -set DEVICE A5ED065BB32AE5SR0 - -##### features of GHRD enabling ##### - -# setting to enable clock gating for NINIT_DONE -set CLK_GATE_EN 0 - -## ---------------- -## Board -## ---------------- - -set BOARD "hidden" -# Only valid for board="DK-SI-AGF014E"; "enpirion" or "linear" -#set BOARD_PWRMGT "linear" - -# IO48 DAUGHTER_CARD, available options such as "devkit_dc_oobe", "devkit_dc_nand", "devkit_dc_emmc" -set DAUGHTER_CARD "devkit_dc_oobe" - -set HPS_FIRST_CONFIG 0 -## ---------------- -## HPS -## ---------------- - -# Option to enable Hard Processor System -set HPS_EN 1 -# Option to enable H2F User Clock0 Output Port -set USER0_CLK_SRC_SELECT 0 -set USER1_CLK_SRC_SELECT 0 -set USER0_CLK_FREQ 500 -set USER1_CLK_FREQ 500 - - -set HPS_F2H_IRQ_EN 0 -set F2H_FREE_CLK_EN 0 -# Option to enable HPS EMIF -set HPS_EMIF_EN 0 - -# Option to enable HPS initialization first or after FPGA initialization done -set SYS_INITIALIZATION "fpga" - -# Option to select HPS debug access port modes -set HPS_DAP_MODE 2 - -# Option to enable Fast Trace x32/x16 routed via FPGA, Fast Trace and Early Trace are exclusively exist -set FTRACE_EN 0 - -# Option to select x32/x16 output width for Fast Trace routed via FPGA -set FTRACE_OUTPUT_WIDTH 16 - -# Option to export the HPS PLL reference clock source to be feed by F2S clock -set HPS_PLL_SOURCE_EXPORT 0 - -# Option to enable WatchDog reset -set RESET_WATCHDOG_EN 0 - -# Option to enable HPS Warm Reset -set RESET_HPS_WARM_EN 0 - -# Option to enable HPS-to-FPGA Cold Reset -set RESET_H2F_COLD_EN 0 - -# Option to select how the SDM handles the watchdog reset -set RESET_SDM_WATCHDOG_CFG 0 - -# Options to enable and set width of each AXI Bridge -set H2F_WIDTH 128 -set F2H_WIDTH 64 -set LWH2F_WIDTH 32 -set F2S_DATA_WIDTH 256 -set F2S_ADDRESS_WIDTH 32 -set F2SDRAM_WIDTH 256 -set F2SDRAM_ADDR_WIDTH 32 -set H2F_F2H_LOOPBACK_EN 0 -set LWH2F_F2H_LOOPBACK_EN 0 -set F2H_ADDR_WIDTH 32 -set H2F_ADDR_WIDTH 38 -set LWH2F_ADDR_WIDTH 29 -set F2H_CLK_SOURCE 0 -set H2F_CLK_SOURCE 0 -set LWH2F_CLK_SOURCE 0 -set OCM_CLK_SOURCE 0 -set SECURE_F2H_AXI_SLAVE 0 -set HPS_PERI_IRQ_LOOPBACK_EN 0 -set HPS_F2S_IRQ_EN 1 - -# setting to enable Cross Triggering -set CROSS_TRIGGER_EN 0 -set HPS_STM_EN 0 diff --git a/sm_soc_devkit_ghrd/hps_subsys/utils.tcl b/sm_soc_devkit_ghrd/hps_subsys/utils.tcl deleted file mode 100755 index 3bf268b..0000000 --- a/sm_soc_devkit_ghrd/hps_subsys/utils.tcl +++ /dev/null @@ -1,332 +0,0 @@ -#**************************************************************************** -# -# SPDX-License-Identifier: MIT-0 -# Copyright(c) 2017-2020 Intel Corporation. -# -#**************************************************************************** -# -# This file contail TCL procedures as ultilities for Lego based GHRD creation -# Kindly source this file for Lego blocks creation - -# --- Procedure to add component together with parameterization --- # -# means to have , , followed by pairs -# -#**************************************************************************** - -proc add_component_param {args} { - set lpos 0 - set length [llength $args] - # puts "Length of argument: $length" - # puts "LIST become $args" - - #array set arg $args - #set argss [array get arg] - #puts "... $argss" -#regsub -all "({) (})" $args "" stripped -#puts "stripped LIST become $stripped" - -set splitted [split $args { }] -set length [llength [list $splitted]] -# puts "Length of splitted argument: $length" - -if {[llength $args] == 1} {set arguments [lindex $args 0]} -# puts "stripped LIST become $arguments" -# set length [llength $arguments] -# puts "Length of stripped: $length" - -# Retrieve the first arg as component name -set component_type [lindex $arguments 0] -set arguments [lreplace $arguments 0 0] -# puts "1st arguments become $arguments" -# puts "Component Type: $component_type" - -# Retrieve the 2nd arg as instance name -set instance_name [lindex $arguments 0] -set arguments [lreplace $arguments 0 0] -# puts "2nd arguments become $arguments" -# puts "Instance Name: $instance_name" - -# Retrieve the 4th arg as ip file path, 3rd arg as it is just label -set ip_file_path [lindex $arguments 1] -for {set i 0} {$i < 2} {incr i} { -set arguments [lreplace $arguments 0 0] -} -# puts "4th arguments become $arguments" -# puts "IP File Path: $ip_file_path" - -# Add component instance into design -add_component $instance_name $ip_file_path $component_type -# add_component ILC ip/ghrd_10as066n2/ghrd_10as066n2_ILC.ip interrupt_latency_counter ILC -# add_component clk_100 ip/$qsys_name/clk_100.ip altera_clock_bridge clk_100_inst - -# Load component instance into design for parameterization setup -load_component $instance_name - -# puts "Final arguments become $arguments" - -# puts "3rd arguments become $arguments" -# Check if parameter->value pairs matched -set parameter "" -set value "" -if {[llength $arguments]%2 == 0} { - foreach item $arguments { - if {$lpos %2 == 0} { - set parameter $item - puts "Param:\[$item\]" - } else { - set value $item - puts "Value:\[$item\]" - } - if {$lpos %2 == 1} {set_component_parameter_value $parameter $value} - incr lpos - } - #Save component instance after parameterization - save_component - return 0 - } else { - puts "\[Component: $component_type\]Inserted parameter->value pair has ODD arguments, please verify correntness." - } -} - -# --- Procedure to modify only component instance parameters --- # -# Component instance must be already instantiated into qsys system before this procedure is called -# means to have followed by pairs -proc set_component_param {args} { - set lpos 0 - set length [llength $args] - puts "Length of argument: $length" - # puts "LIST become $args" - - # Retrieve fresh argument from sourcing TCL to get all elements - if {[llength $args] == 1} {set arguments [lindex $args 0]} - - # puts "stripped LIST become $arguments" - set length [llength $arguments] - # puts "Length of stripped: $length" - - # Retrieve the 1st arg as instance name - set instance_name [lindex $arguments 0] - set arguments [lreplace $arguments 0 0] - puts "Instance Name: $instance_name" - - # Load component instance into design for parameterization setup - load_component $instance_name - - # Check if parameter->value pairs matched - set parameter "" - set value "" - if {[llength $arguments]%2 == 0} { - foreach item $arguments { - if {$lpos %2 == 0} { - set parameter $item - puts "Param:\[$item\]" - } else { - set value $item - puts "Value:\[$item\]" - } - if {$lpos %2 == 1} {set_component_parameter_value $parameter $value} - incr lpos - } - #Save component instance after parameterization - save_component - return 0 - } else { - puts "\[Instance: $instance_name\]Inserted parameter->value pair has ODD arguments, please verify correntness." - } -} - -# --- Procedure to add instance together with parameterization --- # -# means to have followed by pairs -proc add_instance_param {args} { - set lpos 0 - set length [llength $args] - # puts "Length of argument: $length" - # puts "LIST become $args" - - #array set arg $args - #set argss [array get arg] - #puts "... $argss" -#regsub -all "({) (})" $args "" stripped -#puts "stripped LIST become $stripped" - -#set splitted [split $args { }] -#set length [llength [list $splitted]] -#puts "Length of splitted argument: $length" - -if {[llength $args] == 1} {set arguments [lindex $args 0]} -# puts "stripped LIST become $arguments" -set length [llength $arguments] -# puts "Length of stripped: $length" - -# Retrieve the first arg as component name -set component_name [lindex $arguments 0] -set arguments [lreplace $arguments 0 0] -# puts "1st arguments become $arguments" -# puts "Component Name: $component_name" - -# Retrieve the 2nd arg as instance name -set instance_name [lindex $arguments 0] -set arguments [lreplace $arguments 0 0] -# puts "2nd arguments become $arguments" -# puts "Instance Name: $instance_name" - -# Add component instance into design -add_instance $instance_name $component_name - -# puts "3rd arguments become $arguments" -# Check if parameter->value pairs matched -set parameter "" -set value "" -if {[llength $arguments]%2 == 0} { - foreach item $arguments { - if {$lpos %2 == 0} { - set parameter $item - puts "Param:\[$item\]" - } else { - set value $item - puts "Value:\[$item\]" - } - if {$lpos %2 == 1} {set_instance_parameter_value $instance_name $parameter $value} - incr lpos - } - return 0 - - } else { - puts "\[Component: $component_name\]Inserted parameter->value pair has ODD arguments, please verify correntness." - } -} - - -# --- Procedure to modify only instance parameters --- # -# Instance must be already instantiated into qsys system before this procedure is called -# means to have followed by pairs -proc set_instance_param {args} { - set lpos 0 - set length [llength $args] - puts "Length of argument: $length" - # puts "LIST become $args" - - # Retrieve fresh argument from sourcing TCL to get all elements - if {[llength $args] == 1} {set arguments [lindex $args 0]} - - # puts "stripped LIST become $arguments" - set length [llength $arguments] - # puts "Length of stripped: $length" - - # Retrieve the 1st arg as instance name - set instance_name [lindex $arguments 0] - set arguments [lreplace $arguments 0 0] - puts "Instance Name: $instance_name" - - # Check if parameter->value pairs matched - set parameter "" - set value "" - if {[llength $arguments]%2 == 0} { - foreach item $arguments { - if {$lpos %2 == 0} { - set parameter $item - puts "Param:\[$item\]" - } else { - set value $item - puts "Value:\[$item\]" - } - if {$lpos %2 == 1} {set_instance_parameter_value $instance_name $parameter $value} - incr lpos - } - return 0 - - } else { - puts "\[Instance: $instance_name\]Inserted parameter->value pair has ODD arguments, please verify correntness." - } -} - - -# --- Procedure to establish connection between two instances ports --- # -# means to have and pairs -proc connect {args} { - set lpos 0 - set length [llength $args] - puts "Length of argument: $length" - # puts "LIST become $args" - - # Retrieve fresh argument from sourcing TCL to get all elements - if {[llength $args] == 1} {set arguments [lindex $args 0]} - - # puts "stripped LIST become $arguments" - set length [llength $arguments] - # puts "Length of stripped: $length" - - # Check if parameter->value pairs matched - set parameter "" - set value "" - if {[llength $arguments]%2 == 0} { - foreach item $arguments { - if {$lpos %2 == 0} { - set src $item - puts "From:\[$item\]" - } else { - set dst $item - puts "connect To:\[$item\]" - } - if {$lpos %2 == 1} {add_connection $src $dst} - incr lpos - } - return 0 - - } else { - puts "\[Intended connections has Odd pair of source --> destination. Please verify correntness." - } -} - - -# --- Procedure to establish connection between two instances ports with base address --- # -# means to have , and -proc connect_map {args} { - set lpos 0 - set length [llength $args] - puts "Length of argument: $length" - # puts "LIST become $args" - - # Retrieve fresh argument from sourcing TCL to get all elements - if {[llength $args] == 1} {set arguments [lindex $args 0]} - - #puts "stripped LIST become $arguments" - set length [llength $arguments] - puts "Length of arguments: $length" - - # Check if parameter->value pairs matched - set parameter "" - set value "" - if {[llength $arguments]%3 == 0} { - #foreach item $arguments { - # if {$lpos %2 == 0} { - # set src $item - # puts "From:\[$item\]" - # } else { - # set dst $item - # puts "connect To:\[$item\]" - # } - # if {$lpos %2 == 1} {add_connection $src $dst} - # incr lpos - #} - foreach {src dest offset} $arguments { - add_connection $src $dest - set_connection_parameter_value $src/$dest baseAddress $offset - } - return 0 - - } else { - puts "\[Intended connections has Odd pair of source --> destination. Please verify correntness." - } -} - -# --- Procedure to export instance port --- # -# EXPORT procedure set to export instances port to the top level of Qsys design -# Argument means to have and pairs -proc export {instance port name} { - set_interface_property $name EXPORT_OF ${instance}.${port} -} - -proc wsplit {str sepStr} { - split [string map [list $sepStr \0] $str] \0] -} diff --git a/sm_soc_devkit_ghrd/jtag_subsys/agilex_hps_io48_delay_chain_solver.tcl b/sm_soc_devkit_ghrd/jtag_subsys/agilex_hps_io48_delay_chain_solver.tcl deleted file mode 100755 index ed388ae..0000000 --- a/sm_soc_devkit_ghrd/jtag_subsys/agilex_hps_io48_delay_chain_solver.tcl +++ /dev/null @@ -1,48 +0,0 @@ -#**************************************************************************** -# -# SPDX-License-Identifier: MIT-0 -# Copyright(c) 2019-2020 Intel Corporation. -# -#**************************************************************************** -# -# This file means to solve chain delay assignment to all IO48 pins -# -#**************************************************************************** - -# Initialize IO48 chain delay assignment based on port properties -set io48_output_pin [list "JTAG:TDO" "SDMMC:CCLK" "USB*:STP" "EMAC*:TX_CLK" "EMAC*:TX_CTL" "EMAC*:TXD0" "EMAC*:TXD1" "EMAC*:TXD2" "EMAC*:TXD3" "MDIO*:MDC" \ - "SPIM0:CLK" "SPIM0:MOSI" "SPIM0:SS0_N" "SPIS0:MISO" "UART0:TX" "UART0:RTS_N" "NAND:ALE" "NAND:CE_N" "NAND:CLE" "NAND:WE_N" "NAND:RE_N" "NAND:WP_N" \ - ] -set io48_input_pin [list "JTAG:TCK" "JTAG:TMS" "JTAG:TDI" "USB*:CLK" "USB*:DIR" "USB*:NXT" "EMAC*:RX_CLK" "EMAC*:RX_CTL" "EMAC*:RXD0" "EMAC*:RXD1" "EMAC*:RXD2" "EMAC*:RXD3" \ - "SPIM0:MISO" "SPIS0:CLK" "SPIS0:MOSI" "SPIS0:SS0_N" "UART0:RX" "UART0:CTS_N" "NAND:RB" "HPS_OSC_CLK" "TRACE:CLK" "TRACE:D0" "TRACE:D1" "TRACE:D2" "TRACE:D3" \ - "TRACE:D10" "TRACE:D9" "TRACE:D8" "TRACE:D7" "TRACE:D6" "TRACE:D15" "TRACE:D14" "TRACE:D13" "TRACE:D12" "TRACE:D11" \ - ] -set io48_bidirect_pin [list "SDMMC:CMD" "SDMMC:D0" "SDMMC:D1" "SDMMC:D2" "SDMMC:D3" "SDMMC:D4" "SDMMC:D5" "SDMMC:D6" "SDMMC:D7" "I2CEMAC*:SDA" "I2CEMAC*:SCL" \ - "USB*:DATA0" "USB*:DATA1" "USB*:DATA2" "USB*:DATA3" "USB*:DATA4" "USB*:DATA5" "USB*:DATA6" "USB*:DATA7" "I2C*:SDA" "I2C*:SCL" \ - "MDIO*:MDIO" "NAND:ADQ0" "NAND:ADQ1" "NAND:ADQ2" "NAND:ADQ3" "NAND:ADQ4" "NAND:ADQ5" "NAND:ADQ6" "NAND:ADQ7" "NAND:ADQ8" "NAND:ADQ9" \ - "NAND:ADQ10" "NAND:ADQ11" "NAND:ADQ12" "NAND:ADQ13" "NAND:ADQ14" "NAND:ADQ15" "GPIO" \ - ] - -set io48_pinmux_assignment [list $io48_q1_assignment $io48_q2_assignment $io48_q3_assignment $io48_q4_assignment] -set count 0 -array set output_dly_chain_io48 [] -array set input_dly_chain_io48 [] -foreach io_quadrant $io48_pinmux_assignment { - foreach io_pin $io_quadrant { - if [string match [lindex $io48_output_pin 3] $io_pin] { - set output_dly_chain_io48($count) 45 - set input_dly_chain_io48($count) 0 - } elseif [string match [lindex $io48_input_pin 3] $io_pin] { - set output_dly_chain_io48($count) 0 - set input_dly_chain_io48($count) 0 - } elseif [string match [lindex $io48_bidirect_pin 3] $io_pin] { - set output_dly_chain_io48($count) 0 - set input_dly_chain_io48($count) 0 - } else { - set output_dly_chain_io48($count) 0 - set input_dly_chain_io48($count) 0 - } - incr count - } -} - diff --git a/sm_soc_devkit_ghrd/jtag_subsys/agilex_hps_parameter_solver.tcl b/sm_soc_devkit_ghrd/jtag_subsys/agilex_hps_parameter_solver.tcl deleted file mode 100755 index c693e8e..0000000 --- a/sm_soc_devkit_ghrd/jtag_subsys/agilex_hps_parameter_solver.tcl +++ /dev/null @@ -1,73 +0,0 @@ -#**************************************************************************** -# -# SPDX-License-Identifier: MIT-0 -# Copyright(c) 2019-2020 Intel Corporation. -# -#**************************************************************************** -# -# This file means to solve AGILEX HPS parameters value with each related argument passed in -# -#**************************************************************************** - -#set h2f_width $h2f_width -#if {$h2f_width == 32} { -# set s2f_width 1 -#} elseif {$h2f_width == 64} { -# set s2f_width 2 -#} elseif {$h2f_width == 128} { -# set s2f_width 3 -#} else { -# set s2f_width 0 -#} - -#set f2s_width $f2h_width -#if {$f2h_width > 0} { -# set f2s_width 3 -#} else { -# set f2s_width 0 -#} - -#set lwh2f_width $lwh2f_width -#if {$lwh2f_width > 0} { -# set lwh2f_width 1 -#} else { -# set lwh2f_width 0 -#} - -# H2F IRQ enablement -set h2f_emac0_irq_en 0 -set h2f_emac1_irq_en 0 -set h2f_emac2_irq_en 0 -set h2f_gpio_irq_en 0 -set h2f_i2cemac0_irq_en 0 -set h2f_i2cemac1_irq_en 0 -set h2f_i2cemac2_irq_en 0 -set h2f_i2c0_irq_en 0 -set h2f_i2c1_irq_en 0 -set h2f_i3c0_irq_en 0 -set h2f_i3c1_irq_en 0 -set h2f_nand_irq_en 0 -set h2f_sdmmc_irq_en 0 -set h2f_spim0_irq_en 0 -set h2f_spim1_irq_en 0 -set h2f_spis0_irq_en 0 -set h2f_spis1_irq_en 0 -set h2f_uart0_irq_en 0 -set h2f_uart1_irq_en 0 -set h2f_usb0_irq_en 0 -set h2f_usb1_irq_en 0 - - -# Validation of parameter combinations correctness -#if {$h2f_f2h_loopback_en == 1} { -# if {$f2h_addr_width > $h2f_addr_width} { -# puts "Error: FPGA-to-SoC Bridge address range is greater than connected SoC-to-FPGA Bridge accessible range" -# } -#} -# -#if {$lwh2f_f2h_loopback_en == 1} { -# if {$f2h_addr_width > $lwh2f_addr_width} { -# puts "Error: FPGA-to-SoC Bridge address range is greater than connected SoC-to-FPGA Lightweight Bridge accessible range" -# } -#} - diff --git a/sm_soc_devkit_ghrd/jtag_subsys/agilex_hps_pinmux_solver.tcl b/sm_soc_devkit_ghrd/jtag_subsys/agilex_hps_pinmux_solver.tcl deleted file mode 100755 index 30d91c6..0000000 --- a/sm_soc_devkit_ghrd/jtag_subsys/agilex_hps_pinmux_solver.tcl +++ /dev/null @@ -1,510 +0,0 @@ -#**************************************************************************** -# -# SPDX-License-Identifier: MIT-0 -# Copyright(c) 2019-2020 Intel Corporation. -# -#**************************************************************************** -# -# This file means to solve pinmux enablement of each peripheral to IO48 quadrants -# -#**************************************************************************** - -# List variables for enabling peripherals of each Io48 quadrant -set hps_sdmmc4b_q1_en 0 -set hps_sdmmc4b_q1_sel_en 0 -set hps_sdmmc4b_q1_alt_en 0 -set hps_sdmmc8b_q1_alt_en 0 -set hps_sdmmc12b_q1_alt_en 0 -set hps_sdmmc2b_q2_alt_en 0 -set hps_sdmmc4b_q2_alt_en 0 -set hps_sdmmc4b_q3_en 0 -set hps_sdmmc4b_q3_alt_en 0 -set hps_sdmmc12b_q3_alt_en 0 -set hps_sdmmc_pupd_q2_en 0 -set hps_sdmmc_pwr_q2_en 0 -set hps_sdmmc_dstrb_q2_en 0 -set hps_sdmmc_pupd_q4_en 0 -set hps_sdmmc_pwr_q4_en 0 -set hps_sdmmc_dstrb_q4_en 0 - -set hps_usb0_en 0 -set hps_usb1_en 0 - -set hps_emac0_rmii_en 0 -set hps_emac0_rgmii_en 0 -set hps_emac1_rmii_en 0 -set hps_emac1_rgmii_en 0 -set hps_emac2_rmii_en 0 -set hps_emac2_rgmii_en 0 -set hps_emac0_q1_en 0 -set hps_emac1_q1_en 0 -set hps_emac2_q1_en 0 - -set hps_spim0_q1_en 0 -set hps_spim0_q4_en 0 -set hps_spim0_q4_alt_en 0 -set hps_spim0_2ss_en 0 -set hps_spim1_q1_en 0 -set hps_spim1_q2_en 0 -set hps_spim1_q3_en 0 -set hps_spim1_2ss_en 0 - -set hps_spis0_q1_en 0 -set hps_spis0_q2_en 0 -set hps_spis0_q3_en 0 -set hps_spis1_q1_en 0 -set hps_spis1_q3_en 0 -set hps_spis1_q4_en 0 - -set hps_uart0_q1_en 0 -set hps_uart0_q2_en 0 -set hps_uart0_q3_en 0 -set hps_uart0_fc_en 0 -set hps_uart1_q1_en 0 -set hps_uart1_q3_en 0 -set hps_uart1_q4_en 0 -set hps_uart1_fc_en 0 - -set hps_mdio0_q1_en 0 -set hps_mdio0_q3_en 0 -set hps_mdio0_q4_en 0 -set hps_mdio1_q1_en 0 -set hps_mdio1_q4_en 0 -set hps_mdio2_q1_en 0 -set hps_mdio2_q3_en 0 - -set hps_i2c0_q1_en 0 -set hps_i2c0_q2_en 0 -set hps_i2c0_q3_en 0 -set hps_i2c1_q1_en 0 -set hps_i2c1_q2_en 0 -set hps_i2c1_q3_en 0 -set hps_i2c1_q4_en 0 - -set hps_i2c_emac0_q1_en 0 -set hps_i2c_emac0_q3_en 0 -set hps_i2c_emac0_q4_en 0 -set hps_i2c_emac1_q1_en 0 -set hps_i2c_emac1_q4_en 0 -set hps_i2c_emac2_q1_en 0 -set hps_i2c_emac2_q3_en 0 -set hps_i2c_emac2_q4_en 0 - -set hps_i3c0_q1_en 0 -set hps_i3c0_q2_en 0 -set hps_i3c0_q3_en 0 -set hps_i3c0_q4_en 0 -set hps_i3c1_q1_en 0 -set hps_i3c1_q2_en 0 -set hps_i3c1_q3_en 0 -set hps_i3c1_q4_en 0 - -set hps_nand_q12_en 0 -set hps_nand_q34_en 0 -set hps_nand_16b_en 0 - -set hps_trace_q12_en 0 -set hps_trace_q34_en 0 -set hps_trace_8b_en 0 -set hps_trace_12b_en 0 -set hps_trace_16b_en 0 -set hps_trace_alt_en 0 - -set hps_cm_q 0 -set hps_cm_io 0 -set hps_cm_alt_en 0 - -set hps_gpio0_en 0 -set hps_gpio0_list "" -set hps_gpio1_en 0 -set hps_gpio1_list "" -set hps_pll_out_en 0 - -set hps_jtag_en 0 -set hps_io_custom "" - -# Initialize IO48 Pinmux assignment for each quadrant -set io48_q1_assignment "" -set io48_q2_assignment "" -set io48_q3_assignment "" -set io48_q4_assignment "" -for {set i 0} {$i < 12} {incr i} { - lappend io48_q1_assignment NONE - lappend io48_q2_assignment NONE - lappend io48_q3_assignment NONE - lappend io48_q4_assignment NONE -} - -source ./agilex_io48.tcl - -# Assigning individual IO48 peripherals -if {$hps_jtag_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 8 11 JTAG:TCK JTAG:TMS JTAG:TDO JTAG:TDI] -} - -#SDMMC Q1 -if {$hps_sdmmc4b_q1_en == 1} { - #puts "[llength $io48_q1_assignment]" - set io48_q1_assignment [lreplace $io48_q1_assignment 0 2 SDMMC:DATA0 SDMMC:DATA1 SDMMC:CLK] -} -if {$hps_sdmmc4b_q1_sel_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 3 3 SDMMC:LVL_SEL] -} -if {$hps_sdmmc4b_q1_alt_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 4 4 SDMMC:WRITE_PROTECT] -} -if {$hps_sdmmc8b_q1_alt_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 5 7 SDMMC:DATA2 SDMMC:DATA3 SDMMC:CMD] -} -if {$hps_sdmmc12b_q1_alt_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 8 11 SDMMC:DATA4 SDMMC:DATA5 SDMMC:DATA6 SDMMC:DATA7] -} - -#SDMMC Q2 -if {$hps_sdmmc_pupd_q2_en == 1} { - set io48_q2_assignment [lreplace $io48_q2_assignment 0 0 SDMMC:PU_PD_DATA2] -} -if {$hps_sdmmc_pwr_q2_en == 1} { - set io48_q2_assignment [lreplace $io48_q2_assignment 1 1 SDMMC:BUS_PWR] -} -if {$hps_sdmmc_dstrb_q2_en == 1} { - set io48_q2_assignment [lreplace $io48_q2_assignment 3 3 SDMMC:DATA_STROBE] -} - -#SDMMC Q3 -if {$hps_sdmmc4b_q3_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 0 2 SDMMC:DATA0 SDMMC:DATA1 SDMMC:CCLK] - set io48_q3_assignment [lreplace $io48_q3_assignment 5 7 SDMMC:DATA2 SDMMC:DATA3 SDMMC:CMD] -} -if {$hps_sdmmc4b_q3_alt_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 4 4 SDMMC:WRITE_PROTECT] -} -if {$hps_sdmmc12b_q3_alt_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 8 11 SDMMC:DATA4 SDMMC:DATA5 SDMMC:DATA6 SDMMC:DATA7] -} - -#SDMMC Q4 -if {$hps_sdmmc_pupd_q4_en == 1} { - set io48_q4_assignment [lreplace $io48_q4_assignment 0 0 SDMMC:PU_PD_DATA2] -} -if {$hps_sdmmc_pwr_q4_en == 1} { - set io48_q4_assignment [lreplace $io48_q4_assignment 1 1 SDMMC:BUS_PWR -} -if {$hps_sdmmc_dstrb_q4_en == 1} { - set io48_q4_assignment [lreplace $io48_q4_assignment 3 3 SDMMC:DATA_STROBE -} - -if {$hps_usb0_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 0 11 USB0:CLK USB0:STP USB0:DIR USB0:DATA0 USB0:DATA1 USB0:NXT USB0:DATA2 USB0:DATA3 USB0:DATA4 USB0:DATA5 USB0:DATA6 USB0:DATA7] -} -if {$hps_usb1_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 0 11 USB1:CLK USB1:STP USB1:DIR USB1:DATA0 USB1:DATA1 USB1:NXT USB1:DATA2 USB1:DATA3 USB1:DATA4 USB1:DATA5 USB1:DATA6 USB1:DATA7] -} - -if {$hps_emac0_rgmii_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 0 11 EMAC0:TX_CLK EMAC0:TX_CTL EMAC0:RX_CLK EMAC0:RX_CTL EMAC0:TXD0 EMAC0:TXD1 EMAC0:RXD0 EMAC0:RXD1 EMAC0:TXD2 EMAC0:TXD3 EMAC0:RXD2 EMAC0:RXD3] -} elseif {$hps_emac0_rmii_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 0 7 EMAC0:TX_CLK EMAC0:TX_CTL EMAC0:RX_CLK EMAC0:RX_CTL EMAC0:TXD0 EMAC0:TXD1 EMAC0:RXD0 EMAC0:RXD1] -} - -if {$hps_emac1_rgmii_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 0 11 EMAC1:TX_CLK EMAC1:TX_CTL EMAC1:RX_CLK EMAC1:RX_CTL EMAC1:TXD0 EMAC1:TXD1 EMAC1:RXD0 EMAC1:RXD1 EMAC1:TXD2 EMAC1:TXD3 EMAC1:RXD2 EMAC1:RXD3] -} elseif {$hps_emac1_rmii_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 0 7 EMAC1:TX_CLK EMAC1:TX_CTL EMAC1:RX_CLK EMAC1:RX_CTL EMAC1:TXD0 EMAC1:TXD1 EMAC1:RXD0 EMAC1:RXD1] -} - -if {$hps_emac2_rgmii_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 0 11 EMAC2:TX_CLK EMAC2:TX_CTL EMAC2:RX_CLK EMAC2:RX_CTL EMAC2:TXD0 EMAC2:TXD1 EMAC2:RXD0 EMAC2:RXD1 EMAC2:TXD2 EMAC2:TXD3 EMAC2:RXD2 EMAC2:RXD3] -} elseif {$hps_emac2_rmii_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 0 7 EMAC2:TX_CLK EMAC2:TX_CTL EMAC2:RX_CLK EMAC2:RX_CTL EMAC2:TXD0 EMAC2:TXD1 EMAC2:RXD0 EMAC2:RXD1] -} - -if {$hps_emac0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 0 1 EMAC0:PPS0 EMAC0:PPSTRIG0] -} elseif {$hps_emac1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 2 3 EMAC1:PPS1 EMAC1:PPSTRIG1] -} elseif {$hps_emac2_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 4 5 EMAC2:PPS2 EMAC2:PPSTRIG2] -} - -if {$hps_spim0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 4 7 SPIM0:CLK SPIM0:MOSI SPIM0:MISO SPIM0:SS0_N] - if {$hps_spim0_2ss_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 0 0 SPIM0:SS1_N] - } -} elseif {$hps_spim0_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 8 11 SPIM0:CLK SPIM0:MOSI SPIM0:MISO SPIM0:SS0_N] - if {$hps_spim0_2ss_en == 1} { - #HOW TO DIFFERENTIATE THE 5 7 SINGLE ELEMENT BUT NOT 5 7 REFER TO 5 6 7 (SAME AS SDMMC AND EMAC CASE THAT HAS AN EMPTY BIT IN MIDDLE OF THE LIST) - set io48_q4_assignment [lreplace $io48_q4_assignment 5 5 SPIM0:SS1_N] - } -} elseif {$hps_spim0_q4_alt_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 6 9 SPIM0:MISO SPIM0:SS0_N SPIM0:CLK SPIM0:MOSI SPIM0:MISO SPIM0:SS0_N] - if {$hps_spim0_2ss_en == 1} { - set io48_q4_assignment [lreplace $io48_q4_assignment 5 5 SPIM0:SS1_N] - } -} - -if {$hps_spim1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 8 11 SPIM1:CLK SPIM1:MOSI SPIM1:MISO SPIM1:SS0_N] - if {$hps_spim1_2ss_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 1 1 SPIM1:SS1_N] - } -} elseif {$hps_spim1_q2_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 8 11 SPIM1:CLK SPIM1:MOSI SPIM1:MISO SPIM1:SS0_N] - if {$hps_spim1_2ss_en == 1} { - set io48_q2_assignment [lreplace $io48_q2_assignment 7 7 SPIM1:SS1_N] - } -} elseif {$hps_spim1_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 0 3 SPIM1:CLK SPIM1:MOSI SPIM1:MISO SPIM1:SS0_N] - if {$hps_spim1_2ss_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 4 4 SPIM1:SS1_N] - } -} - -if {$hps_spis0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 0 3 SPIS0:CLK SPIS0:MOSI SPIS0:SS0_N SPIS0:MISO] -} elseif {$hps_spis0_q2_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 8 11 SPIS0:CLK SPIS0:MOSI SPIS0:SS0_N SPIS0:MISO] -} elseif {$hps_spis0_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 8 11 SPIS0:CLK SPIS0:MOSI SPIS0:SS0_N SPIS0:MISO] -} - -if {$hps_spis1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 8 11 SPIS1:CLK SPIS1:MOSI SPIS1:SS0_N SPIS1:MISO] -} elseif {$hps_spis1_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 4 7 SPIS1:CLK SPIS1:MOSI SPIS1:SS0_N SPIS1:MISO] -} elseif {$hps_spis1_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 8 11 SPIS1:CLK SPIS1:MOSI SPIS1:SS0_N SPIS1:MISO] -} - -if {$hps_uart0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 2 3 UART0:TX UART0:RX] - if {$hps_uart0_fc_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 0 1 UART0:CTS_N UART0:RTS_N] - } -} elseif {$hps_uart0_q2_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 10 11 UART0:TX UART0:RX] - if {$hps_uart0_fc_en == 1} { - set io48_q2_assignment [lreplace $io48_q2_assignment 8 9 UART0:CTS_N UART0:RTS_N] - } -} elseif {$hps_uart0_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 2 3 UART0:TX UART0:RX] - if {$hps_uart0_fc_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 0 1 UART0:CTS_N UART0:RTS_N] - } -} - -if {$hps_uart1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 6 7 UART1:TX UART1:RX] - if {$hps_uart1_fc_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 4 5 UART1:CTS_N UART1:RTS_N] - } -} elseif {$hps_uart1_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 6 7 UART1:TX UART1:RX] - if {$hps_uart1_fc_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 4 5 UART1:CTS_N UART1:RTS_N] - } -} elseif {$hps_uart1_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 2 3 UART1:TX UART1:RX] - if {$hps_uart1_fc_en == 1} { - set io48_q4_assignment [lreplace $io48_q4_assignment 4 5 UART1:CTS_N UART1:RTS_N] - } -} - -if {$hps_mdio0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 10 11 MDIO0:MDIO MDIO0:MDC] -} elseif {$hps_mdio0_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 10 11 MDIO0:MDIO MDIO0:MDC] -} elseif {$hps_mdio0_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 10 11 MDIO0:MDIO MDIO0:MDC] -} - -if {$hps_mdio1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 8 9 MDIO1:MDIO MDIO1:MDC] -} elseif {$hps_mdio1_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 6 7 MDIO1:MDIO MDIO1:MDC] -} - -if {$hps_mdio2_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 6 7 MDIO2:MDIO MDIO2:MDC] -} elseif {$hps_mdio2_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 8 9 MDIO2:MDIO MDIO2:MDC] -} - -if {$hps_i2c0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 4 5 I2C0:SDA I2C0:SCL] -} elseif {$hps_i2c0_q2_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 10 11 I2C0:SDA I2C0:SCL] -} elseif {$hps_i2c0_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 2 3 I2C0:SDA I2C0:SCL] -} - -if {$hps_i2c1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 2 3 I2C1:SDA I2C1:SCL] -} elseif {$hps_i2c1_q2_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 8 9 I2C1:SDA I2C1:SCL] -} elseif {$hps_i2c1_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 6 7 I2C1:SDA I2C1:SCL] -} elseif {$hps_i2c1_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 0 1 I2C1:SDA I2C1:SCL] -} - -if {$hps_i2c_emac0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 10 11 I2CEMAC0:SDA I2CEMAC0:SCL] -} elseif {$hps_i2c_emac0_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 10 11 I2CEMAC0:SDA I2CEMAC0:SCL] -} elseif {$hps_i2c_emac0_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 10 11 I2CEMAC0:SDA I2CEMAC0:SCL] -} - -if {$hps_i2c_emac1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 8 9 I2CEMAC1:SDA I2CEMAC1:SCL] -} elseif {$hps_i2c_emac1_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 6 7 I2CEMAC1:SDA I2CEMAC1:SCL] -} - -if {$hps_i2c_emac2_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 6 7 I2CEMAC2:SDA I2CEMAC2:SCL] -} elseif {$hps_i2c_emac2_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 8 9 I2CEMAC2:SDA I2CEMAC2:SCL] -} elseif {$hps_i2c_emac2_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 8 9 I2CEMAC2:SDA I2CEMAC2:SCL] -} - -if {$hps_i3c0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 10 11 I3C0:SDA I3C0:SCL] -} elseif {$hps_i3c0_q2_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 6 7 I3C0:SDA I3C0:SCL] -} elseif {$hps_i3c0_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 6 7 I3C0:SDA I3C0:SCL] -} elseif {$hps_i3c0_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q3_assignment 4 5 I3C0:SDA I3C0:SCL] -} - -if {$hps_i3c1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 8 9 I3C1:SDA I3C1:SCL] -} elseif {$hps_i3c1_q2_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 4 5 I3C1:SDA I3C1:SCL] -} elseif {$hps_i3c1_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 4 5 I3C1:SDA I3C1:SCL] -} elseif {$hps_i3c1_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q3_assignment 2 3 I3C1:SDA I3C1:SCL] -} - -if {$hps_nand_q12_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 0 11 NAND:DATA0 NAND:DATA1 NAND:WE_N NAND:RE_N NAND:WP_N NAND:DATA2 NAND:DATA3 NAND:CLE NAND:DATA4 NAND:DATA5 NAND:DATA6 NAND:DATA7] -set io48_q2_assignment [lreplace $io48_q2_assignment 0 3 NAND:ALE NAND:RB_N NAND:CE_N NAND:DQS] - if {$hps_nand_16b_en == 1} { - set io48_q2_assignment [lreplace $io48_q2_assignment 0 11 NAND:ALE NAND:RB_N NAND:CE_N NAND:DQS NAND:DATA8 NAND:DATA9 NAND:DATA10 NAND:DATA11 NAND:DATA12 NAND:DATA13 NAND:DATA14 NAND:DATA15] - } -} elseif {$hps_nand_q34_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 0 11 NAND:DATA0 NAND:DATA1 NAND:WE_N NAND:RE_N NAND:WP_N NAND:DATA2 NAND:DATA3 NAND:CLE NAND:DATA4 NAND:DATA5 NAND:DATA6 NAND:DATA7] -set io48_q4_assignment [lreplace $io48_q4_assignment 0 3 NAND:ALE NAND:RB_N NAND:CE_N NAND:DQS] - if {$hps_nand_16b_en == 1} { - set io48_q4_assignment [lreplace $io48_q4_assignment 0 11 NAND:ALE NAND:RB_N NAND:CE_N NAND:DQS NAND:DATA8 NAND:DATA9 NAND:DATA10 NAND:DATA11 NAND:DATA12 NAND:DATA13 NAND:DATA14 NAND:DATA15] - } -} - -if {$hps_trace_q12_en} { -set io48_q2_assignment [lreplace $io48_q2_assignment 7 11 TRACE:CLK TRACE:D0 TRACE:D1 TRACE:D2 TRACE:D3] - if {$hps_trace_alt_en == 1} { - if {$hps_trace_8b_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 3 6 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_12b_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 11 11 TRACE:D11] - set io48_q1_assignment [lreplace $io48_q1_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_16b_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 7 11 TRACE:D15 TRACE:D14 TRACE:D13 TRACE:D12 TRACE:D11] - set io48_q1_assignment [lreplace $io48_q1_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } - } else { - if {$hps_trace_8b_en == 1} { - set io48_q2_assignment [lreplace $io48_q2_assignment 3 6 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_12b_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 11 11 TRACE:D11] - set io48_q2_assignment [lreplace $io48_q2_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_16b_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 7 11 TRACE:CLK TRACE:D0 TRACE:D1 TRACE:D2 TRACE:D3] - set io48_q2_assignment [lreplace $io48_q2_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } - } -} elseif {$hps_trace_q34_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 7 11 TRACE:CLK TRACE:D0 TRACE:D1 TRACE:D2 TRACE:D3] - if {$hps_trace_alt_en == 1} { - if {$hps_trace_8b_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 3 6 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_12b_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 11 11 TRACE:D11] - set io48_q3_assignment [lreplace $io48_q3_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_16b_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 7 11 TRACE:D15 TRACE:D14 TRACE:D13 TRACE:D12 TRACE:D11] - set io48_q3_assignment [lreplace $io48_q3_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } - } else { - if {$hps_trace_8b_en == 1} { - set io48_q4_assignment [lreplace $io48_q4_assignment 3 6 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_12b_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 11 11 TRACE:D11] - set io48_q4_assignment [lreplace $io48_q4_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_16b_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 7 11 TRACE:CLK TRACE:D0 TRACE:D1 TRACE:D2 TRACE:D3] - set io48_q4_assignment [lreplace $io48_q4_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } - } -} - -if {$hps_cm_q == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment [expr $hps_cm_io-1] [expr $hps_cm_io-1] HCLK:HPS_OSC_CLK] -} elseif {$hps_cm_q == 2} { -set io48_q2_assignment [lreplace $io48_q2_assignment [expr $hps_cm_io-1] [expr $hps_cm_io-1] HCLK:HPS_OSC_CLK] -} elseif {$hps_cm_q == 3} { -set io48_q3_assignment [lreplace $io48_q3_assignment [expr $hps_cm_io-1] [expr $hps_cm_io-1] HCLK:HPS_OSC_CLK] -} elseif {$hps_cm_q == 4} { -set io48_q4_assignment [lreplace $io48_q4_assignment [expr $hps_cm_io-1] [expr $hps_cm_io-1] HCLK:HPS_OSC_CLK] -} elseif {$hps_cm_alt_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 0 3 CM:PLL_CLK0 CM:PLL_CLK1 CM:PLL_CLK2 CM:PLL_CLK3] -} - -if {$hps_gpio0_en == 1} { - foreach io_num [split $hps_gpio0_list] { - if {$io_num < 12} { - set io48_q1_assignment [lreplace $io48_q1_assignment $io_num $io_num GPIO0:IO${io_num}] - #set io48_q1_assignment [lreplace $io48_q1_assignment $io_num $io_num GPIO0] - } else { - set io48_q2_assignment [lreplace $io48_q2_assignment [expr $io_num-12] [expr $io_num-12] GPIO0:IO${io_num}] - #set io48_q2_assignment [lreplace $io48_q2_assignment [expr $io_num-12] [expr $io_num-12] GPIO0] - } - } -} - -if {$hps_gpio1_en == 1} { - foreach io_num [split $hps_gpio1_list] { - if {$io_num < 12} { - set io48_q3_assignment [lreplace $io48_q3_assignment $io_num $io_num GPIO1:IO${io_num}] - #set io48_q3_assignment [lreplace $io48_q3_assignment $io_num $io_num GPIO1] - } else { - set io48_q4_assignment [lreplace $io48_q4_assignment [expr $io_num-12] [expr $io_num-12] GPIO1:IO${io_num}] - #set io48_q4_assignment [lreplace $io48_q4_assignment [expr $io_num-12] [expr $io_num-12] GPIO1] - } - } -} - -if {$hps_io_custom != ""} { - foreach {io_num value} $hps_io_custom { - if {$io_num < 12} { - set io48_q1_assignment [lreplace $io48_q1_assignment $io_num $io_num $value] - } elseif {$io_num <24} { - set io48_q2_assignment [lreplace $io48_q2_assignment [expr $io_num-12] [expr $io_num-12] $value] - } elseif {$io_num <36} { - set io48_q3_assignment [lreplace $io48_q3_assignment [expr $io_num-24] [expr $io_num-24] $value] - } elseif {$io_num <48} { - set io48_q4_assignment [lreplace $io48_q4_assignment [expr $io_num-36] [expr $io_num-36] $value] - } - } -} - -#puts "[llength $io48_q1_assignment]" -puts "Sorted IO48 assignment:\n$io48_q1_assignment\n$io48_q2_assignment\n$io48_q3_assignment\n$io48_q4_assignment\n" - - diff --git a/sm_soc_devkit_ghrd/jtag_subsys/agilex_io48.tcl b/sm_soc_devkit_ghrd/jtag_subsys/agilex_io48.tcl deleted file mode 100755 index 32a74bf..0000000 --- a/sm_soc_devkit_ghrd/jtag_subsys/agilex_io48.tcl +++ /dev/null @@ -1,191 +0,0 @@ -#**************************************************************************** -# -# SPDX-License-Identifier: MIT-0 -# Copyright(c) 2019-2021 Intel Corporation. -# -#**************************************************************************** -# -# This file host all the enabled HPS Daugther Card -# -#**************************************************************************** -# -# -# Following are HPS IO quadrants feature for individual peripherals -# Variable naming convention: hps___en -# Set default of veriables disable - - # -- the quadrant # of CM:HPS_OSC_CLK selected - # -- the IO # within a quadrant for CM:HPS_OSC_CLK -set hps_cm_q 0 -set hps_cm_io 0 -set hps_pll_clk0_en 0 -set hps_pll_clk1_en 0 -set hps_pll_clk2_en 0 -set hps_pll_clk3_en 0 -set hps_jtag_en 0 -set hps_spim0_q1_en 0 -set hps_spim0_q4_en 0 -set hps_spim1_q1_en 0 -set hps_spim1_q2_en 0 -set hps_spim1_q3_en 0 -set hps_spis0_q1_en 0 -set hps_spis0_q2_en 0 -set hps_spis0_q3_en 0 -set hps_spis1_q1_en 0 -set hps_spis1_q3_en 0 -set hps_spis1_q4_en 0 -set hps_uart0_q1_en 0 -set hps_uart0_q2_en 0 -set hps_uart0_q3_en 0 -set hps_uart1_q1_en 0 -set hps_uart1_q3_en 0 -set hps_i2c0_q1_en 0 -set hps_i2c0_q2_en 0 -set hps_i2c0_q3_en 0 -set hps_i2c1_q1_en 0 -set hps_i2c1_q2_en 0 -set hps_i2c1_q3_en 0 -set hps_i2c1_q4_en 0 -set hps_i2c_emac0_q1_en 0 -set hps_i2c_emac0_q3_en 0 -set hps_i2c_emac0_q4_en 0 -set hps_i2c_emac1_q1_en 0 -set hps_i2c_emac1_q4_en 0 -set hps_i2c_emac2_q1_en 0 -set hps_i2c_emac2_q3_en 0 -set hps_i2c_emac2_q4_en 0 -set hps_pps_emac0_q1_en 0 -set hps_pps_emac0_q3_en 0 -set hps_pps_emac1_q1_en 0 -set hps_pps_emac2_q1_en 0 -set hps_pps_emac2_q3_en 0 -set hps_trig_emac0_q1_en 0 -set hps_trig_emac0_q3_en 0 -set hps_trig_emac1_q1_en 0 -set hps_trig_emac2_q1_en 0 -set hps_trig_emac2_q3_en 0 -set hps_emac0_q2_en 0 -set hps_emac1_q3_en 0 -set hps_emac2_q4_en 0 -set hps_mdio0_q1_en 0 -set hps_mdio0_q3_en 0 -set hps_mdio0_q4_en 0 -set hps_mdio1_q1_en 0 -set hps_mdio1_q4_en 0 -set hps_mdio2_q3_en 0 -set hps_i3c0_q1_en 0 -set hps_i3c0_q2_en 0 -set hps_i3c0_q3_en 0 -set hps_i3c0_q4_en 0 -set hps_i3c1_q1_en 0 -set hps_i3c1_q2_en 0 -set hps_i3c1_q3_en 0 -set hps_i3c1_q4_en 0 -set hps_nand_q12_en 0 -set hps_nand_q34_en 0 -set hps_sdmmc4b_q1_en 0 -set hps_sdmmc8b_q1_en 0 -set hps_sdmmc_wp_q1_en 0 -set hps_sdmmc_pupd_q2_en 0 -set hps_sdmmc_pwr_q2_en 0 -set hps_sdmmc_dstrb_q2_en 0 -set hps_sdmmc4b_q3_en 0 -set hps_sdmmc8b_q3_en 0 -set hps_sdmmc_wp_q3_en 0 -set hps_sdmmc_pupd_q4_en 0 -set hps_sdmmc_pwr_q4_en 0 -set hps_sdmmc_dstrb_q4_en 0 -set hps_usb0_en 0 -set hps_usb1_en 0 -set hps_trace_en 0 -set hps_gpio0_en 0 -set hps_gpio0_list "" -set hps_gpio1_en 0 -set hps_gpio1_list "" - - -if {$daughter_card == "devkit_dc_oobe"} { -set hps_cm_q 1 -set hps_cm_io 1 -set hps_gpio0_en 1 -set hps_gpio0_list "1 10 11" -set hps_uart0_q1_en 1 -set hps_emac2_q1_en 1 -set hps_mdio2_q1_en 1 -#temporary turn off I3C for first compilation succeed -set hps_i3c1_q1_en 1 -set hps_usb1_en 1 -#temporary turn off sdmmc for first compilation succeed -set hps_sdmmc4b_q3_en 1 -set hps_gpio1_en 1 -set hps_gpio1_list "3 4" -set hps_jtag_en 1 -set hps_emac2_rgmii_en 1 - -} elseif {$daughter_card == "devkit_dc_nand"} { -set hps_emac0_q1_en 1 -set hps_uart0_q1_en 1 -set hps_i2c0_q1_en 1 -set hps_gpio0_en 1 -set hps_gpio0_list "6 7" -set hps_i3c1_q1_en 1 -set hps_mdio0_q1_en 1 -set hps_emac0_rgmii_en 1 -set hps_nand_q34_en 1 -set hps_gpio1_en 1 -set hps_gpio1_list "16 19" -set hps_cm_q 4 -set hps_cm_io 6 -set hps_spis1_q4_en 1 - -} elseif {$daughter_card == "debug2"} { -set hps_emac0_q1_en 1 -set hps_uart0_q1_en 1 -set hps_spim0_q1_en 1 -set hps_i3c1_q1_en 1 -set hps_mdio0_q1_en 1 -set hps_emac0_rgmii_en 1 -set hps_sdmmc4b_q3_en 1 -set hps_gpio1_en 1 -set hps_gpio1_list "3 4" -set hps_jtag_en 1 -set hps_sdmmc_pupd_q4_en 1 -set hps_cm_q 4 -set hps_cm_io 2 -set hps_trace_q34_en 1 -set hps_trace_8b_en 1 - -} elseif {$daughter_card == "tsn_phy_aic0"} { -set hps_emac0_q1_en 1 -set hps_uart0_q1_en 1 -set hps_emac2_q1_en 1 -set hps_mdio2_q1_en 1 -set hps_cm_q 1 -set hps_cm_io 10 -set hps_mdio0_q1_en 1 -set hps_emac0_rgmii_en 1 -set hps_sdmmc4b_q1_en 1 -#set hps_sdmmc4b_q1_sel_en 1 -#set hps_sdmmc4b_q1_alt_en 1 -set hps_jtag_en 1 -set hps_emac2_rgmii_en 1 - -} elseif {$daughter_card == "tsn_phy_aic2"} { -set hps_emac0_q1_en 1 -set hps_emac1_q1_en 1 -set hps_emac2_q1_en 1 -set hps_mdio2_q1_en 1 -set hps_mdio1_q1_en 1 -set hps_mdio0_q1_en 1 -set hps_emac0_rgmii_en 1 -set hps_emac1_rgmii_en 1 -set hps_emac2_rgmii_en 1 - -} elseif {$daughter_card == "none"} { -puts "Disable all HPS IO48 IO" -set hps_io_off 1 - -} else { -puts "Inserted daughter_card variant: $daughter_card NOT supported" -} - diff --git a/sm_soc_devkit_ghrd/jtag_subsys/arguments_solver.tcl b/sm_soc_devkit_ghrd/jtag_subsys/arguments_solver.tcl deleted file mode 100755 index f5dc059..0000000 --- a/sm_soc_devkit_ghrd/jtag_subsys/arguments_solver.tcl +++ /dev/null @@ -1,424 +0,0 @@ -#**************************************************************************** -# -# SPDX-License-Identifier: MIT-0 -# Copyright(c) 2019-2021 Intel Corporation. -# -#**************************************************************************** -# -# This file resolves all passed in arguments into GHRD understood parameterizable setting - -# Following are list of arguments supported and its valid values for current subsystem -# device_family : -# device : -# subsys_name : -# project_name : -# board : devkit, mUDV2, mUDV1, char, cypress, hemon, lookout, mcgowan, pyramid -# hps_emif_en : 1 or 0 -# hps_emif_ecc_en : 1 or 0 -# hps_first_config : 1 or 0 HPS initialization sequence. HPS_FIRST or FPGA_FIRST -# h2f_width : 128, 64, 32 or 0(as disable) -# f2h_width : 256 or 0(as disable) -# f2sdram_width : 0:Unused, 256-bit"} -# lwh2f_width : 32 or 0(as disable) -# hps_f2s_irq_en : 1 or 0 -# daughter_card : Daughter card selection, either "none" -# hps_f2h_irq_en : 1 or 0 -# f2h_free_clk_en : 1 or 0 -# -# Each argument made available for configuration has a default value in design_config.tcl file -# The value can be passed in through Makefile. -# -# -# hps_emif_en, -# hps_emif_ecc_en, -# io48_dc, -# h2f_width, -# f2h_width, -# lwh2f_width, -# f2sdram_width, -# hps_first_config, -# hps_f2h_irq_en, -# f2h_free_clk_en - -#**************************************************************************** - -source ./design_config.tcl - - -proc check_then_accept { param } { - if {$param == device_family || device || qsys_name || project_name} { - puts "-- Accepted paramter \$param = $param" - } else { - puts "Warning: Inserted parameter \"$param\" is not supported for this script. " - } -} - - -if { ![ info exists device_family ] } { - set device_family $DEVICE_FAMILY -} else { - puts "-- Accepted parameter \$device_family = $device_family" -} - -if { ![ info exists device ] } { - set device $DEVICE -} else { - puts "-- Accepted parameter \$device = $device" -} - -if { ![ info exists subsys_name ] } { - set subsys_name $SUBSYS_NAME -} else { - puts "-- Accepted parameter \$subsys_name = $subsys_name" -} - -# if { ![ info exists project_name ] } { - # set project_name $PROJECT_NAME -# } else { - # puts "-- Accepted parameter \$project_name = $project_name" -# } - -# if { ![ info exists top_name ] } { - # set top_name $TOP_NAME -# } else { - # puts "-- Accepted parameter \$top_name = $top_name" -# } - -# if { ![ info exists clk_gate_en ] } { - # set clk_gate_en $CLK_GATE_EN -# } else { - # puts "-- Accepted parameter \$clk_gate_en = $clk_gate_en" -# } - -## ---------------- -## Board -## ---------------- - -if { ![ info exists board ] } { - set board $BOARD -} else { - puts "-- Accepted parameter \$board = $board" -} - -# if { ![ info exists board_pwrmgt ] } { - # set board_pwrmgt $BOARD_PWRMGT -# } else { - # puts "-- Accepted parameter \$board_pwrmgt = $board_pwrmgt" -# } - -# Loading Board default configuration settings -# set board_config_file "./board/board_${board}_config.tcl" -# if {[file exist $board_config_file]} { - # source $board_config_file -# } else { - # error "Error: $board_config_file not exist!! Please make sure the board settings files are included in folder ./board/" -# } - -#qsys generate consume this arguments -# if { ![ info exists fpga_peripheral_en ] } { - # set fpga_peripheral_en $FPGA_PERIPHERAL_EN -# } else { - # puts "-- Accepted parameter \$fpga_peripheral_en = $fpga_peripheral_en" -# } -# if { $fpga_peripheral_en == 1} { - # if {[ info exists isPeriph_pins_available ] } { - # if { $isPeriph_pins_available == 0} { - # set fpga_peripheral_en 0 - # puts "-- Turn OFF fpga_peripheral_en because \"isPeriph_pins_available\" is disable" - # } - # } else { - # set fpga_peripheral_en 0 - # puts "-- Turn OFF fpga_peripheral_en because \"isPeriph_pins_available\" is not available" - # } -# } - -## ---------------- -## OCM -## ---------------- - -# if { ![ info exists jtag_ocm_en ] } { - # set jtag_ocm_en $JTAG_OCM_EN -# } else { - # puts "-- Accepted parameter \$jtag_ocm_en = $jtag_ocm_en" -# } - -# if { ![ info exists ocm_datawidth ] } { - # set ocm_datawidth $OCM_DATAWIDTH -# } else { - # puts "-- Accepted parameter \$ocm_datawidth = $ocm_datawidth" -# } - -# if { ![ info exists ocm_memsize ] } { - # set ocm_memsize $OCM_MEMSIZE -# } else { - # puts "-- Accepted parameter \$ocm_memsize = $ocm_memsize" -# } - -## ---------------- -## HPS -## ---------------- - -if { ![ info exists hps_emif_en ] } { - set hps_emif_en $HPS_EMIF_EN -} else { - puts "-- Accepted parameter \$hps_emif_en = $hps_emif_en" -} - -if { ![ info exists hps_f2h_irq_en ] } { - set hps_f2h_irq_en $HPS_F2H_IRQ_EN -} else { - puts "-- Accepted parameter \$hps_f2h_irq_en = $hps_f2h_irq_en" -} - -if { ![ info exists f2h_free_clk_en ] } { - set f2h_free_clk_en $F2H_FREE_CLK_EN -} else { - puts "-- Accepted parameter \$f2h_free_clk_en = $f2h_free_clk_en" -} - -# if { ![ info exists hps_en ] } { - # set hps_en $HPS_EN -# } else { - # puts "-- Accepted parameter \$hps_en = $hps_en" -# } - -if { ![ info exists sys_initialization ] } { - set sys_initialization $SYS_INITIALIZATION -} else { - puts "-- Accepted parameter \$sys_initialization = $sys_initialization" -} - -if { ![ info exists hps_first_config ] } { - set hps_first_config $HPS_FIRST_CONFIG -} else { - puts "-- Accepted parameter \$hps_first_config = $hps_first_config" -} - - -##to be deleted -# if { ![ info exists hps_dap_mode ] } { - # set hps_dap_mode $HPS_DAP_MODE -# } else { - # puts "-- Accepted parameter \$hps_dap_mode = $hps_dap_mode" -# } - -# if { ![ info exists user0_clk_src_select ] } { - # set user0_clk_src_select $USER0_CLK_SRC_SELECT -# } else { - # puts "-- Accepted parameter \$user0_clk_src_select = $user0_clk_src_select" -# } - -# if { ![ info exists user0_clk_freq ] } { - # set user0_clk_freq $USER0_CLK_FREQ -# } else { - # puts "-- Accepted parameter \$user0_clk_freq = $user0_clk_freq" -# } - -# if { ![ info exists user1_clk_src_select ] } { - # set user1_clk_src_select $USER1_CLK_SRC_SELECT -# } else { - # puts "-- Accepted parameter \$user1_clk_src_select = $user1_clk_src_select" -# } - -# if { ![ info exists user1_clk_freq ] } { - # set user1_clk_freq $USER1_CLK_FREQ -# } else { - # puts "-- Accepted parameter \$user1_clk_freq = $user1_clk_freq" -# } - -if { ![ info exists h2f_width ] } { - set h2f_width $H2F_WIDTH -} else { - puts "-- Accepted parameter \$h2f_width = $h2f_width" -} - -if { ![ info exists f2s_data_width ] } { - set f2s_data_width $F2S_DATA_WIDTH -} else { - puts "-- Accepted parameter \$f2s_data_width = $f2s_data_width" -} - -# if { ![ info exists f2s_address_width ] } { - # set f2s_address_width $F2S_ADDRESS_WIDTH -# } else { - # puts "-- Accepted parameter \$f2s_address_width = $f2s_address_width" -# } - -if { ![ info exists f2sdram_width ] } { - set f2sdram_width $F2SDRAM_WIDTH -} else { - puts "-- Accepted parameter \$f2sdram_width = $f2sdram_width" -} - -if { ![ info exists f2sdram_addr_width ] } { - set f2sdram_addr_width $F2SDRAM_ADDR_WIDTH -} else { - puts "-- Accepted parameter \$f2sdram_addr_width = $f2sdram_addr_width" -} - -if { ![ info exists f2h_width ] } { - set f2h_width $F2H_WIDTH -} else { - puts "-- Accepted parameter \$f2h_width = $f2h_width" -} - -if { ![ info exists lwh2f_width ] } { - set lwh2f_width $LWH2F_WIDTH -} else { - puts "-- Accepted parameter \$lwh2f_width = $lwh2f_width" -} - -if { ![ info exists h2f_addr_width ] } { - set h2f_addr_width $H2F_ADDR_WIDTH -} else { - puts "-- Accepted parameter \$h2f_addr_width = $h2f_addr_width" -} - -if { ![ info exists f2h_addr_width ] } { - set f2h_addr_width $F2H_ADDR_WIDTH -} else { - puts "-- Accepted parameter \$f2h_addr_width = $f2h_addr_width" -} - -if { ![ info exists lwh2f_addr_width ] } { - set lwh2f_addr_width $LWH2F_ADDR_WIDTH -} else { - puts "-- Accepted parameter \$lwh2f_addr_width = $lwh2f_addr_width" -} - -# if { ![ info exists h2f_clk_source ] } { - # set h2f_clk_source $H2F_CLK_SOURCE -# } else { - # puts "-- Accepted parameter \$h2f_clk_source = $h2f_clk_source" -# } - -# if { ![ info exists f2h_clk_source ] } { - # set f2h_clk_source $F2H_CLK_SOURCE -# } else { - # puts "-- Accepted parameter \$f2h_clk_source = $f2h_clk_source" -# } - -# if { ![ info exists lwh2f_clk_source ] } { - # set lwh2f_clk_source $LWH2F_CLK_SOURCE -# } else { - # puts "-- Accepted parameter \$lwh2f_clk_source = $lwh2f_clk_source" -# } - -# if { ![ info exists ocm_clk_source ] } { - # set ocm_clk_source $OCM_CLK_SOURCE -# } else { - # puts "-- Accepted parameter \$ocm_clk_source = $ocm_clk_source" -# } - -# if { ![ info exists secure_f2h_axi_slave ] } { - # set secure_f2h_axi_slave $SECURE_F2H_AXI_SLAVE -# } else { - # puts "-- Accepted parameter \$secure_f2h_axi_slave = $secure_f2h_axi_slave" -# } - -# if { ![ info exists hps_peri_irq_loopback_en ] } { - # set hps_peri_irq_loopback_en $HPS_PERI_IRQ_LOOPBACK_EN -# } else { - # puts "-- Accepted parameter \$hps_peri_irq_loopback_en = $hps_peri_irq_loopback_en" -# } - -if { ![ info exists hps_f2s_irq_en ] } { - set hps_f2s_irq_en $HPS_F2S_IRQ_EN -} else { - puts "-- Accepted parameter \$hps_f2s_irq_en = $hps_f2s_irq_en" -} - -if { ![ info exists daughter_card ] } { - set daughter_card $DAUGHTER_CARD -} else { - puts "-- Accepted parameter \$daughter_card = $daughter_card" -} - -# if { ![ info exists cross_trigger_en ] } { - # set cross_trigger_en $CROSS_TRIGGER_EN -# } else { - # puts "-- Accepted parameter \$cross_trigger_en = $cross_trigger_en" -# } - -# if { ![ info exists hps_stm_en ] } { - # set hps_stm_en $HPS_STM_EN -# } else { - # puts "-- Accepted parameter \$hps_stm_en = $hps_stm_en" -# } - -# if { ![ info exists ftrace_en ] } { - # set ftrace_en $FTRACE_EN -# } else { - # puts "-- Accepted parameter \$ftrace_en = $ftrace_en" -# } - -# if { ![ info exists ftrace_output_width ] } { - # set ftrace_output_width $FTRACE_OUTPUT_WIDTH -# } else { - # puts "-- Accepted parameter \$ftrace_output_width = $ftrace_output_width" -# } - -# if { ![ info exists hps_pll_source_export ] } { - # set hps_pll_source_export $HPS_PLL_SOURCE_EXPORT -# } else { - # puts "-- Accepted parameter \$hps_pll_source_export = $hps_pll_source_export" -# } - -# if { ![ info exists reset_watchdog_en ] } { - # set reset_watchdog_en $RESET_WATCHDOG_EN -# } else { - # puts "-- Accepted parameter \$reset_watchdog_en = $reset_watchdog_en" -# } - -# if { ![ info exists reset_hps_warm_en ] } { - # set reset_hps_warm_en $RESET_HPS_WARM_EN -# } else { - # puts "-- Accepted parameter \$reset_hps_warm_en = $reset_hps_warm_en" -# } - -# if { ![ info exists reset_h2f_cold_en ] } { - # set reset_h2f_cold_en $RESET_H2F_COLD_EN -# } else { - # puts "-- Accepted parameter \$reset_h2f_cold_en = $reset_h2f_cold_en" -# } - -# if { ![ info exists reset_sdm_watchdog_cfg ] } { - # set reset_sdm_watchdog_cfg $RESET_SDM_WATCHDOG_CFG -# } else { - # puts "-- Accepted parameter \$reset_sdm_watchdog_cfg = $reset_sdm_watchdog_cfg" -# } - -# ---------------- -# Parameter Auto Derivation -# ---------------- - -# Default option -set hps_io_off 0 - -# if {$hps_en == 1} { -# puts "Solver INFO: hps ENABLED" -# } else { -# puts "Solver INFO: NO hps" -# } - -# if {$board == "char"} { -# puts "Warning: Overriding Settings for Char BOARD" -# set user0_clk_src_select 1 -# set fpga_peripheral_en 0 -# } - -# for cct_adapter -# if {$f2s_address_width > 32 && $f2sdram_width > 0} { - # set cct_en 1 - # set cct_control_interface 2 -# } else { - # set cct_en 0 -# } - -source ./agilex_hps_pinmux_solver.tcl -source ./agilex_hps_parameter_solver.tcl -source ./agilex_hps_io48_delay_chain_solver.tcl - -# Was thinking to enable single TCL entry for flow of TOP RTL, qsys, quartus generation. Ideal still pending implementation -# exec quartus_sh --script=create_ghrd_quartus.tcl $top_quartus_arg -# exec qsys-script --script=create_ghrd_qsys.tcl --quartus-project=$project_name.qpf --cmd="$qsys_arg" diff --git a/sm_soc_devkit_ghrd/jtag_subsys/design_config.tcl b/sm_soc_devkit_ghrd/jtag_subsys/design_config.tcl deleted file mode 100755 index fcf1ea1..0000000 --- a/sm_soc_devkit_ghrd/jtag_subsys/design_config.tcl +++ /dev/null @@ -1,106 +0,0 @@ -#**************************************************************************** -# -# SPDX-License-Identifier: MIT-0 -# Copyright(c) 2019-2021 Intel Corporation. -# -#**************************************************************************** -# USAGE OF THIS FILE -# ------------------ -# Parameters set in this file are served as default value to configure GHRD for generation. -# Higher level sripts that call upon create_ghrd_*.tcl can over-write value of parameters -# by arguments to be passed in during execution of script. -# -#**************************************************************************** - -set SUBSYS_NAME subsys_abc -set PROJECT_NAME ghrd_agilex -set TOP_NAME ghrd_agilex5_top -set DEVICE_FAMILY "Agilex 5" -set DEVICE A5ED065BB32AE5SR0 - -##### features of GHRD enabling ##### - -# setting to enable clock gating for NINIT_DONE -set CLK_GATE_EN 0 - -## ---------------- -## Board -## ---------------- - -set BOARD "hidden" -# Only valid for board="DK-SI-AGF014E"; "enpirion" or "linear" -#set BOARD_PWRMGT "linear" - -# IO48 DAUGHTER_CARD, available options such as "devkit_dc_oobe", "devkit_dc_nand", "devkit_dc_emmc" -set DAUGHTER_CARD "devkit_dc_oobe" - -set HPS_FIRST_CONFIG 0 -## ---------------- -## HPS -## ---------------- - -# Option to enable Hard Processor System -set HPS_EN 1 -# Option to enable H2F User Clock0 Output Port -set USER0_CLK_SRC_SELECT 0 -set USER1_CLK_SRC_SELECT 0 -set USER0_CLK_FREQ 500 -set USER1_CLK_FREQ 500 - - -set HPS_F2H_IRQ_EN 0 -set F2H_FREE_CLK_EN 0 -# Option to enable HPS EMIF -set HPS_EMIF_EN 0 - -# Option to enable HPS initialization first or after FPGA initialization done -set SYS_INITIALIZATION "fpga" - -# Option to select HPS debug access port modes -set HPS_DAP_MODE 2 - -# Option to enable Fast Trace x32/x16 routed via FPGA, Fast Trace and Early Trace are exclusively exist -set FTRACE_EN 0 - -# Option to select x32/x16 output width for Fast Trace routed via FPGA -set FTRACE_OUTPUT_WIDTH 16 - -# Option to export the HPS PLL reference clock source to be feed by F2S clock -set HPS_PLL_SOURCE_EXPORT 0 - -# Option to enable WatchDog reset -set RESET_WATCHDOG_EN 0 - -# Option to enable HPS Warm Reset -set RESET_HPS_WARM_EN 0 - -# Option to enable HPS-to-FPGA Cold Reset -set RESET_H2F_COLD_EN 0 - -# Option to select how the SDM handles the watchdog reset -set RESET_SDM_WATCHDOG_CFG 0 - -# Options to enable and set width of each AXI Bridge -set H2F_WIDTH 128 -set F2H_WIDTH 64 -set LWH2F_WIDTH 32 -set F2S_DATA_WIDTH 256 -set F2S_ADDRESS_WIDTH 32 -set F2SDRAM_WIDTH 256 -set F2SDRAM_ADDR_WIDTH 32 -set H2F_F2H_LOOPBACK_EN 0 -set LWH2F_F2H_LOOPBACK_EN 0 -set F2H_ADDR_WIDTH 32 -set H2F_ADDR_WIDTH 38 -set LWH2F_ADDR_WIDTH 29 -set F2H_CLK_SOURCE 0 -set H2F_CLK_SOURCE 0 -set LWH2F_CLK_SOURCE 0 -set OCM_CLK_SOURCE 0 -set SECURE_F2H_AXI_SLAVE 0 -set HPS_PERI_IRQ_LOOPBACK_EN 0 -set HPS_F2S_IRQ_EN 1 - -# setting to enable Cross Triggering -set CROSS_TRIGGER_EN 0 -set HPS_STM_EN 0 diff --git a/sm_soc_devkit_ghrd/jtag_subsys/utils.tcl b/sm_soc_devkit_ghrd/jtag_subsys/utils.tcl deleted file mode 100755 index 3bf268b..0000000 --- a/sm_soc_devkit_ghrd/jtag_subsys/utils.tcl +++ /dev/null @@ -1,332 +0,0 @@ -#**************************************************************************** -# -# SPDX-License-Identifier: MIT-0 -# Copyright(c) 2017-2020 Intel Corporation. -# -#**************************************************************************** -# -# This file contail TCL procedures as ultilities for Lego based GHRD creation -# Kindly source this file for Lego blocks creation - -# --- Procedure to add component together with parameterization --- # -# means to have , , followed by pairs -# -#**************************************************************************** - -proc add_component_param {args} { - set lpos 0 - set length [llength $args] - # puts "Length of argument: $length" - # puts "LIST become $args" - - #array set arg $args - #set argss [array get arg] - #puts "... $argss" -#regsub -all "({) (})" $args "" stripped -#puts "stripped LIST become $stripped" - -set splitted [split $args { }] -set length [llength [list $splitted]] -# puts "Length of splitted argument: $length" - -if {[llength $args] == 1} {set arguments [lindex $args 0]} -# puts "stripped LIST become $arguments" -# set length [llength $arguments] -# puts "Length of stripped: $length" - -# Retrieve the first arg as component name -set component_type [lindex $arguments 0] -set arguments [lreplace $arguments 0 0] -# puts "1st arguments become $arguments" -# puts "Component Type: $component_type" - -# Retrieve the 2nd arg as instance name -set instance_name [lindex $arguments 0] -set arguments [lreplace $arguments 0 0] -# puts "2nd arguments become $arguments" -# puts "Instance Name: $instance_name" - -# Retrieve the 4th arg as ip file path, 3rd arg as it is just label -set ip_file_path [lindex $arguments 1] -for {set i 0} {$i < 2} {incr i} { -set arguments [lreplace $arguments 0 0] -} -# puts "4th arguments become $arguments" -# puts "IP File Path: $ip_file_path" - -# Add component instance into design -add_component $instance_name $ip_file_path $component_type -# add_component ILC ip/ghrd_10as066n2/ghrd_10as066n2_ILC.ip interrupt_latency_counter ILC -# add_component clk_100 ip/$qsys_name/clk_100.ip altera_clock_bridge clk_100_inst - -# Load component instance into design for parameterization setup -load_component $instance_name - -# puts "Final arguments become $arguments" - -# puts "3rd arguments become $arguments" -# Check if parameter->value pairs matched -set parameter "" -set value "" -if {[llength $arguments]%2 == 0} { - foreach item $arguments { - if {$lpos %2 == 0} { - set parameter $item - puts "Param:\[$item\]" - } else { - set value $item - puts "Value:\[$item\]" - } - if {$lpos %2 == 1} {set_component_parameter_value $parameter $value} - incr lpos - } - #Save component instance after parameterization - save_component - return 0 - } else { - puts "\[Component: $component_type\]Inserted parameter->value pair has ODD arguments, please verify correntness." - } -} - -# --- Procedure to modify only component instance parameters --- # -# Component instance must be already instantiated into qsys system before this procedure is called -# means to have followed by pairs -proc set_component_param {args} { - set lpos 0 - set length [llength $args] - puts "Length of argument: $length" - # puts "LIST become $args" - - # Retrieve fresh argument from sourcing TCL to get all elements - if {[llength $args] == 1} {set arguments [lindex $args 0]} - - # puts "stripped LIST become $arguments" - set length [llength $arguments] - # puts "Length of stripped: $length" - - # Retrieve the 1st arg as instance name - set instance_name [lindex $arguments 0] - set arguments [lreplace $arguments 0 0] - puts "Instance Name: $instance_name" - - # Load component instance into design for parameterization setup - load_component $instance_name - - # Check if parameter->value pairs matched - set parameter "" - set value "" - if {[llength $arguments]%2 == 0} { - foreach item $arguments { - if {$lpos %2 == 0} { - set parameter $item - puts "Param:\[$item\]" - } else { - set value $item - puts "Value:\[$item\]" - } - if {$lpos %2 == 1} {set_component_parameter_value $parameter $value} - incr lpos - } - #Save component instance after parameterization - save_component - return 0 - } else { - puts "\[Instance: $instance_name\]Inserted parameter->value pair has ODD arguments, please verify correntness." - } -} - -# --- Procedure to add instance together with parameterization --- # -# means to have followed by pairs -proc add_instance_param {args} { - set lpos 0 - set length [llength $args] - # puts "Length of argument: $length" - # puts "LIST become $args" - - #array set arg $args - #set argss [array get arg] - #puts "... $argss" -#regsub -all "({) (})" $args "" stripped -#puts "stripped LIST become $stripped" - -#set splitted [split $args { }] -#set length [llength [list $splitted]] -#puts "Length of splitted argument: $length" - -if {[llength $args] == 1} {set arguments [lindex $args 0]} -# puts "stripped LIST become $arguments" -set length [llength $arguments] -# puts "Length of stripped: $length" - -# Retrieve the first arg as component name -set component_name [lindex $arguments 0] -set arguments [lreplace $arguments 0 0] -# puts "1st arguments become $arguments" -# puts "Component Name: $component_name" - -# Retrieve the 2nd arg as instance name -set instance_name [lindex $arguments 0] -set arguments [lreplace $arguments 0 0] -# puts "2nd arguments become $arguments" -# puts "Instance Name: $instance_name" - -# Add component instance into design -add_instance $instance_name $component_name - -# puts "3rd arguments become $arguments" -# Check if parameter->value pairs matched -set parameter "" -set value "" -if {[llength $arguments]%2 == 0} { - foreach item $arguments { - if {$lpos %2 == 0} { - set parameter $item - puts "Param:\[$item\]" - } else { - set value $item - puts "Value:\[$item\]" - } - if {$lpos %2 == 1} {set_instance_parameter_value $instance_name $parameter $value} - incr lpos - } - return 0 - - } else { - puts "\[Component: $component_name\]Inserted parameter->value pair has ODD arguments, please verify correntness." - } -} - - -# --- Procedure to modify only instance parameters --- # -# Instance must be already instantiated into qsys system before this procedure is called -# means to have followed by pairs -proc set_instance_param {args} { - set lpos 0 - set length [llength $args] - puts "Length of argument: $length" - # puts "LIST become $args" - - # Retrieve fresh argument from sourcing TCL to get all elements - if {[llength $args] == 1} {set arguments [lindex $args 0]} - - # puts "stripped LIST become $arguments" - set length [llength $arguments] - # puts "Length of stripped: $length" - - # Retrieve the 1st arg as instance name - set instance_name [lindex $arguments 0] - set arguments [lreplace $arguments 0 0] - puts "Instance Name: $instance_name" - - # Check if parameter->value pairs matched - set parameter "" - set value "" - if {[llength $arguments]%2 == 0} { - foreach item $arguments { - if {$lpos %2 == 0} { - set parameter $item - puts "Param:\[$item\]" - } else { - set value $item - puts "Value:\[$item\]" - } - if {$lpos %2 == 1} {set_instance_parameter_value $instance_name $parameter $value} - incr lpos - } - return 0 - - } else { - puts "\[Instance: $instance_name\]Inserted parameter->value pair has ODD arguments, please verify correntness." - } -} - - -# --- Procedure to establish connection between two instances ports --- # -# means to have and pairs -proc connect {args} { - set lpos 0 - set length [llength $args] - puts "Length of argument: $length" - # puts "LIST become $args" - - # Retrieve fresh argument from sourcing TCL to get all elements - if {[llength $args] == 1} {set arguments [lindex $args 0]} - - # puts "stripped LIST become $arguments" - set length [llength $arguments] - # puts "Length of stripped: $length" - - # Check if parameter->value pairs matched - set parameter "" - set value "" - if {[llength $arguments]%2 == 0} { - foreach item $arguments { - if {$lpos %2 == 0} { - set src $item - puts "From:\[$item\]" - } else { - set dst $item - puts "connect To:\[$item\]" - } - if {$lpos %2 == 1} {add_connection $src $dst} - incr lpos - } - return 0 - - } else { - puts "\[Intended connections has Odd pair of source --> destination. Please verify correntness." - } -} - - -# --- Procedure to establish connection between two instances ports with base address --- # -# means to have , and -proc connect_map {args} { - set lpos 0 - set length [llength $args] - puts "Length of argument: $length" - # puts "LIST become $args" - - # Retrieve fresh argument from sourcing TCL to get all elements - if {[llength $args] == 1} {set arguments [lindex $args 0]} - - #puts "stripped LIST become $arguments" - set length [llength $arguments] - puts "Length of arguments: $length" - - # Check if parameter->value pairs matched - set parameter "" - set value "" - if {[llength $arguments]%3 == 0} { - #foreach item $arguments { - # if {$lpos %2 == 0} { - # set src $item - # puts "From:\[$item\]" - # } else { - # set dst $item - # puts "connect To:\[$item\]" - # } - # if {$lpos %2 == 1} {add_connection $src $dst} - # incr lpos - #} - foreach {src dest offset} $arguments { - add_connection $src $dest - set_connection_parameter_value $src/$dest baseAddress $offset - } - return 0 - - } else { - puts "\[Intended connections has Odd pair of source --> destination. Please verify correntness." - } -} - -# --- Procedure to export instance port --- # -# EXPORT procedure set to export instances port to the top level of Qsys design -# Argument means to have and pairs -proc export {instance port name} { - set_interface_property $name EXPORT_OF ${instance}.${port} -} - -proc wsplit {str sepStr} { - split [string map [list $sepStr \0] $str] \0] -} diff --git a/sm_soc_devkit_ghrd/peripheral_subsys/Makefile b/sm_soc_devkit_ghrd/peripheral_subsys/Makefile index ac99d68..6da3a61 100755 --- a/sm_soc_devkit_ghrd/peripheral_subsys/Makefile +++ b/sm_soc_devkit_ghrd/peripheral_subsys/Makefile @@ -30,7 +30,7 @@ GHRD_SCRIPT_FILE := $(PROJECT_ROOT)/scripts/config_parzer.awk .PHONY: generate_from_tcl generate_from_tcl: - ifeq ($(JTAG_EN), $(ENABLE)) + ifeq ($(SUB_PERI_EN), $(ENABLE)) @qsys-script $(shell echo $(QSYS_ARGS) | sed 's/quartus-project=/quartus-project=..\//g') --script=./construct_subsys_peripheral.tcl $(QSYS_TCL_ARGS) else @echo "peripheral_subsys does not be enabled, skip." diff --git a/sm_soc_devkit_ghrd/peripheral_subsys/agilex_hps_io48_delay_chain_solver.tcl b/sm_soc_devkit_ghrd/peripheral_subsys/agilex_hps_io48_delay_chain_solver.tcl deleted file mode 100755 index ed388ae..0000000 --- a/sm_soc_devkit_ghrd/peripheral_subsys/agilex_hps_io48_delay_chain_solver.tcl +++ /dev/null @@ -1,48 +0,0 @@ -#**************************************************************************** -# -# SPDX-License-Identifier: MIT-0 -# Copyright(c) 2019-2020 Intel Corporation. -# -#**************************************************************************** -# -# This file means to solve chain delay assignment to all IO48 pins -# -#**************************************************************************** - -# Initialize IO48 chain delay assignment based on port properties -set io48_output_pin [list "JTAG:TDO" "SDMMC:CCLK" "USB*:STP" "EMAC*:TX_CLK" "EMAC*:TX_CTL" "EMAC*:TXD0" "EMAC*:TXD1" "EMAC*:TXD2" "EMAC*:TXD3" "MDIO*:MDC" \ - "SPIM0:CLK" "SPIM0:MOSI" "SPIM0:SS0_N" "SPIS0:MISO" "UART0:TX" "UART0:RTS_N" "NAND:ALE" "NAND:CE_N" "NAND:CLE" "NAND:WE_N" "NAND:RE_N" "NAND:WP_N" \ - ] -set io48_input_pin [list "JTAG:TCK" "JTAG:TMS" "JTAG:TDI" "USB*:CLK" "USB*:DIR" "USB*:NXT" "EMAC*:RX_CLK" "EMAC*:RX_CTL" "EMAC*:RXD0" "EMAC*:RXD1" "EMAC*:RXD2" "EMAC*:RXD3" \ - "SPIM0:MISO" "SPIS0:CLK" "SPIS0:MOSI" "SPIS0:SS0_N" "UART0:RX" "UART0:CTS_N" "NAND:RB" "HPS_OSC_CLK" "TRACE:CLK" "TRACE:D0" "TRACE:D1" "TRACE:D2" "TRACE:D3" \ - "TRACE:D10" "TRACE:D9" "TRACE:D8" "TRACE:D7" "TRACE:D6" "TRACE:D15" "TRACE:D14" "TRACE:D13" "TRACE:D12" "TRACE:D11" \ - ] -set io48_bidirect_pin [list "SDMMC:CMD" "SDMMC:D0" "SDMMC:D1" "SDMMC:D2" "SDMMC:D3" "SDMMC:D4" "SDMMC:D5" "SDMMC:D6" "SDMMC:D7" "I2CEMAC*:SDA" "I2CEMAC*:SCL" \ - "USB*:DATA0" "USB*:DATA1" "USB*:DATA2" "USB*:DATA3" "USB*:DATA4" "USB*:DATA5" "USB*:DATA6" "USB*:DATA7" "I2C*:SDA" "I2C*:SCL" \ - "MDIO*:MDIO" "NAND:ADQ0" "NAND:ADQ1" "NAND:ADQ2" "NAND:ADQ3" "NAND:ADQ4" "NAND:ADQ5" "NAND:ADQ6" "NAND:ADQ7" "NAND:ADQ8" "NAND:ADQ9" \ - "NAND:ADQ10" "NAND:ADQ11" "NAND:ADQ12" "NAND:ADQ13" "NAND:ADQ14" "NAND:ADQ15" "GPIO" \ - ] - -set io48_pinmux_assignment [list $io48_q1_assignment $io48_q2_assignment $io48_q3_assignment $io48_q4_assignment] -set count 0 -array set output_dly_chain_io48 [] -array set input_dly_chain_io48 [] -foreach io_quadrant $io48_pinmux_assignment { - foreach io_pin $io_quadrant { - if [string match [lindex $io48_output_pin 3] $io_pin] { - set output_dly_chain_io48($count) 45 - set input_dly_chain_io48($count) 0 - } elseif [string match [lindex $io48_input_pin 3] $io_pin] { - set output_dly_chain_io48($count) 0 - set input_dly_chain_io48($count) 0 - } elseif [string match [lindex $io48_bidirect_pin 3] $io_pin] { - set output_dly_chain_io48($count) 0 - set input_dly_chain_io48($count) 0 - } else { - set output_dly_chain_io48($count) 0 - set input_dly_chain_io48($count) 0 - } - incr count - } -} - diff --git a/sm_soc_devkit_ghrd/peripheral_subsys/agilex_hps_parameter_solver.tcl b/sm_soc_devkit_ghrd/peripheral_subsys/agilex_hps_parameter_solver.tcl deleted file mode 100755 index c693e8e..0000000 --- a/sm_soc_devkit_ghrd/peripheral_subsys/agilex_hps_parameter_solver.tcl +++ /dev/null @@ -1,73 +0,0 @@ -#**************************************************************************** -# -# SPDX-License-Identifier: MIT-0 -# Copyright(c) 2019-2020 Intel Corporation. -# -#**************************************************************************** -# -# This file means to solve AGILEX HPS parameters value with each related argument passed in -# -#**************************************************************************** - -#set h2f_width $h2f_width -#if {$h2f_width == 32} { -# set s2f_width 1 -#} elseif {$h2f_width == 64} { -# set s2f_width 2 -#} elseif {$h2f_width == 128} { -# set s2f_width 3 -#} else { -# set s2f_width 0 -#} - -#set f2s_width $f2h_width -#if {$f2h_width > 0} { -# set f2s_width 3 -#} else { -# set f2s_width 0 -#} - -#set lwh2f_width $lwh2f_width -#if {$lwh2f_width > 0} { -# set lwh2f_width 1 -#} else { -# set lwh2f_width 0 -#} - -# H2F IRQ enablement -set h2f_emac0_irq_en 0 -set h2f_emac1_irq_en 0 -set h2f_emac2_irq_en 0 -set h2f_gpio_irq_en 0 -set h2f_i2cemac0_irq_en 0 -set h2f_i2cemac1_irq_en 0 -set h2f_i2cemac2_irq_en 0 -set h2f_i2c0_irq_en 0 -set h2f_i2c1_irq_en 0 -set h2f_i3c0_irq_en 0 -set h2f_i3c1_irq_en 0 -set h2f_nand_irq_en 0 -set h2f_sdmmc_irq_en 0 -set h2f_spim0_irq_en 0 -set h2f_spim1_irq_en 0 -set h2f_spis0_irq_en 0 -set h2f_spis1_irq_en 0 -set h2f_uart0_irq_en 0 -set h2f_uart1_irq_en 0 -set h2f_usb0_irq_en 0 -set h2f_usb1_irq_en 0 - - -# Validation of parameter combinations correctness -#if {$h2f_f2h_loopback_en == 1} { -# if {$f2h_addr_width > $h2f_addr_width} { -# puts "Error: FPGA-to-SoC Bridge address range is greater than connected SoC-to-FPGA Bridge accessible range" -# } -#} -# -#if {$lwh2f_f2h_loopback_en == 1} { -# if {$f2h_addr_width > $lwh2f_addr_width} { -# puts "Error: FPGA-to-SoC Bridge address range is greater than connected SoC-to-FPGA Lightweight Bridge accessible range" -# } -#} - diff --git a/sm_soc_devkit_ghrd/peripheral_subsys/agilex_hps_pinmux_solver.tcl b/sm_soc_devkit_ghrd/peripheral_subsys/agilex_hps_pinmux_solver.tcl deleted file mode 100755 index 30d91c6..0000000 --- a/sm_soc_devkit_ghrd/peripheral_subsys/agilex_hps_pinmux_solver.tcl +++ /dev/null @@ -1,510 +0,0 @@ -#**************************************************************************** -# -# SPDX-License-Identifier: MIT-0 -# Copyright(c) 2019-2020 Intel Corporation. -# -#**************************************************************************** -# -# This file means to solve pinmux enablement of each peripheral to IO48 quadrants -# -#**************************************************************************** - -# List variables for enabling peripherals of each Io48 quadrant -set hps_sdmmc4b_q1_en 0 -set hps_sdmmc4b_q1_sel_en 0 -set hps_sdmmc4b_q1_alt_en 0 -set hps_sdmmc8b_q1_alt_en 0 -set hps_sdmmc12b_q1_alt_en 0 -set hps_sdmmc2b_q2_alt_en 0 -set hps_sdmmc4b_q2_alt_en 0 -set hps_sdmmc4b_q3_en 0 -set hps_sdmmc4b_q3_alt_en 0 -set hps_sdmmc12b_q3_alt_en 0 -set hps_sdmmc_pupd_q2_en 0 -set hps_sdmmc_pwr_q2_en 0 -set hps_sdmmc_dstrb_q2_en 0 -set hps_sdmmc_pupd_q4_en 0 -set hps_sdmmc_pwr_q4_en 0 -set hps_sdmmc_dstrb_q4_en 0 - -set hps_usb0_en 0 -set hps_usb1_en 0 - -set hps_emac0_rmii_en 0 -set hps_emac0_rgmii_en 0 -set hps_emac1_rmii_en 0 -set hps_emac1_rgmii_en 0 -set hps_emac2_rmii_en 0 -set hps_emac2_rgmii_en 0 -set hps_emac0_q1_en 0 -set hps_emac1_q1_en 0 -set hps_emac2_q1_en 0 - -set hps_spim0_q1_en 0 -set hps_spim0_q4_en 0 -set hps_spim0_q4_alt_en 0 -set hps_spim0_2ss_en 0 -set hps_spim1_q1_en 0 -set hps_spim1_q2_en 0 -set hps_spim1_q3_en 0 -set hps_spim1_2ss_en 0 - -set hps_spis0_q1_en 0 -set hps_spis0_q2_en 0 -set hps_spis0_q3_en 0 -set hps_spis1_q1_en 0 -set hps_spis1_q3_en 0 -set hps_spis1_q4_en 0 - -set hps_uart0_q1_en 0 -set hps_uart0_q2_en 0 -set hps_uart0_q3_en 0 -set hps_uart0_fc_en 0 -set hps_uart1_q1_en 0 -set hps_uart1_q3_en 0 -set hps_uart1_q4_en 0 -set hps_uart1_fc_en 0 - -set hps_mdio0_q1_en 0 -set hps_mdio0_q3_en 0 -set hps_mdio0_q4_en 0 -set hps_mdio1_q1_en 0 -set hps_mdio1_q4_en 0 -set hps_mdio2_q1_en 0 -set hps_mdio2_q3_en 0 - -set hps_i2c0_q1_en 0 -set hps_i2c0_q2_en 0 -set hps_i2c0_q3_en 0 -set hps_i2c1_q1_en 0 -set hps_i2c1_q2_en 0 -set hps_i2c1_q3_en 0 -set hps_i2c1_q4_en 0 - -set hps_i2c_emac0_q1_en 0 -set hps_i2c_emac0_q3_en 0 -set hps_i2c_emac0_q4_en 0 -set hps_i2c_emac1_q1_en 0 -set hps_i2c_emac1_q4_en 0 -set hps_i2c_emac2_q1_en 0 -set hps_i2c_emac2_q3_en 0 -set hps_i2c_emac2_q4_en 0 - -set hps_i3c0_q1_en 0 -set hps_i3c0_q2_en 0 -set hps_i3c0_q3_en 0 -set hps_i3c0_q4_en 0 -set hps_i3c1_q1_en 0 -set hps_i3c1_q2_en 0 -set hps_i3c1_q3_en 0 -set hps_i3c1_q4_en 0 - -set hps_nand_q12_en 0 -set hps_nand_q34_en 0 -set hps_nand_16b_en 0 - -set hps_trace_q12_en 0 -set hps_trace_q34_en 0 -set hps_trace_8b_en 0 -set hps_trace_12b_en 0 -set hps_trace_16b_en 0 -set hps_trace_alt_en 0 - -set hps_cm_q 0 -set hps_cm_io 0 -set hps_cm_alt_en 0 - -set hps_gpio0_en 0 -set hps_gpio0_list "" -set hps_gpio1_en 0 -set hps_gpio1_list "" -set hps_pll_out_en 0 - -set hps_jtag_en 0 -set hps_io_custom "" - -# Initialize IO48 Pinmux assignment for each quadrant -set io48_q1_assignment "" -set io48_q2_assignment "" -set io48_q3_assignment "" -set io48_q4_assignment "" -for {set i 0} {$i < 12} {incr i} { - lappend io48_q1_assignment NONE - lappend io48_q2_assignment NONE - lappend io48_q3_assignment NONE - lappend io48_q4_assignment NONE -} - -source ./agilex_io48.tcl - -# Assigning individual IO48 peripherals -if {$hps_jtag_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 8 11 JTAG:TCK JTAG:TMS JTAG:TDO JTAG:TDI] -} - -#SDMMC Q1 -if {$hps_sdmmc4b_q1_en == 1} { - #puts "[llength $io48_q1_assignment]" - set io48_q1_assignment [lreplace $io48_q1_assignment 0 2 SDMMC:DATA0 SDMMC:DATA1 SDMMC:CLK] -} -if {$hps_sdmmc4b_q1_sel_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 3 3 SDMMC:LVL_SEL] -} -if {$hps_sdmmc4b_q1_alt_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 4 4 SDMMC:WRITE_PROTECT] -} -if {$hps_sdmmc8b_q1_alt_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 5 7 SDMMC:DATA2 SDMMC:DATA3 SDMMC:CMD] -} -if {$hps_sdmmc12b_q1_alt_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 8 11 SDMMC:DATA4 SDMMC:DATA5 SDMMC:DATA6 SDMMC:DATA7] -} - -#SDMMC Q2 -if {$hps_sdmmc_pupd_q2_en == 1} { - set io48_q2_assignment [lreplace $io48_q2_assignment 0 0 SDMMC:PU_PD_DATA2] -} -if {$hps_sdmmc_pwr_q2_en == 1} { - set io48_q2_assignment [lreplace $io48_q2_assignment 1 1 SDMMC:BUS_PWR] -} -if {$hps_sdmmc_dstrb_q2_en == 1} { - set io48_q2_assignment [lreplace $io48_q2_assignment 3 3 SDMMC:DATA_STROBE] -} - -#SDMMC Q3 -if {$hps_sdmmc4b_q3_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 0 2 SDMMC:DATA0 SDMMC:DATA1 SDMMC:CCLK] - set io48_q3_assignment [lreplace $io48_q3_assignment 5 7 SDMMC:DATA2 SDMMC:DATA3 SDMMC:CMD] -} -if {$hps_sdmmc4b_q3_alt_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 4 4 SDMMC:WRITE_PROTECT] -} -if {$hps_sdmmc12b_q3_alt_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 8 11 SDMMC:DATA4 SDMMC:DATA5 SDMMC:DATA6 SDMMC:DATA7] -} - -#SDMMC Q4 -if {$hps_sdmmc_pupd_q4_en == 1} { - set io48_q4_assignment [lreplace $io48_q4_assignment 0 0 SDMMC:PU_PD_DATA2] -} -if {$hps_sdmmc_pwr_q4_en == 1} { - set io48_q4_assignment [lreplace $io48_q4_assignment 1 1 SDMMC:BUS_PWR -} -if {$hps_sdmmc_dstrb_q4_en == 1} { - set io48_q4_assignment [lreplace $io48_q4_assignment 3 3 SDMMC:DATA_STROBE -} - -if {$hps_usb0_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 0 11 USB0:CLK USB0:STP USB0:DIR USB0:DATA0 USB0:DATA1 USB0:NXT USB0:DATA2 USB0:DATA3 USB0:DATA4 USB0:DATA5 USB0:DATA6 USB0:DATA7] -} -if {$hps_usb1_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 0 11 USB1:CLK USB1:STP USB1:DIR USB1:DATA0 USB1:DATA1 USB1:NXT USB1:DATA2 USB1:DATA3 USB1:DATA4 USB1:DATA5 USB1:DATA6 USB1:DATA7] -} - -if {$hps_emac0_rgmii_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 0 11 EMAC0:TX_CLK EMAC0:TX_CTL EMAC0:RX_CLK EMAC0:RX_CTL EMAC0:TXD0 EMAC0:TXD1 EMAC0:RXD0 EMAC0:RXD1 EMAC0:TXD2 EMAC0:TXD3 EMAC0:RXD2 EMAC0:RXD3] -} elseif {$hps_emac0_rmii_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 0 7 EMAC0:TX_CLK EMAC0:TX_CTL EMAC0:RX_CLK EMAC0:RX_CTL EMAC0:TXD0 EMAC0:TXD1 EMAC0:RXD0 EMAC0:RXD1] -} - -if {$hps_emac1_rgmii_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 0 11 EMAC1:TX_CLK EMAC1:TX_CTL EMAC1:RX_CLK EMAC1:RX_CTL EMAC1:TXD0 EMAC1:TXD1 EMAC1:RXD0 EMAC1:RXD1 EMAC1:TXD2 EMAC1:TXD3 EMAC1:RXD2 EMAC1:RXD3] -} elseif {$hps_emac1_rmii_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 0 7 EMAC1:TX_CLK EMAC1:TX_CTL EMAC1:RX_CLK EMAC1:RX_CTL EMAC1:TXD0 EMAC1:TXD1 EMAC1:RXD0 EMAC1:RXD1] -} - -if {$hps_emac2_rgmii_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 0 11 EMAC2:TX_CLK EMAC2:TX_CTL EMAC2:RX_CLK EMAC2:RX_CTL EMAC2:TXD0 EMAC2:TXD1 EMAC2:RXD0 EMAC2:RXD1 EMAC2:TXD2 EMAC2:TXD3 EMAC2:RXD2 EMAC2:RXD3] -} elseif {$hps_emac2_rmii_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 0 7 EMAC2:TX_CLK EMAC2:TX_CTL EMAC2:RX_CLK EMAC2:RX_CTL EMAC2:TXD0 EMAC2:TXD1 EMAC2:RXD0 EMAC2:RXD1] -} - -if {$hps_emac0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 0 1 EMAC0:PPS0 EMAC0:PPSTRIG0] -} elseif {$hps_emac1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 2 3 EMAC1:PPS1 EMAC1:PPSTRIG1] -} elseif {$hps_emac2_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 4 5 EMAC2:PPS2 EMAC2:PPSTRIG2] -} - -if {$hps_spim0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 4 7 SPIM0:CLK SPIM0:MOSI SPIM0:MISO SPIM0:SS0_N] - if {$hps_spim0_2ss_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 0 0 SPIM0:SS1_N] - } -} elseif {$hps_spim0_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 8 11 SPIM0:CLK SPIM0:MOSI SPIM0:MISO SPIM0:SS0_N] - if {$hps_spim0_2ss_en == 1} { - #HOW TO DIFFERENTIATE THE 5 7 SINGLE ELEMENT BUT NOT 5 7 REFER TO 5 6 7 (SAME AS SDMMC AND EMAC CASE THAT HAS AN EMPTY BIT IN MIDDLE OF THE LIST) - set io48_q4_assignment [lreplace $io48_q4_assignment 5 5 SPIM0:SS1_N] - } -} elseif {$hps_spim0_q4_alt_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 6 9 SPIM0:MISO SPIM0:SS0_N SPIM0:CLK SPIM0:MOSI SPIM0:MISO SPIM0:SS0_N] - if {$hps_spim0_2ss_en == 1} { - set io48_q4_assignment [lreplace $io48_q4_assignment 5 5 SPIM0:SS1_N] - } -} - -if {$hps_spim1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 8 11 SPIM1:CLK SPIM1:MOSI SPIM1:MISO SPIM1:SS0_N] - if {$hps_spim1_2ss_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 1 1 SPIM1:SS1_N] - } -} elseif {$hps_spim1_q2_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 8 11 SPIM1:CLK SPIM1:MOSI SPIM1:MISO SPIM1:SS0_N] - if {$hps_spim1_2ss_en == 1} { - set io48_q2_assignment [lreplace $io48_q2_assignment 7 7 SPIM1:SS1_N] - } -} elseif {$hps_spim1_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 0 3 SPIM1:CLK SPIM1:MOSI SPIM1:MISO SPIM1:SS0_N] - if {$hps_spim1_2ss_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 4 4 SPIM1:SS1_N] - } -} - -if {$hps_spis0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 0 3 SPIS0:CLK SPIS0:MOSI SPIS0:SS0_N SPIS0:MISO] -} elseif {$hps_spis0_q2_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 8 11 SPIS0:CLK SPIS0:MOSI SPIS0:SS0_N SPIS0:MISO] -} elseif {$hps_spis0_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 8 11 SPIS0:CLK SPIS0:MOSI SPIS0:SS0_N SPIS0:MISO] -} - -if {$hps_spis1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 8 11 SPIS1:CLK SPIS1:MOSI SPIS1:SS0_N SPIS1:MISO] -} elseif {$hps_spis1_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 4 7 SPIS1:CLK SPIS1:MOSI SPIS1:SS0_N SPIS1:MISO] -} elseif {$hps_spis1_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 8 11 SPIS1:CLK SPIS1:MOSI SPIS1:SS0_N SPIS1:MISO] -} - -if {$hps_uart0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 2 3 UART0:TX UART0:RX] - if {$hps_uart0_fc_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 0 1 UART0:CTS_N UART0:RTS_N] - } -} elseif {$hps_uart0_q2_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 10 11 UART0:TX UART0:RX] - if {$hps_uart0_fc_en == 1} { - set io48_q2_assignment [lreplace $io48_q2_assignment 8 9 UART0:CTS_N UART0:RTS_N] - } -} elseif {$hps_uart0_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 2 3 UART0:TX UART0:RX] - if {$hps_uart0_fc_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 0 1 UART0:CTS_N UART0:RTS_N] - } -} - -if {$hps_uart1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 6 7 UART1:TX UART1:RX] - if {$hps_uart1_fc_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 4 5 UART1:CTS_N UART1:RTS_N] - } -} elseif {$hps_uart1_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 6 7 UART1:TX UART1:RX] - if {$hps_uart1_fc_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 4 5 UART1:CTS_N UART1:RTS_N] - } -} elseif {$hps_uart1_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 2 3 UART1:TX UART1:RX] - if {$hps_uart1_fc_en == 1} { - set io48_q4_assignment [lreplace $io48_q4_assignment 4 5 UART1:CTS_N UART1:RTS_N] - } -} - -if {$hps_mdio0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 10 11 MDIO0:MDIO MDIO0:MDC] -} elseif {$hps_mdio0_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 10 11 MDIO0:MDIO MDIO0:MDC] -} elseif {$hps_mdio0_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 10 11 MDIO0:MDIO MDIO0:MDC] -} - -if {$hps_mdio1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 8 9 MDIO1:MDIO MDIO1:MDC] -} elseif {$hps_mdio1_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 6 7 MDIO1:MDIO MDIO1:MDC] -} - -if {$hps_mdio2_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 6 7 MDIO2:MDIO MDIO2:MDC] -} elseif {$hps_mdio2_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 8 9 MDIO2:MDIO MDIO2:MDC] -} - -if {$hps_i2c0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 4 5 I2C0:SDA I2C0:SCL] -} elseif {$hps_i2c0_q2_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 10 11 I2C0:SDA I2C0:SCL] -} elseif {$hps_i2c0_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 2 3 I2C0:SDA I2C0:SCL] -} - -if {$hps_i2c1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 2 3 I2C1:SDA I2C1:SCL] -} elseif {$hps_i2c1_q2_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 8 9 I2C1:SDA I2C1:SCL] -} elseif {$hps_i2c1_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 6 7 I2C1:SDA I2C1:SCL] -} elseif {$hps_i2c1_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 0 1 I2C1:SDA I2C1:SCL] -} - -if {$hps_i2c_emac0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 10 11 I2CEMAC0:SDA I2CEMAC0:SCL] -} elseif {$hps_i2c_emac0_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 10 11 I2CEMAC0:SDA I2CEMAC0:SCL] -} elseif {$hps_i2c_emac0_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 10 11 I2CEMAC0:SDA I2CEMAC0:SCL] -} - -if {$hps_i2c_emac1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 8 9 I2CEMAC1:SDA I2CEMAC1:SCL] -} elseif {$hps_i2c_emac1_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 6 7 I2CEMAC1:SDA I2CEMAC1:SCL] -} - -if {$hps_i2c_emac2_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 6 7 I2CEMAC2:SDA I2CEMAC2:SCL] -} elseif {$hps_i2c_emac2_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 8 9 I2CEMAC2:SDA I2CEMAC2:SCL] -} elseif {$hps_i2c_emac2_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 8 9 I2CEMAC2:SDA I2CEMAC2:SCL] -} - -if {$hps_i3c0_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 10 11 I3C0:SDA I3C0:SCL] -} elseif {$hps_i3c0_q2_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 6 7 I3C0:SDA I3C0:SCL] -} elseif {$hps_i3c0_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 6 7 I3C0:SDA I3C0:SCL] -} elseif {$hps_i3c0_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q3_assignment 4 5 I3C0:SDA I3C0:SCL] -} - -if {$hps_i3c1_q1_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 8 9 I3C1:SDA I3C1:SCL] -} elseif {$hps_i3c1_q2_en == 1} { -set io48_q2_assignment [lreplace $io48_q2_assignment 4 5 I3C1:SDA I3C1:SCL] -} elseif {$hps_i3c1_q3_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 4 5 I3C1:SDA I3C1:SCL] -} elseif {$hps_i3c1_q4_en == 1} { -set io48_q4_assignment [lreplace $io48_q3_assignment 2 3 I3C1:SDA I3C1:SCL] -} - -if {$hps_nand_q12_en == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment 0 11 NAND:DATA0 NAND:DATA1 NAND:WE_N NAND:RE_N NAND:WP_N NAND:DATA2 NAND:DATA3 NAND:CLE NAND:DATA4 NAND:DATA5 NAND:DATA6 NAND:DATA7] -set io48_q2_assignment [lreplace $io48_q2_assignment 0 3 NAND:ALE NAND:RB_N NAND:CE_N NAND:DQS] - if {$hps_nand_16b_en == 1} { - set io48_q2_assignment [lreplace $io48_q2_assignment 0 11 NAND:ALE NAND:RB_N NAND:CE_N NAND:DQS NAND:DATA8 NAND:DATA9 NAND:DATA10 NAND:DATA11 NAND:DATA12 NAND:DATA13 NAND:DATA14 NAND:DATA15] - } -} elseif {$hps_nand_q34_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 0 11 NAND:DATA0 NAND:DATA1 NAND:WE_N NAND:RE_N NAND:WP_N NAND:DATA2 NAND:DATA3 NAND:CLE NAND:DATA4 NAND:DATA5 NAND:DATA6 NAND:DATA7] -set io48_q4_assignment [lreplace $io48_q4_assignment 0 3 NAND:ALE NAND:RB_N NAND:CE_N NAND:DQS] - if {$hps_nand_16b_en == 1} { - set io48_q4_assignment [lreplace $io48_q4_assignment 0 11 NAND:ALE NAND:RB_N NAND:CE_N NAND:DQS NAND:DATA8 NAND:DATA9 NAND:DATA10 NAND:DATA11 NAND:DATA12 NAND:DATA13 NAND:DATA14 NAND:DATA15] - } -} - -if {$hps_trace_q12_en} { -set io48_q2_assignment [lreplace $io48_q2_assignment 7 11 TRACE:CLK TRACE:D0 TRACE:D1 TRACE:D2 TRACE:D3] - if {$hps_trace_alt_en == 1} { - if {$hps_trace_8b_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 3 6 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_12b_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 11 11 TRACE:D11] - set io48_q1_assignment [lreplace $io48_q1_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_16b_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 7 11 TRACE:D15 TRACE:D14 TRACE:D13 TRACE:D12 TRACE:D11] - set io48_q1_assignment [lreplace $io48_q1_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } - } else { - if {$hps_trace_8b_en == 1} { - set io48_q2_assignment [lreplace $io48_q2_assignment 3 6 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_12b_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 11 11 TRACE:D11] - set io48_q2_assignment [lreplace $io48_q2_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_16b_en == 1} { - set io48_q1_assignment [lreplace $io48_q1_assignment 7 11 TRACE:CLK TRACE:D0 TRACE:D1 TRACE:D2 TRACE:D3] - set io48_q2_assignment [lreplace $io48_q2_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } - } -} elseif {$hps_trace_q34_en == 1} { -set io48_q4_assignment [lreplace $io48_q4_assignment 7 11 TRACE:CLK TRACE:D0 TRACE:D1 TRACE:D2 TRACE:D3] - if {$hps_trace_alt_en == 1} { - if {$hps_trace_8b_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 3 6 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_12b_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 11 11 TRACE:D11] - set io48_q3_assignment [lreplace $io48_q3_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_16b_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 7 11 TRACE:D15 TRACE:D14 TRACE:D13 TRACE:D12 TRACE:D11] - set io48_q3_assignment [lreplace $io48_q3_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } - } else { - if {$hps_trace_8b_en == 1} { - set io48_q4_assignment [lreplace $io48_q4_assignment 3 6 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_12b_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 11 11 TRACE:D11] - set io48_q4_assignment [lreplace $io48_q4_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } elseif {$hps_trace_16b_en == 1} { - set io48_q3_assignment [lreplace $io48_q3_assignment 7 11 TRACE:CLK TRACE:D0 TRACE:D1 TRACE:D2 TRACE:D3] - set io48_q4_assignment [lreplace $io48_q4_assignment 0 6 TRACE:D10 TRACE:D9 TRACE:D8 TRACE:D7 TRACE:D6 TRACE:D5 TRACE:D4] - } - } -} - -if {$hps_cm_q == 1} { -set io48_q1_assignment [lreplace $io48_q1_assignment [expr $hps_cm_io-1] [expr $hps_cm_io-1] HCLK:HPS_OSC_CLK] -} elseif {$hps_cm_q == 2} { -set io48_q2_assignment [lreplace $io48_q2_assignment [expr $hps_cm_io-1] [expr $hps_cm_io-1] HCLK:HPS_OSC_CLK] -} elseif {$hps_cm_q == 3} { -set io48_q3_assignment [lreplace $io48_q3_assignment [expr $hps_cm_io-1] [expr $hps_cm_io-1] HCLK:HPS_OSC_CLK] -} elseif {$hps_cm_q == 4} { -set io48_q4_assignment [lreplace $io48_q4_assignment [expr $hps_cm_io-1] [expr $hps_cm_io-1] HCLK:HPS_OSC_CLK] -} elseif {$hps_cm_alt_en == 1} { -set io48_q3_assignment [lreplace $io48_q3_assignment 0 3 CM:PLL_CLK0 CM:PLL_CLK1 CM:PLL_CLK2 CM:PLL_CLK3] -} - -if {$hps_gpio0_en == 1} { - foreach io_num [split $hps_gpio0_list] { - if {$io_num < 12} { - set io48_q1_assignment [lreplace $io48_q1_assignment $io_num $io_num GPIO0:IO${io_num}] - #set io48_q1_assignment [lreplace $io48_q1_assignment $io_num $io_num GPIO0] - } else { - set io48_q2_assignment [lreplace $io48_q2_assignment [expr $io_num-12] [expr $io_num-12] GPIO0:IO${io_num}] - #set io48_q2_assignment [lreplace $io48_q2_assignment [expr $io_num-12] [expr $io_num-12] GPIO0] - } - } -} - -if {$hps_gpio1_en == 1} { - foreach io_num [split $hps_gpio1_list] { - if {$io_num < 12} { - set io48_q3_assignment [lreplace $io48_q3_assignment $io_num $io_num GPIO1:IO${io_num}] - #set io48_q3_assignment [lreplace $io48_q3_assignment $io_num $io_num GPIO1] - } else { - set io48_q4_assignment [lreplace $io48_q4_assignment [expr $io_num-12] [expr $io_num-12] GPIO1:IO${io_num}] - #set io48_q4_assignment [lreplace $io48_q4_assignment [expr $io_num-12] [expr $io_num-12] GPIO1] - } - } -} - -if {$hps_io_custom != ""} { - foreach {io_num value} $hps_io_custom { - if {$io_num < 12} { - set io48_q1_assignment [lreplace $io48_q1_assignment $io_num $io_num $value] - } elseif {$io_num <24} { - set io48_q2_assignment [lreplace $io48_q2_assignment [expr $io_num-12] [expr $io_num-12] $value] - } elseif {$io_num <36} { - set io48_q3_assignment [lreplace $io48_q3_assignment [expr $io_num-24] [expr $io_num-24] $value] - } elseif {$io_num <48} { - set io48_q4_assignment [lreplace $io48_q4_assignment [expr $io_num-36] [expr $io_num-36] $value] - } - } -} - -#puts "[llength $io48_q1_assignment]" -puts "Sorted IO48 assignment:\n$io48_q1_assignment\n$io48_q2_assignment\n$io48_q3_assignment\n$io48_q4_assignment\n" - - diff --git a/sm_soc_devkit_ghrd/peripheral_subsys/agilex_io48.tcl b/sm_soc_devkit_ghrd/peripheral_subsys/agilex_io48.tcl deleted file mode 100755 index 32a74bf..0000000 --- a/sm_soc_devkit_ghrd/peripheral_subsys/agilex_io48.tcl +++ /dev/null @@ -1,191 +0,0 @@ -#**************************************************************************** -# -# SPDX-License-Identifier: MIT-0 -# Copyright(c) 2019-2021 Intel Corporation. -# -#**************************************************************************** -# -# This file host all the enabled HPS Daugther Card -# -#**************************************************************************** -# -# -# Following are HPS IO quadrants feature for individual peripherals -# Variable naming convention: hps___en -# Set default of veriables disable - - # -- the quadrant # of CM:HPS_OSC_CLK selected - # -- the IO # within a quadrant for CM:HPS_OSC_CLK -set hps_cm_q 0 -set hps_cm_io 0 -set hps_pll_clk0_en 0 -set hps_pll_clk1_en 0 -set hps_pll_clk2_en 0 -set hps_pll_clk3_en 0 -set hps_jtag_en 0 -set hps_spim0_q1_en 0 -set hps_spim0_q4_en 0 -set hps_spim1_q1_en 0 -set hps_spim1_q2_en 0 -set hps_spim1_q3_en 0 -set hps_spis0_q1_en 0 -set hps_spis0_q2_en 0 -set hps_spis0_q3_en 0 -set hps_spis1_q1_en 0 -set hps_spis1_q3_en 0 -set hps_spis1_q4_en 0 -set hps_uart0_q1_en 0 -set hps_uart0_q2_en 0 -set hps_uart0_q3_en 0 -set hps_uart1_q1_en 0 -set hps_uart1_q3_en 0 -set hps_i2c0_q1_en 0 -set hps_i2c0_q2_en 0 -set hps_i2c0_q3_en 0 -set hps_i2c1_q1_en 0 -set hps_i2c1_q2_en 0 -set hps_i2c1_q3_en 0 -set hps_i2c1_q4_en 0 -set hps_i2c_emac0_q1_en 0 -set hps_i2c_emac0_q3_en 0 -set hps_i2c_emac0_q4_en 0 -set hps_i2c_emac1_q1_en 0 -set hps_i2c_emac1_q4_en 0 -set hps_i2c_emac2_q1_en 0 -set hps_i2c_emac2_q3_en 0 -set hps_i2c_emac2_q4_en 0 -set hps_pps_emac0_q1_en 0 -set hps_pps_emac0_q3_en 0 -set hps_pps_emac1_q1_en 0 -set hps_pps_emac2_q1_en 0 -set hps_pps_emac2_q3_en 0 -set hps_trig_emac0_q1_en 0 -set hps_trig_emac0_q3_en 0 -set hps_trig_emac1_q1_en 0 -set hps_trig_emac2_q1_en 0 -set hps_trig_emac2_q3_en 0 -set hps_emac0_q2_en 0 -set hps_emac1_q3_en 0 -set hps_emac2_q4_en 0 -set hps_mdio0_q1_en 0 -set hps_mdio0_q3_en 0 -set hps_mdio0_q4_en 0 -set hps_mdio1_q1_en 0 -set hps_mdio1_q4_en 0 -set hps_mdio2_q3_en 0 -set hps_i3c0_q1_en 0 -set hps_i3c0_q2_en 0 -set hps_i3c0_q3_en 0 -set hps_i3c0_q4_en 0 -set hps_i3c1_q1_en 0 -set hps_i3c1_q2_en 0 -set hps_i3c1_q3_en 0 -set hps_i3c1_q4_en 0 -set hps_nand_q12_en 0 -set hps_nand_q34_en 0 -set hps_sdmmc4b_q1_en 0 -set hps_sdmmc8b_q1_en 0 -set hps_sdmmc_wp_q1_en 0 -set hps_sdmmc_pupd_q2_en 0 -set hps_sdmmc_pwr_q2_en 0 -set hps_sdmmc_dstrb_q2_en 0 -set hps_sdmmc4b_q3_en 0 -set hps_sdmmc8b_q3_en 0 -set hps_sdmmc_wp_q3_en 0 -set hps_sdmmc_pupd_q4_en 0 -set hps_sdmmc_pwr_q4_en 0 -set hps_sdmmc_dstrb_q4_en 0 -set hps_usb0_en 0 -set hps_usb1_en 0 -set hps_trace_en 0 -set hps_gpio0_en 0 -set hps_gpio0_list "" -set hps_gpio1_en 0 -set hps_gpio1_list "" - - -if {$daughter_card == "devkit_dc_oobe"} { -set hps_cm_q 1 -set hps_cm_io 1 -set hps_gpio0_en 1 -set hps_gpio0_list "1 10 11" -set hps_uart0_q1_en 1 -set hps_emac2_q1_en 1 -set hps_mdio2_q1_en 1 -#temporary turn off I3C for first compilation succeed -set hps_i3c1_q1_en 1 -set hps_usb1_en 1 -#temporary turn off sdmmc for first compilation succeed -set hps_sdmmc4b_q3_en 1 -set hps_gpio1_en 1 -set hps_gpio1_list "3 4" -set hps_jtag_en 1 -set hps_emac2_rgmii_en 1 - -} elseif {$daughter_card == "devkit_dc_nand"} { -set hps_emac0_q1_en 1 -set hps_uart0_q1_en 1 -set hps_i2c0_q1_en 1 -set hps_gpio0_en 1 -set hps_gpio0_list "6 7" -set hps_i3c1_q1_en 1 -set hps_mdio0_q1_en 1 -set hps_emac0_rgmii_en 1 -set hps_nand_q34_en 1 -set hps_gpio1_en 1 -set hps_gpio1_list "16 19" -set hps_cm_q 4 -set hps_cm_io 6 -set hps_spis1_q4_en 1 - -} elseif {$daughter_card == "debug2"} { -set hps_emac0_q1_en 1 -set hps_uart0_q1_en 1 -set hps_spim0_q1_en 1 -set hps_i3c1_q1_en 1 -set hps_mdio0_q1_en 1 -set hps_emac0_rgmii_en 1 -set hps_sdmmc4b_q3_en 1 -set hps_gpio1_en 1 -set hps_gpio1_list "3 4" -set hps_jtag_en 1 -set hps_sdmmc_pupd_q4_en 1 -set hps_cm_q 4 -set hps_cm_io 2 -set hps_trace_q34_en 1 -set hps_trace_8b_en 1 - -} elseif {$daughter_card == "tsn_phy_aic0"} { -set hps_emac0_q1_en 1 -set hps_uart0_q1_en 1 -set hps_emac2_q1_en 1 -set hps_mdio2_q1_en 1 -set hps_cm_q 1 -set hps_cm_io 10 -set hps_mdio0_q1_en 1 -set hps_emac0_rgmii_en 1 -set hps_sdmmc4b_q1_en 1 -#set hps_sdmmc4b_q1_sel_en 1 -#set hps_sdmmc4b_q1_alt_en 1 -set hps_jtag_en 1 -set hps_emac2_rgmii_en 1 - -} elseif {$daughter_card == "tsn_phy_aic2"} { -set hps_emac0_q1_en 1 -set hps_emac1_q1_en 1 -set hps_emac2_q1_en 1 -set hps_mdio2_q1_en 1 -set hps_mdio1_q1_en 1 -set hps_mdio0_q1_en 1 -set hps_emac0_rgmii_en 1 -set hps_emac1_rgmii_en 1 -set hps_emac2_rgmii_en 1 - -} elseif {$daughter_card == "none"} { -puts "Disable all HPS IO48 IO" -set hps_io_off 1 - -} else { -puts "Inserted daughter_card variant: $daughter_card NOT supported" -} - diff --git a/sm_soc_devkit_ghrd/peripheral_subsys/arguments_solver.tcl b/sm_soc_devkit_ghrd/peripheral_subsys/arguments_solver.tcl deleted file mode 100755 index f5dc059..0000000 --- a/sm_soc_devkit_ghrd/peripheral_subsys/arguments_solver.tcl +++ /dev/null @@ -1,424 +0,0 @@ -#**************************************************************************** -# -# SPDX-License-Identifier: MIT-0 -# Copyright(c) 2019-2021 Intel Corporation. -# -#**************************************************************************** -# -# This file resolves all passed in arguments into GHRD understood parameterizable setting - -# Following are list of arguments supported and its valid values for current subsystem -# device_family : -# device : -# subsys_name : -# project_name : -# board : devkit, mUDV2, mUDV1, char, cypress, hemon, lookout, mcgowan, pyramid -# hps_emif_en : 1 or 0 -# hps_emif_ecc_en : 1 or 0 -# hps_first_config : 1 or 0 HPS initialization sequence. HPS_FIRST or FPGA_FIRST -# h2f_width : 128, 64, 32 or 0(as disable) -# f2h_width : 256 or 0(as disable) -# f2sdram_width : 0:Unused, 256-bit"} -# lwh2f_width : 32 or 0(as disable) -# hps_f2s_irq_en : 1 or 0 -# daughter_card : Daughter card selection, either "none" -# hps_f2h_irq_en : 1 or 0 -# f2h_free_clk_en : 1 or 0 -# -# Each argument made available for configuration has a default value in design_config.tcl file -# The value can be passed in through Makefile. -# -# -# hps_emif_en, -# hps_emif_ecc_en, -# io48_dc, -# h2f_width, -# f2h_width, -# lwh2f_width, -# f2sdram_width, -# hps_first_config, -# hps_f2h_irq_en, -# f2h_free_clk_en - -#**************************************************************************** - -source ./design_config.tcl - - -proc check_then_accept { param } { - if {$param == device_family || device || qsys_name || project_name} { - puts "-- Accepted paramter \$param = $param" - } else { - puts "Warning: Inserted parameter \"$param\" is not supported for this script. " - } -} - - -if { ![ info exists device_family ] } { - set device_family $DEVICE_FAMILY -} else { - puts "-- Accepted parameter \$device_family = $device_family" -} - -if { ![ info exists device ] } { - set device $DEVICE -} else { - puts "-- Accepted parameter \$device = $device" -} - -if { ![ info exists subsys_name ] } { - set subsys_name $SUBSYS_NAME -} else { - puts "-- Accepted parameter \$subsys_name = $subsys_name" -} - -# if { ![ info exists project_name ] } { - # set project_name $PROJECT_NAME -# } else { - # puts "-- Accepted parameter \$project_name = $project_name" -# } - -# if { ![ info exists top_name ] } { - # set top_name $TOP_NAME -# } else { - # puts "-- Accepted parameter \$top_name = $top_name" -# } - -# if { ![ info exists clk_gate_en ] } { - # set clk_gate_en $CLK_GATE_EN -# } else { - # puts "-- Accepted parameter \$clk_gate_en = $clk_gate_en" -# } - -## ---------------- -## Board -## ---------------- - -if { ![ info exists board ] } { - set board $BOARD -} else { - puts "-- Accepted parameter \$board = $board" -} - -# if { ![ info exists board_pwrmgt ] } { - # set board_pwrmgt $BOARD_PWRMGT -# } else { - # puts "-- Accepted parameter \$board_pwrmgt = $board_pwrmgt" -# } - -# Loading Board default configuration settings -# set board_config_file "./board/board_${board}_config.tcl" -# if {[file exist $board_config_file]} { - # source $board_config_file -# } else { - # error "Error: $board_config_file not exist!! Please make sure the board settings files are included in folder ./board/" -# } - -#qsys generate consume this arguments -# if { ![ info exists fpga_peripheral_en ] } { - # set fpga_peripheral_en $FPGA_PERIPHERAL_EN -# } else { - # puts "-- Accepted parameter \$fpga_peripheral_en = $fpga_peripheral_en" -# } -# if { $fpga_peripheral_en == 1} { - # if {[ info exists isPeriph_pins_available ] } { - # if { $isPeriph_pins_available == 0} { - # set fpga_peripheral_en 0 - # puts "-- Turn OFF fpga_peripheral_en because \"isPeriph_pins_available\" is disable" - # } - # } else { - # set fpga_peripheral_en 0 - # puts "-- Turn OFF fpga_peripheral_en because \"isPeriph_pins_available\" is not available" - # } -# } - -## ---------------- -## OCM -## ---------------- - -# if { ![ info exists jtag_ocm_en ] } { - # set jtag_ocm_en $JTAG_OCM_EN -# } else { - # puts "-- Accepted parameter \$jtag_ocm_en = $jtag_ocm_en" -# } - -# if { ![ info exists ocm_datawidth ] } { - # set ocm_datawidth $OCM_DATAWIDTH -# } else { - # puts "-- Accepted parameter \$ocm_datawidth = $ocm_datawidth" -# } - -# if { ![ info exists ocm_memsize ] } { - # set ocm_memsize $OCM_MEMSIZE -# } else { - # puts "-- Accepted parameter \$ocm_memsize = $ocm_memsize" -# } - -## ---------------- -## HPS -## ---------------- - -if { ![ info exists hps_emif_en ] } { - set hps_emif_en $HPS_EMIF_EN -} else { - puts "-- Accepted parameter \$hps_emif_en = $hps_emif_en" -} - -if { ![ info exists hps_f2h_irq_en ] } { - set hps_f2h_irq_en $HPS_F2H_IRQ_EN -} else { - puts "-- Accepted parameter \$hps_f2h_irq_en = $hps_f2h_irq_en" -} - -if { ![ info exists f2h_free_clk_en ] } { - set f2h_free_clk_en $F2H_FREE_CLK_EN -} else { - puts "-- Accepted parameter \$f2h_free_clk_en = $f2h_free_clk_en" -} - -# if { ![ info exists hps_en ] } { - # set hps_en $HPS_EN -# } else { - # puts "-- Accepted parameter \$hps_en = $hps_en" -# } - -if { ![ info exists sys_initialization ] } { - set sys_initialization $SYS_INITIALIZATION -} else { - puts "-- Accepted parameter \$sys_initialization = $sys_initialization" -} - -if { ![ info exists hps_first_config ] } { - set hps_first_config $HPS_FIRST_CONFIG -} else { - puts "-- Accepted parameter \$hps_first_config = $hps_first_config" -} - - -##to be deleted -# if { ![ info exists hps_dap_mode ] } { - # set hps_dap_mode $HPS_DAP_MODE -# } else { - # puts "-- Accepted parameter \$hps_dap_mode = $hps_dap_mode" -# } - -# if { ![ info exists user0_clk_src_select ] } { - # set user0_clk_src_select $USER0_CLK_SRC_SELECT -# } else { - # puts "-- Accepted parameter \$user0_clk_src_select = $user0_clk_src_select" -# } - -# if { ![ info exists user0_clk_freq ] } { - # set user0_clk_freq $USER0_CLK_FREQ -# } else { - # puts "-- Accepted parameter \$user0_clk_freq = $user0_clk_freq" -# } - -# if { ![ info exists user1_clk_src_select ] } { - # set user1_clk_src_select $USER1_CLK_SRC_SELECT -# } else { - # puts "-- Accepted parameter \$user1_clk_src_select = $user1_clk_src_select" -# } - -# if { ![ info exists user1_clk_freq ] } { - # set user1_clk_freq $USER1_CLK_FREQ -# } else { - # puts "-- Accepted parameter \$user1_clk_freq = $user1_clk_freq" -# } - -if { ![ info exists h2f_width ] } { - set h2f_width $H2F_WIDTH -} else { - puts "-- Accepted parameter \$h2f_width = $h2f_width" -} - -if { ![ info exists f2s_data_width ] } { - set f2s_data_width $F2S_DATA_WIDTH -} else { - puts "-- Accepted parameter \$f2s_data_width = $f2s_data_width" -} - -# if { ![ info exists f2s_address_width ] } { - # set f2s_address_width $F2S_ADDRESS_WIDTH -# } else { - # puts "-- Accepted parameter \$f2s_address_width = $f2s_address_width" -# } - -if { ![ info exists f2sdram_width ] } { - set f2sdram_width $F2SDRAM_WIDTH -} else { - puts "-- Accepted parameter \$f2sdram_width = $f2sdram_width" -} - -if { ![ info exists f2sdram_addr_width ] } { - set f2sdram_addr_width $F2SDRAM_ADDR_WIDTH -} else { - puts "-- Accepted parameter \$f2sdram_addr_width = $f2sdram_addr_width" -} - -if { ![ info exists f2h_width ] } { - set f2h_width $F2H_WIDTH -} else { - puts "-- Accepted parameter \$f2h_width = $f2h_width" -} - -if { ![ info exists lwh2f_width ] } { - set lwh2f_width $LWH2F_WIDTH -} else { - puts "-- Accepted parameter \$lwh2f_width = $lwh2f_width" -} - -if { ![ info exists h2f_addr_width ] } { - set h2f_addr_width $H2F_ADDR_WIDTH -} else { - puts "-- Accepted parameter \$h2f_addr_width = $h2f_addr_width" -} - -if { ![ info exists f2h_addr_width ] } { - set f2h_addr_width $F2H_ADDR_WIDTH -} else { - puts "-- Accepted parameter \$f2h_addr_width = $f2h_addr_width" -} - -if { ![ info exists lwh2f_addr_width ] } { - set lwh2f_addr_width $LWH2F_ADDR_WIDTH -} else { - puts "-- Accepted parameter \$lwh2f_addr_width = $lwh2f_addr_width" -} - -# if { ![ info exists h2f_clk_source ] } { - # set h2f_clk_source $H2F_CLK_SOURCE -# } else { - # puts "-- Accepted parameter \$h2f_clk_source = $h2f_clk_source" -# } - -# if { ![ info exists f2h_clk_source ] } { - # set f2h_clk_source $F2H_CLK_SOURCE -# } else { - # puts "-- Accepted parameter \$f2h_clk_source = $f2h_clk_source" -# } - -# if { ![ info exists lwh2f_clk_source ] } { - # set lwh2f_clk_source $LWH2F_CLK_SOURCE -# } else { - # puts "-- Accepted parameter \$lwh2f_clk_source = $lwh2f_clk_source" -# } - -# if { ![ info exists ocm_clk_source ] } { - # set ocm_clk_source $OCM_CLK_SOURCE -# } else { - # puts "-- Accepted parameter \$ocm_clk_source = $ocm_clk_source" -# } - -# if { ![ info exists secure_f2h_axi_slave ] } { - # set secure_f2h_axi_slave $SECURE_F2H_AXI_SLAVE -# } else { - # puts "-- Accepted parameter \$secure_f2h_axi_slave = $secure_f2h_axi_slave" -# } - -# if { ![ info exists hps_peri_irq_loopback_en ] } { - # set hps_peri_irq_loopback_en $HPS_PERI_IRQ_LOOPBACK_EN -# } else { - # puts "-- Accepted parameter \$hps_peri_irq_loopback_en = $hps_peri_irq_loopback_en" -# } - -if { ![ info exists hps_f2s_irq_en ] } { - set hps_f2s_irq_en $HPS_F2S_IRQ_EN -} else { - puts "-- Accepted parameter \$hps_f2s_irq_en = $hps_f2s_irq_en" -} - -if { ![ info exists daughter_card ] } { - set daughter_card $DAUGHTER_CARD -} else { - puts "-- Accepted parameter \$daughter_card = $daughter_card" -} - -# if { ![ info exists cross_trigger_en ] } { - # set cross_trigger_en $CROSS_TRIGGER_EN -# } else { - # puts "-- Accepted parameter \$cross_trigger_en = $cross_trigger_en" -# } - -# if { ![ info exists hps_stm_en ] } { - # set hps_stm_en $HPS_STM_EN -# } else { - # puts "-- Accepted parameter \$hps_stm_en = $hps_stm_en" -# } - -# if { ![ info exists ftrace_en ] } { - # set ftrace_en $FTRACE_EN -# } else { - # puts "-- Accepted parameter \$ftrace_en = $ftrace_en" -# } - -# if { ![ info exists ftrace_output_width ] } { - # set ftrace_output_width $FTRACE_OUTPUT_WIDTH -# } else { - # puts "-- Accepted parameter \$ftrace_output_width = $ftrace_output_width" -# } - -# if { ![ info exists hps_pll_source_export ] } { - # set hps_pll_source_export $HPS_PLL_SOURCE_EXPORT -# } else { - # puts "-- Accepted parameter \$hps_pll_source_export = $hps_pll_source_export" -# } - -# if { ![ info exists reset_watchdog_en ] } { - # set reset_watchdog_en $RESET_WATCHDOG_EN -# } else { - # puts "-- Accepted parameter \$reset_watchdog_en = $reset_watchdog_en" -# } - -# if { ![ info exists reset_hps_warm_en ] } { - # set reset_hps_warm_en $RESET_HPS_WARM_EN -# } else { - # puts "-- Accepted parameter \$reset_hps_warm_en = $reset_hps_warm_en" -# } - -# if { ![ info exists reset_h2f_cold_en ] } { - # set reset_h2f_cold_en $RESET_H2F_COLD_EN -# } else { - # puts "-- Accepted parameter \$reset_h2f_cold_en = $reset_h2f_cold_en" -# } - -# if { ![ info exists reset_sdm_watchdog_cfg ] } { - # set reset_sdm_watchdog_cfg $RESET_SDM_WATCHDOG_CFG -# } else { - # puts "-- Accepted parameter \$reset_sdm_watchdog_cfg = $reset_sdm_watchdog_cfg" -# } - -# ---------------- -# Parameter Auto Derivation -# ---------------- - -# Default option -set hps_io_off 0 - -# if {$hps_en == 1} { -# puts "Solver INFO: hps ENABLED" -# } else { -# puts "Solver INFO: NO hps" -# } - -# if {$board == "char"} { -# puts "Warning: Overriding Settings for Char BOARD" -# set user0_clk_src_select 1 -# set fpga_peripheral_en 0 -# } - -# for cct_adapter -# if {$f2s_address_width > 32 && $f2sdram_width > 0} { - # set cct_en 1 - # set cct_control_interface 2 -# } else { - # set cct_en 0 -# } - -source ./agilex_hps_pinmux_solver.tcl -source ./agilex_hps_parameter_solver.tcl -source ./agilex_hps_io48_delay_chain_solver.tcl - -# Was thinking to enable single TCL entry for flow of TOP RTL, qsys, quartus generation. Ideal still pending implementation -# exec quartus_sh --script=create_ghrd_quartus.tcl $top_quartus_arg -# exec qsys-script --script=create_ghrd_qsys.tcl --quartus-project=$project_name.qpf --cmd="$qsys_arg" diff --git a/sm_soc_devkit_ghrd/peripheral_subsys/design_config.tcl b/sm_soc_devkit_ghrd/peripheral_subsys/design_config.tcl deleted file mode 100755 index fcf1ea1..0000000 --- a/sm_soc_devkit_ghrd/peripheral_subsys/design_config.tcl +++ /dev/null @@ -1,106 +0,0 @@ -#**************************************************************************** -# -# SPDX-License-Identifier: MIT-0 -# Copyright(c) 2019-2021 Intel Corporation. -# -#**************************************************************************** -# USAGE OF THIS FILE -# ------------------ -# Parameters set in this file are served as default value to configure GHRD for generation. -# Higher level sripts that call upon create_ghrd_*.tcl can over-write value of parameters -# by arguments to be passed in during execution of script. -# -#**************************************************************************** - -set SUBSYS_NAME subsys_abc -set PROJECT_NAME ghrd_agilex -set TOP_NAME ghrd_agilex5_top -set DEVICE_FAMILY "Agilex 5" -set DEVICE A5ED065BB32AE5SR0 - -##### features of GHRD enabling ##### - -# setting to enable clock gating for NINIT_DONE -set CLK_GATE_EN 0 - -## ---------------- -## Board -## ---------------- - -set BOARD "hidden" -# Only valid for board="DK-SI-AGF014E"; "enpirion" or "linear" -#set BOARD_PWRMGT "linear" - -# IO48 DAUGHTER_CARD, available options such as "devkit_dc_oobe", "devkit_dc_nand", "devkit_dc_emmc" -set DAUGHTER_CARD "devkit_dc_oobe" - -set HPS_FIRST_CONFIG 0 -## ---------------- -## HPS -## ---------------- - -# Option to enable Hard Processor System -set HPS_EN 1 -# Option to enable H2F User Clock0 Output Port -set USER0_CLK_SRC_SELECT 0 -set USER1_CLK_SRC_SELECT 0 -set USER0_CLK_FREQ 500 -set USER1_CLK_FREQ 500 - - -set HPS_F2H_IRQ_EN 0 -set F2H_FREE_CLK_EN 0 -# Option to enable HPS EMIF -set HPS_EMIF_EN 0 - -# Option to enable HPS initialization first or after FPGA initialization done -set SYS_INITIALIZATION "fpga" - -# Option to select HPS debug access port modes -set HPS_DAP_MODE 2 - -# Option to enable Fast Trace x32/x16 routed via FPGA, Fast Trace and Early Trace are exclusively exist -set FTRACE_EN 0 - -# Option to select x32/x16 output width for Fast Trace routed via FPGA -set FTRACE_OUTPUT_WIDTH 16 - -# Option to export the HPS PLL reference clock source to be feed by F2S clock -set HPS_PLL_SOURCE_EXPORT 0 - -# Option to enable WatchDog reset -set RESET_WATCHDOG_EN 0 - -# Option to enable HPS Warm Reset -set RESET_HPS_WARM_EN 0 - -# Option to enable HPS-to-FPGA Cold Reset -set RESET_H2F_COLD_EN 0 - -# Option to select how the SDM handles the watchdog reset -set RESET_SDM_WATCHDOG_CFG 0 - -# Options to enable and set width of each AXI Bridge -set H2F_WIDTH 128 -set F2H_WIDTH 64 -set LWH2F_WIDTH 32 -set F2S_DATA_WIDTH 256 -set F2S_ADDRESS_WIDTH 32 -set F2SDRAM_WIDTH 256 -set F2SDRAM_ADDR_WIDTH 32 -set H2F_F2H_LOOPBACK_EN 0 -set LWH2F_F2H_LOOPBACK_EN 0 -set F2H_ADDR_WIDTH 32 -set H2F_ADDR_WIDTH 38 -set LWH2F_ADDR_WIDTH 29 -set F2H_CLK_SOURCE 0 -set H2F_CLK_SOURCE 0 -set LWH2F_CLK_SOURCE 0 -set OCM_CLK_SOURCE 0 -set SECURE_F2H_AXI_SLAVE 0 -set HPS_PERI_IRQ_LOOPBACK_EN 0 -set HPS_F2S_IRQ_EN 1 - -# setting to enable Cross Triggering -set CROSS_TRIGGER_EN 0 -set HPS_STM_EN 0 diff --git a/sm_soc_devkit_ghrd/peripheral_subsys/utils.tcl b/sm_soc_devkit_ghrd/peripheral_subsys/utils.tcl deleted file mode 100755 index 3bf268b..0000000 --- a/sm_soc_devkit_ghrd/peripheral_subsys/utils.tcl +++ /dev/null @@ -1,332 +0,0 @@ -#**************************************************************************** -# -# SPDX-License-Identifier: MIT-0 -# Copyright(c) 2017-2020 Intel Corporation. -# -#**************************************************************************** -# -# This file contail TCL procedures as ultilities for Lego based GHRD creation -# Kindly source this file for Lego blocks creation - -# --- Procedure to add component together with parameterization --- # -# means to have , , followed by pairs -# -#**************************************************************************** - -proc add_component_param {args} { - set lpos 0 - set length [llength $args] - # puts "Length of argument: $length" - # puts "LIST become $args" - - #array set arg $args - #set argss [array get arg] - #puts "... $argss" -#regsub -all "({) (})" $args "" stripped -#puts "stripped LIST become $stripped" - -set splitted [split $args { }] -set length [llength [list $splitted]] -# puts "Length of splitted argument: $length" - -if {[llength $args] == 1} {set arguments [lindex $args 0]} -# puts "stripped LIST become $arguments" -# set length [llength $arguments] -# puts "Length of stripped: $length" - -# Retrieve the first arg as component name -set component_type [lindex $arguments 0] -set arguments [lreplace $arguments 0 0] -# puts "1st arguments become $arguments" -# puts "Component Type: $component_type" - -# Retrieve the 2nd arg as instance name -set instance_name [lindex $arguments 0] -set arguments [lreplace $arguments 0 0] -# puts "2nd arguments become $arguments" -# puts "Instance Name: $instance_name" - -# Retrieve the 4th arg as ip file path, 3rd arg as it is just label -set ip_file_path [lindex $arguments 1] -for {set i 0} {$i < 2} {incr i} { -set arguments [lreplace $arguments 0 0] -} -# puts "4th arguments become $arguments" -# puts "IP File Path: $ip_file_path" - -# Add component instance into design -add_component $instance_name $ip_file_path $component_type -# add_component ILC ip/ghrd_10as066n2/ghrd_10as066n2_ILC.ip interrupt_latency_counter ILC -# add_component clk_100 ip/$qsys_name/clk_100.ip altera_clock_bridge clk_100_inst - -# Load component instance into design for parameterization setup -load_component $instance_name - -# puts "Final arguments become $arguments" - -# puts "3rd arguments become $arguments" -# Check if parameter->value pairs matched -set parameter "" -set value "" -if {[llength $arguments]%2 == 0} { - foreach item $arguments { - if {$lpos %2 == 0} { - set parameter $item - puts "Param:\[$item\]" - } else { - set value $item - puts "Value:\[$item\]" - } - if {$lpos %2 == 1} {set_component_parameter_value $parameter $value} - incr lpos - } - #Save component instance after parameterization - save_component - return 0 - } else { - puts "\[Component: $component_type\]Inserted parameter->value pair has ODD arguments, please verify correntness." - } -} - -# --- Procedure to modify only component instance parameters --- # -# Component instance must be already instantiated into qsys system before this procedure is called -# means to have followed by pairs -proc set_component_param {args} { - set lpos 0 - set length [llength $args] - puts "Length of argument: $length" - # puts "LIST become $args" - - # Retrieve fresh argument from sourcing TCL to get all elements - if {[llength $args] == 1} {set arguments [lindex $args 0]} - - # puts "stripped LIST become $arguments" - set length [llength $arguments] - # puts "Length of stripped: $length" - - # Retrieve the 1st arg as instance name - set instance_name [lindex $arguments 0] - set arguments [lreplace $arguments 0 0] - puts "Instance Name: $instance_name" - - # Load component instance into design for parameterization setup - load_component $instance_name - - # Check if parameter->value pairs matched - set parameter "" - set value "" - if {[llength $arguments]%2 == 0} { - foreach item $arguments { - if {$lpos %2 == 0} { - set parameter $item - puts "Param:\[$item\]" - } else { - set value $item - puts "Value:\[$item\]" - } - if {$lpos %2 == 1} {set_component_parameter_value $parameter $value} - incr lpos - } - #Save component instance after parameterization - save_component - return 0 - } else { - puts "\[Instance: $instance_name\]Inserted parameter->value pair has ODD arguments, please verify correntness." - } -} - -# --- Procedure to add instance together with parameterization --- # -# means to have followed by pairs -proc add_instance_param {args} { - set lpos 0 - set length [llength $args] - # puts "Length of argument: $length" - # puts "LIST become $args" - - #array set arg $args - #set argss [array get arg] - #puts "... $argss" -#regsub -all "({) (})" $args "" stripped -#puts "stripped LIST become $stripped" - -#set splitted [split $args { }] -#set length [llength [list $splitted]] -#puts "Length of splitted argument: $length" - -if {[llength $args] == 1} {set arguments [lindex $args 0]} -# puts "stripped LIST become $arguments" -set length [llength $arguments] -# puts "Length of stripped: $length" - -# Retrieve the first arg as component name -set component_name [lindex $arguments 0] -set arguments [lreplace $arguments 0 0] -# puts "1st arguments become $arguments" -# puts "Component Name: $component_name" - -# Retrieve the 2nd arg as instance name -set instance_name [lindex $arguments 0] -set arguments [lreplace $arguments 0 0] -# puts "2nd arguments become $arguments" -# puts "Instance Name: $instance_name" - -# Add component instance into design -add_instance $instance_name $component_name - -# puts "3rd arguments become $arguments" -# Check if parameter->value pairs matched -set parameter "" -set value "" -if {[llength $arguments]%2 == 0} { - foreach item $arguments { - if {$lpos %2 == 0} { - set parameter $item - puts "Param:\[$item\]" - } else { - set value $item - puts "Value:\[$item\]" - } - if {$lpos %2 == 1} {set_instance_parameter_value $instance_name $parameter $value} - incr lpos - } - return 0 - - } else { - puts "\[Component: $component_name\]Inserted parameter->value pair has ODD arguments, please verify correntness." - } -} - - -# --- Procedure to modify only instance parameters --- # -# Instance must be already instantiated into qsys system before this procedure is called -# means to have followed by pairs -proc set_instance_param {args} { - set lpos 0 - set length [llength $args] - puts "Length of argument: $length" - # puts "LIST become $args" - - # Retrieve fresh argument from sourcing TCL to get all elements - if {[llength $args] == 1} {set arguments [lindex $args 0]} - - # puts "stripped LIST become $arguments" - set length [llength $arguments] - # puts "Length of stripped: $length" - - # Retrieve the 1st arg as instance name - set instance_name [lindex $arguments 0] - set arguments [lreplace $arguments 0 0] - puts "Instance Name: $instance_name" - - # Check if parameter->value pairs matched - set parameter "" - set value "" - if {[llength $arguments]%2 == 0} { - foreach item $arguments { - if {$lpos %2 == 0} { - set parameter $item - puts "Param:\[$item\]" - } else { - set value $item - puts "Value:\[$item\]" - } - if {$lpos %2 == 1} {set_instance_parameter_value $instance_name $parameter $value} - incr lpos - } - return 0 - - } else { - puts "\[Instance: $instance_name\]Inserted parameter->value pair has ODD arguments, please verify correntness." - } -} - - -# --- Procedure to establish connection between two instances ports --- # -# means to have and pairs -proc connect {args} { - set lpos 0 - set length [llength $args] - puts "Length of argument: $length" - # puts "LIST become $args" - - # Retrieve fresh argument from sourcing TCL to get all elements - if {[llength $args] == 1} {set arguments [lindex $args 0]} - - # puts "stripped LIST become $arguments" - set length [llength $arguments] - # puts "Length of stripped: $length" - - # Check if parameter->value pairs matched - set parameter "" - set value "" - if {[llength $arguments]%2 == 0} { - foreach item $arguments { - if {$lpos %2 == 0} { - set src $item - puts "From:\[$item\]" - } else { - set dst $item - puts "connect To:\[$item\]" - } - if {$lpos %2 == 1} {add_connection $src $dst} - incr lpos - } - return 0 - - } else { - puts "\[Intended connections has Odd pair of source --> destination. Please verify correntness." - } -} - - -# --- Procedure to establish connection between two instances ports with base address --- # -# means to have , and -proc connect_map {args} { - set lpos 0 - set length [llength $args] - puts "Length of argument: $length" - # puts "LIST become $args" - - # Retrieve fresh argument from sourcing TCL to get all elements - if {[llength $args] == 1} {set arguments [lindex $args 0]} - - #puts "stripped LIST become $arguments" - set length [llength $arguments] - puts "Length of arguments: $length" - - # Check if parameter->value pairs matched - set parameter "" - set value "" - if {[llength $arguments]%3 == 0} { - #foreach item $arguments { - # if {$lpos %2 == 0} { - # set src $item - # puts "From:\[$item\]" - # } else { - # set dst $item - # puts "connect To:\[$item\]" - # } - # if {$lpos %2 == 1} {add_connection $src $dst} - # incr lpos - #} - foreach {src dest offset} $arguments { - add_connection $src $dest - set_connection_parameter_value $src/$dest baseAddress $offset - } - return 0 - - } else { - puts "\[Intended connections has Odd pair of source --> destination. Please verify correntness." - } -} - -# --- Procedure to export instance port --- # -# EXPORT procedure set to export instances port to the top level of Qsys design -# Argument means to have and pairs -proc export {instance port name} { - set_interface_property $name EXPORT_OF ${instance}.${port} -} - -proc wsplit {str sepStr} { - split [string map [list $sepStr \0] $str] \0] -}