diff --git a/zpu/hdl/zpuino/boards/xula2/S6LX9/bootloader.vhd b/zpu/hdl/zpuino/boards/xula2/S6LX9/bootloader.vhd index 96d2670f..c9d90779 100644 --- a/zpu/hdl/zpuino/boards/xula2/S6LX9/bootloader.vhd +++ b/zpu/hdl/zpuino/boards/xula2/S6LX9/bootloader.vhd @@ -26,7 +26,7 @@ architecture behave of bootloader_dp_32 is subtype RAM_WORD is STD_LOGIC_VECTOR (31 downto 0); type RAM_TABLE is array (0 to 1023) of RAM_WORD; shared variable RAM: RAM_TABLE := RAM_TABLE'( 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begin diff --git a/zpu/hdl/zpuino/boards/xula2/S6LX9/xula2.ucf b/zpu/hdl/zpuino/boards/xula2/S6LX9/xula2.ucf index 981abc5a..78d74efb 100644 --- a/zpu/hdl/zpuino/boards/xula2/S6LX9/xula2.ucf +++ b/zpu/hdl/zpuino/boards/xula2/S6LX9/xula2.ucf @@ -76,7 +76,7 @@ NET miso_i LOC = P10; # Prototyping Header ############################## NET chanClk_io LOC = T7; # L32N -NET chan_io<0> LOC = R7; # L32P +NET chan_io<0> LOC = R7 | PULLUP; # L32P NET chan_io<1> LOC = R15; # L49P NET chan_io<2> LOC = R16; # L49N NET chan_io<3> LOC = M15; # L46P diff --git a/zpu/hdl/zpuino/boards/xula2/S6LX9/xula2_top.vhd b/zpu/hdl/zpuino/boards/xula2/S6LX9/xula2_top.vhd index 1f64c8a0..7331ba90 100644 --- a/zpu/hdl/zpuino/boards/xula2/S6LX9/xula2_top.vhd +++ b/zpu/hdl/zpuino/boards/xula2/S6LX9/xula2_top.vhd @@ -136,12 +136,12 @@ architecture behave of xula2_top is constant spp_cap_in: std_logic_vector(zpuino_gpio_count-1 downto 0) := "00" & "1111111111111111" & - "1111111111111111"; + "1111111111111100"; constant spp_cap_out: std_logic_vector(zpuino_gpio_count-1 downto 0) := "00" & "1111111111111111" & - "1111111111111111"; + "1111111111111100"; -- I/O Signals signal slot_cyc: slot_std_logic_type; @@ -403,7 +403,7 @@ begin ibufrx: IPAD port map ( PAD => chan_io(0), O => rx, C => sysclk ); obuftx: OPAD port map ( I => tx, PAD => chan_io(1) ); - --pin00: IOPAD port map(I => gpio_o(0),O => gpio_i(0),T => gpio_t(0),C => sysclk,PAD => chan_io(0) ); + pin00: IOPAD port map(I => gpio_o(0),O => gpio_i(0),T => gpio_t(0),C => sysclk,PAD => chanClk_io ); --pin01: IOPAD port map(I => gpio_o(1),O => gpio_i(1),T => gpio_t(1),C => sysclk,PAD => chan_io(1) ); pin02: IOPAD port map(I => gpio_o(2),O => gpio_i(2),T => gpio_t(2),C => sysclk,PAD => chan_io(2) ); pin03: IOPAD port map(I => gpio_o(3),O => gpio_i(3),T => gpio_t(3),C => sysclk,PAD => chan_io(3) );