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32 bit RISC Microprocessor in VHDL language and implemented on Altera FPGA.
VHDL
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COS Report.pdf
LCD.vhd
LICENSE
README.md
integrtn_mem.vhd
memory.vhd
processor.vhd
register.vhd
subset.vhd
test_bench.vhd

README.md

32bitrisc-vhdl

32 bit RISC Microprocessor in VHDL language and implemented on Altera FPGA.

The Test bench module is executed in the model-sim software and the LCD module is implemented on the FPGA to display the Register value, Memory value and the Program counter.

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