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According to Section 6.1.2 of an official ECP5 manual, only the on-chip oscillator MCLK is available as the SPI clock when in Master SPI mode by default. To use any user clock as the SPI clock, a USRMCLK Instance must be instantiated and there is no need to request for the clock from Ball U3. Requesting for such clock will lead to an error as reported by @xobs on the nextpnr repo.
Therefore, I would like to suggest modification on memory.py such that there is an option to add the SPI flash resources to a platform (not only ECP5) without the clock. Although this modification has been used to successfully build and flash a bitstream on an ECP5 board (the example was an SPI reader module on my nmigen-stdio fork), I cannot deny that there is room for improvement on my code for this pull request.
I look forward to seeing further comments, thanks.
See also: my pull request on nmigen-stdio for a SPI controller.
Comment by sbourdeauducq Tuesday Dec 24, 2019 at 02:05 GMT
Note that sometimes such primitives combine many unrelated signals (and you can always count on Xilinx for doing that, see STARTUPE3), so this needs some thought. Maybe a central place where all those primitives are managed and where the user can access them (e.g. connect additional signals, modify their parameters) if required.
Issue by HarryHo90sHK
Monday Dec 23, 2019 at 08:22 GMT
Originally opened as m-labs/nmigen-boards#38
According to Section 6.1.2 of an official ECP5 manual, only the on-chip oscillator MCLK is available as the SPI clock when in Master SPI mode by default. To use any user clock as the SPI clock, a USRMCLK Instance must be instantiated and there is no need to request for the clock from Ball U3. Requesting for such clock will lead to an error as reported by @xobs on the nextpnr repo.
Therefore, I would like to suggest modification on memory.py such that there is an option to add the SPI flash resources to a platform (not only ECP5) without the clock. Although this modification has been used to successfully build and flash a bitstream on an ECP5 board (the example was an SPI reader module on my nmigen-stdio fork), I cannot deny that there is room for improvement on my code for this pull request.
I look forward to seeing further comments, thanks.
See also: my pull request on nmigen-stdio for a SPI controller.
HarryHo90sHK included the following code: https://github.com/m-labs/nmigen-boards/pull/38/commits
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