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Add Digilent Genesys2 board #49
Add Digilent Genesys2 board #49
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Thanks for the fixes! There are a few more things I'd like you to change though.
nmigen_boards/genesys2.py
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Subsignal("scl", Pins("AE19", dir="io")), | ||
Subsignal("sda", Pins("AF18", dir="io")), | ||
Attrs(IOSTANDARD="LVCMOS18")), | ||
Resource("oled", 0, |
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What interface does the display actually implement? SPI?
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@whitequark it's an SPI interface w/o cs
and miso
pins. SPIResource
expects those pins to be present. How should I tackle this?
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Thank you for your patience! All looks good to me now. |
The
Blinky
test works fine on my board.