bit_select and word_select behave differently

[x44203]

The commented-out word_select shoud behave the same as the bit_select but the bit_select throws a "IndexError: Cannot stop slice 9 bits into 8-bit value" while the word_select compiles just fine.

class Test(Elaboratable):
    def elaborate(self, platform):
        m = Module()
        datain = Signal(4)
        dataout = Signal(8)
        assert len(dataout) % len(datain) == 0
        counter = Signal()
        #m.d.sync += dataout.word_select(counter, 4).eq(datain)
        m.d.sync += dataout.bit_select(counter * 4, 4).eq(datain)
        return m

FPGA.ECP55GEVNPlatform().build(Test())

[whitequark]

Interestingly the codegen for word_select appears to be broken too.