Closed
Description
For clocks coming from an instance, platform.add_clock_constraint
doesn't seem to work, as vivado is unable to find the net that the constraint is assigned to.
Running this example:
from nmigen import *
from nmigen_boards.zturn_lite_z010 import *
class Test(Elaboratable):
def elaborate(self, plat):
m = Module()
fclk = Signal(4)
m.submodules += Instance("PS7", o_FCLKCLK = fclk)
clk = Signal()
m.d.comb += clk.eq(fclk[0])
m.domains += ClockDomain("sync")
m.d.comb += ClockSignal().eq(clk)
plat.add_clock_constraint(clk, 100_000_000)
return m
plat = ZTurnLiteZ010Platform()
t = Test()
plat.build(t)
causes vivado to issue the following warning:
WARNING: [Vivado 12-507] No nets matched 'clk'. [/data/projects/nmigen_bugs/build/top.xdc:2]
And the subsequent timing report is empty.
Full build directory: build.zip
This is using nmigen commit ba79b0c.