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add_clock_constraint not working #395

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andresdemski opened this issue Jun 2, 2020 · 2 comments
Closed

add_clock_constraint not working #395

andresdemski opened this issue Jun 2, 2020 · 2 comments

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@andresdemski
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andresdemski commented Jun 2, 2020

Hi!
I'm trying to add ZynqMP PS to an nmigen design I don't need to create a block design again.

I wrapped PS instantiation with an nMiguen elaboratable and I added a DONT_TOUCH constraint in order to avoid deletion during optimization process.

In this case, the clk source comes from a signal so i added a clock constraint as is show next:

from nmigen import ClockSignal, ResetSignal, ClockDomain
from nmigen.cli import main
from .platform import MyPlatform

class Test(Elaboratable):
    def elaborate(self, platform):
        m = Module()
        m.domains += ClockDomain('sync')
        m.submodules.ps = ps = PsZynqMP()

        cnt = Signal(8)
        m.d.sync += cnt.eq(cnt + 1)
        m.d.comb += ps.get_irq_signal(0).eq(cnt)

        clk = ps.get_clock_signal(0)
        platform.add_clock_constraint(clk, 200e6)
        m.d.comb += ResetSignal().eq(~ps.get_reset_signal(0))
        m.d.comb += ClockSignal().eq(clk)

        return m

core = Test()
plat = MyPlatform()
constraints = '''
set_property DONT_TOUCH true [get_cells  "ps/PS8_i"]
'''
plat.add_file('zynq_ultra.v', open('zynq_ultra.v').read())
plat.build(core, add_constraints=constraints)

the xdc file is generated correctly:

# Automatically generated by nMigen 0.2. Do not edit.
create_clock -name pl_clk0 -period 5.0 [get_nets pl_clk0]
set_property DONT_TOUCH true [get_cells  "ps/PS8_i"]% 

But vivado is not recognizing the constraint:

CRITICAL WARNING: [Vivado 12-4739] create_clock:No valid object(s) found for '-objects [get_nets pl_clk0]'.

I added a constrain manually and it works as it is expected:

constraints = '''
set_property DONT_TOUCH true [get_cells  "ps/PS8_i"]
create_clock -name clk_pl_0 -period "10" [get_pins "ps/PS8_i/PLCLK[0]"]
 '''
plat.add_file('zynq_ultra.v', open('zynq_ultra.v').read())
plat.build(core, add_constraints=constraints)

In vivado, the command get_nets pl_clk0 doesn't work. pl_clk0 is in the verilog file so it looks like it was simplified:

image

@whitequark
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whitequark commented Jun 2, 2020

@andresdemski
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andresdemski commented Jun 3, 2020

I was using nMigen from pypi, with last master it works perfectly. Sorry.

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