Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Utilise write_verilog -sv for targets that support it #437

Open
Ravenslofty opened this issue Jul 16, 2020 · 1 comment
Open

Utilise write_verilog -sv for targets that support it #437

Ravenslofty opened this issue Jul 16, 2020 · 1 comment

Comments

@Ravenslofty
Copy link
Contributor

Ravenslofty commented Jul 16, 2020

YosysHQ/yosys#2272 adds a SystemVerilog output option. It would be nice to use it on vendor targets that support SV, but would require a Yosys version check. It might be best to delay this until the next release of Yosys.

@whitequark
Copy link
Member

whitequark commented Dec 11, 2021

write_verilog -sv is included in the 0.10 release, required as of today, so this can be implemented now.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Development

No branches or pull requests

2 participants