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Attributes are not properly applied to IBUFDS (and possibly other primitives) in Xilinx platform #641

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H-S-S-11 opened this issue Oct 9, 2021 · 1 comment · May be fixed by #652
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@H-S-S-11
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H-S-S-11 commented Oct 9, 2021

https://pastebin.com/qvymcNWi

In the example an IBUFDS resource is created and requested, with particular Attributes:

Resource("IBUFDS", 0,
                DiffPairs("48", "46", conn=("gpio", 1), dir="i"),
                Attrs(IOSTANDARD="LVDS_25", IBUF_LOW_PWR="FALSE")
            ),

When run the attributes appear in the generated ucf, and an IBUFDS primitive is instantiated in the generated verilog. However when ISE actually runs synthesis, the instance properties do not show these attributes applied:
image
In order for ISE to apply the attributes, they need to be parameters to the IBUFDS which is Instanced in xilinx.py.

If the generated verilog is edited where the IBUFDS is Instanced, then the attributes are properly applied:

IBUFDS #(
  .IOSTANDARD("LVDS_25"),
  .IBUF_LOW_PWR("FALSE")
) IBUFDS_0_0 (
  .I(IBUFDS_0__p),
  .IB(IBUFDS_0__n),
  .O(IBUFDS_0__i)
);

In ISE:
image

modwizcode added a commit to modwizcode/amaranth that referenced this issue Dec 13, 2021
ISE doesn't support using the constraints file to specify attributes on
IO buffers, this works around that by specifying them also as module
parameters which ISE does support properly.

Fixes amaranth-lang#641.
@modwizcode modwizcode linked a pull request Dec 13, 2021 that will close this issue
@whitequark
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whitequark commented Dec 13, 2021

Are you sure this is issue is actually present?

The IBUF_LOW_PWR attribute, when applied as a parameter to the IBUFDS cell in your design, does not change the bitstream whether its value is "TRUE" or "FALSE", so looking at it is not informative. However, other attributes, like DIFF_TERM or IOSTANDARD, are indeed applied when specified in the UCF file, which you can see by looking at the top_par_pad.txt report.

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