One use of Amaranth that I frequently hit is just using it to produce a single output Verilog file that gets fed into another larger project. Currently this means that I directly convert the output to Verilog. What this means is that none of the platform specific changes such as FFSynchronizer specialization occur.
This means that you can end up with extremely undesirable behavior such as synchronizers getting converted into shift registers since they will lack the attributes required to inform the Xilinx synthesis to not do this.
It should be significantly easier to produce this platform/device specific output without a full board configuration and/or producing an entire output project.
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