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RISC-V Assembler and Runtime Simulator
Branch: master
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License: GPL v3 Codacy Badge Join the chat at Travis CI issues Version

V-Sim is a simple assembler and runtime simulator inspired by SPIM for programming in RISC-V assembly language and intended for educational purposes. One of the main goals was to make it functional and easy to use. Almost all the 32-bit base integer instruction set (RV32I) can be simulated, as well as the M and F extensions plus all the their respective pseudo-instructions. For the installation guide and a complete list of supported instructions, please visit the docs page.


Pull requests and stars are always welcome. For bugs and feature requests, please create an issue.


A big thank you to all the people working on the RISC-V project.

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