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Added Energia support to UTFT library.

Currently only 8 bit HX8340B_8 display is tested on custom MSP430FR5739 board.
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andresv committed Apr 7, 2013
1 parent 9ac072b commit 9ca1816f5c4ab81bea9e3fc3d24c0e07481e152a
@@ -11,6 +11,9 @@
#elif defined(__arm__)
#define PROGMEM
#define fontdatatype const unsigned char
#elif defined(__MSP430__)
#define PROGMEM
#define fontdatatype const unsigned char
#endif

// SmallFont.c
@@ -0,0 +1,201 @@
// *** Hardwarespecific functions ***
void UTFT::_hw_special_init()
{
}

void UTFT::LCD_Writ_Bus(char VH,char VL, byte mode)
{
switch (mode)
{
case 1:
if (display_serial_mode==SERIAL_4PIN)
{
if (VH==1)
sbi(P_SDA, B_SDA);
else
cbi(P_SDA, B_SDA);
pulse_low(P_SCL, B_SCL);
}
else
{
if (VH==1)
sbi(P_RS, B_RS);
else
cbi(P_RS, B_RS);
}

if (VL & 0x80)
sbi(P_SDA, B_SDA);
else
cbi(P_SDA, B_SDA);
pulse_low(P_SCL, B_SCL);
if (VL & 0x40)
sbi(P_SDA, B_SDA);
else
cbi(P_SDA, B_SDA);
pulse_low(P_SCL, B_SCL);
if (VL & 0x20)
sbi(P_SDA, B_SDA);
else
cbi(P_SDA, B_SDA);
pulse_low(P_SCL, B_SCL);
if (VL & 0x10)
sbi(P_SDA, B_SDA);
else
cbi(P_SDA, B_SDA);
pulse_low(P_SCL, B_SCL);
if (VL & 0x08)
sbi(P_SDA, B_SDA);
else
cbi(P_SDA, B_SDA);
pulse_low(P_SCL, B_SCL);
if (VL & 0x04)
sbi(P_SDA, B_SDA);
else
cbi(P_SDA, B_SDA);
pulse_low(P_SCL, B_SCL);
if (VL & 0x02)
sbi(P_SDA, B_SDA);
else
cbi(P_SDA, B_SDA);
pulse_low(P_SCL, B_SCL);
if (VL & 0x01)
sbi(P_SDA, B_SDA);
else
cbi(P_SDA, B_SDA);
pulse_low(P_SCL, B_SCL);
break;
case 8:
// Set 8-bit parallel interface pins
// D0 J.1
// D1 J.0
// D2 1.3
// D3 3.3
// D4 3.2
// D5 3.1
// D6 3.0
// D7 1.2
PJOUT &= ~0x03;
PJOUT |= ((VH & 0x01) << 1) | (VH & 0x02)>>1; // set D0, D1
P1OUT &= ~0x08;
P1OUT |= (VH & 0x04) << 1; // set D2
P3OUT &= ~0x0F;
P3OUT |= (VH & 0x08) | ((VH & 0x10) >> 2) | ((VH & 0x20) >> 4) | ((VH & 0x40) >> 6); // set D3, D4, D5, D6
P1OUT &= ~0x04;
P1OUT |= (VH & 0x80) >> 5; // set D7
pulse_low(P_WR, B_WR);
PJOUT &= ~0x03;
PJOUT |= ((VL & 0x01) << 1) | (VL & 0x02)>>1; // set D0, D1
P1OUT &= ~0x08;
P1OUT |= (VL & 0x04) << 1; // set D2
P3OUT &= ~0x0F;
P3OUT |= (VL & 0x08) | ((VL & 0x10) >> 2) | ((VL & 0x20) >> 4) | ((VL & 0x40) >> 6); // set D3, D4, D5, D6
P1OUT &= ~0x04;
P1OUT |= (VL & 0x80) >> 5; // set D7
pulse_low(P_WR, B_WR);
break;
case 16:
#pragma message("LCD_Writ_Bus mode 16 pins not defined!")
break;
case LATCHED_16:
asm("nop"); // Mode is unsupported
break;
}
}

void UTFT::_set_direction_registers(byte mode)
{
if (mode!=LATCHED_16)
{
PJDIR |= 0x03;
P1DIR |= 0x0C;
P3DIR |= 0x0F;
if (mode==16) {
#pragma message("_set_direction_registers mode 16 pins not defined!")
}
}
else
{
asm("nop"); // Mode is unsupported
}
}

void UTFT::_fast_fill_16(int ch, int cl, long pix)
{
long blocks;
#pragma message("_fast_fill_16 pins not defined!")

blocks = pix/16;
for (int i=0; i<blocks; i++)
{
pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);
}
if ((pix % 16) != 0)
for (int i=0; i<(pix % 16); i++)
{
pulse_low(P_WR, B_WR);
}
}

void UTFT::_fast_fill_8(int ch, long pix)
{
long blocks;
// Set 8-bit parallel interface pins
// D0 J.1
// D1 J.0
// D2 1.3
// D3 3.3
// D4 3.2
// D5 3.1
// D6 3.0
// D7 1.2
PJOUT &= ~0x03;
PJOUT |= ((ch & 0x01) << 1) | (ch & 0x02)>>1; // set D0, D1
P1OUT &= ~0x08;
P1OUT |= (ch & 0x04) << 1; // set D2
P3OUT &= ~0x0F;
P3OUT |= (ch & 0x08) | ((ch & 0x10) >> 2) | ((ch & 0x20) >> 4) | ((ch & 0x40) >> 6); // set D3, D4, D5, D6
P1OUT &= ~0x04;
P1OUT |= (ch & 0x80) >> 5; // set D7

blocks = pix/16;
for (int i=0; i<blocks; i++)
{
pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
}
if ((pix % 16) != 0)
for (int i=0; i<(pix % 16); i++)
{
pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
}
}
@@ -0,0 +1,19 @@
// *** Hardwarespecific defines ***
#define cbi(reg, bitmask) *reg &= ~bitmask
#define sbi(reg, bitmask) *reg |= bitmask
#define pulse_high(reg, bitmask) sbi(reg, bitmask); cbi(reg, bitmask);
#define pulse_low(reg, bitmask) cbi(reg, bitmask); sbi(reg, bitmask);

#define cport(port, data) port &= data
#define sport(port, data) port |= data

#define swap(type, i, j) {type t = i; i = j; j = t;}

#define fontbyte(x) cfont.font[x]

#define pgm_read_word(data) *data
#define pgm_read_byte(data) *data
#define PROGMEM
#define regtype volatile uint8_t
#define regsize uint8_t
#define bitmapdatatype unsigned short*
@@ -46,7 +46,11 @@
*/

#include "UTFT.h"
#include <pins_arduino.h>
#if defined(__MSP430__)
#include <pins_energia.h>
#else
#include <pins_arduino.h>
#endif

// Include hardware-specific functions for the correct MCU
#if defined(__AVR__)
@@ -81,6 +85,9 @@
#else
#error "Unsupported ARM MCU!"
#endif
#elif defined(__MSP430__)
#pragma message("Compiling for MSP430FR5739 Garage board...")
#include "HW_MSP430FR5739.h"
#endif
#include "memorysaver.h"

@@ -140,6 +140,9 @@
#elif defined(__arm__)
#include "Arduino.h"
#include "HW_ARM_defines.h"
#elif defined(__MSP430__)
#include "Energia.h"
#include "HW_MSP430_defines.h"
#endif

struct _current_font
@@ -12,18 +12,18 @@
// some flash memory by not including the init code for that particular
// controller.

//#define DISABLE_HX8347A 1 // ITDB32
//#define DISABLE_ILI9327 1 // ITDB32WC / TFT01_32W
//#define DISABLE_SSD1289 1 // ITDB32S / TFT_32 / GEEE32 / ELEE32_REVA / ELEE32_REVB - This single define will disable both 8bit, 16bit and latched mode for this controller
//#define DISABLE_ILI9325C 1 // ITDB24
//#define DISABLE_ILI9325D 1 // ITDB24D / ITDB24DWOT / ITDB28 / TFT01_24_8 / TFT01_24_16 - This single define will disable both 8bit and 16bit mode for this controller
#define DISABLE_HX8347A 1 // ITDB32
#define DISABLE_ILI9327 1 // ITDB32WC / TFT01_32W
#define DISABLE_SSD1289 1 // ITDB32S / TFT_32 / GEEE32 / ELEE32_REVA / ELEE32_REVB - This single define will disable both 8bit, 16bit and latched mode for this controller
#define DISABLE_ILI9325C 1 // ITDB24
#define DISABLE_ILI9325D 1 // ITDB24D / ITDB24DWOT / ITDB28 / TFT01_24_8 / TFT01_24_16 - This single define will disable both 8bit and 16bit mode for this controller
//#define DISABLE_HX8340B_8 1 // ITDB22 8bit mode / GEEE22
//#define DISABLE_HX8340B_S 1 // ITDB22 Serial mode
//#define DISABLE_HX8352A 1 // ITDB32WD / TFT01_32WD
//#define DISABLE_ST7735 1 // ITDB18SP
//#define DISABLE_PCF8833 1 // LPH9135
//#define DISABLE_S1D19122 1 // ITDB25H
//#define DISABLE_SSD1963_480 1 // ITDB43
//#define DISABLE_SSD1963_800 1 // ITDB50
//#define DISABLE_S6D1121 1 // ITDB24E - This single define will disable both 8bit and 16bit mode for this controller
//#define DISABLE_ILI9320 1 // GEEE24 / GEEE28 - This single define will disable both 8bit and 16bit mode for this controller
#define DISABLE_HX8340B_S 1 // ITDB22 Serial mode
#define DISABLE_HX8352A 1 // ITDB32WD / TFT01_32WD
#define DISABLE_ST7735 1 // ITDB18SP
#define DISABLE_PCF8833 1 // LPH9135
#define DISABLE_S1D19122 1 // ITDB25H
#define DISABLE_SSD1963_480 1 // ITDB43
#define DISABLE_SSD1963_800 1 // ITDB50
#define DISABLE_S6D1121 1 // ITDB24E - This single define will disable both 8bit and 16bit mode for this controller
#define DISABLE_ILI9320 1 // GEEE24 / GEEE28 - This single define will disable both 8bit and 16bit mode for this controller

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