WIP of gpio pin ctrl #1
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| /* GPIO Register Addresses **************************************************/ | ||
| //if gpio2 add + 6 0000 due to different base address | ||
| //TODO: should we do this as a inline function | ||
| #define GPIO_BASE_ADDR(n) ((2 >= n ) ? RK3399_GPIO0_ADDR : RK3399_GPIO2_ADDR) |
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@lupyuen
This is the best Idea I got for being able to switch the base address between the PMUGRF and GRF since their gpio have different base addresses.
I have todo this also on the iomux file but was wondering what suggestions you had that could be better.
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The RK3399 GPIO Fields look surprisingly similar to this: Maybe we could adapt the code from above? It might be hard to merge RK3399 and PHY62xx into the same source file, since its Arm64 vs Arm32. So we might have to physically copy the source. (It's the same for Allwinner A64: I copied the NuttX GPIO Driver from Allwinner A1x) Might be interesting to have a chat with the creator of the above source file, to understand what's PHY62xx and whether it shares the same hardware as RK3399. Thanks! |
wip gpio with selectable bank / gpio addr skeleton
| irqstate_t flags; | ||
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| flags = enter_critical_section(); | ||
| r = hal_gpio_read(m_gpiobanks[port].bankAddr,pin); |
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@lupyuen came up with this to allow to use the pinset to specify which of the 5 gpio to use and use the structure to contain additional data such as if the grf is on the pmugrf vs regular grf.
Need to finish implementing the hal init and hal write.
Probably first version won't implement interrupts.
| #define IOMUXC_GRF_GPIO4C_IO07_EDP_HOTPLUG | ||
| // GPIO 4D | ||
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| #define IOMUXC_GRF_GPIO4D_IO00_GPIO GRF_GPIO4D_IOMUX_ADDR, HIWORD_UPDATE(0b0000,0b1111,0), 0x00000000, 0x0, 0x00000000 |
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Need to rename hiword update but this is how it would look like to specify a specific grf usage / config
still WIP since it includes the GPIO and I have to finish more registers on rk3399_pinmux.h
Summary
Impact
Testing