From 4a0f1cf1eba9803767877e2d1fb0ca59c38fff82 Mon Sep 17 00:00:00 2001 From: svandenb-dev Date: Wed, 5 Nov 2025 13:09:08 +0100 Subject: [PATCH 1/2] bux fixed --- src/pyedb/grpc/database/source_excitations.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/pyedb/grpc/database/source_excitations.py b/src/pyedb/grpc/database/source_excitations.py index f4a906084b..8b8c64c9d1 100644 --- a/src/pyedb/grpc/database/source_excitations.py +++ b/src/pyedb/grpc/database/source_excitations.py @@ -653,7 +653,7 @@ def create_port_on_component( do_pingroup = False if do_pingroup: if len(ref_pins) == 1: - ref_pins.is_pin = True + ref_pins[0].is_pin = True ref_pin_group_term = self._create_terminal(ref_pins[0]) else: for pin in ref_pins: From 0d02ee51aa45274f5c2658e0579179657d7fad9f Mon Sep 17 00:00:00 2001 From: pyansys-ci-bot <92810346+pyansys-ci-bot@users.noreply.github.com> Date: Wed, 5 Nov 2025 12:13:15 +0000 Subject: [PATCH 2/2] chore: adding changelog file 1628.fixed.md [dependabot-skip] --- doc/changelog.d/1628.fixed.md | 1 + 1 file changed, 1 insertion(+) create mode 100644 doc/changelog.d/1628.fixed.md diff --git a/doc/changelog.d/1628.fixed.md b/doc/changelog.d/1628.fixed.md new file mode 100644 index 0000000000..e88aedbcbf --- /dev/null +++ b/doc/changelog.d/1628.fixed.md @@ -0,0 +1 @@ +Create port on component (grpc) bug fixed