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Pinned

  1. The FRED project! A scratch rebuild of an ABB IRB2000 Robot Controller!

    VHDL 1

  2. USB interface for FPGA using a the Cypress FX3

    VHDL 2 1

  3. Terminal command to Altera JTAG

    Tcl

  4. Dead time protection block for driving power electronics

    VHDL

18 contributions in the last year

Jun Jul Aug Sep Oct Nov Dec Jan Feb Mar Apr May Jun Mon Wed Fri

Contribution activity

May - June 2019

aprgl has no activity yet for this period.

April 2019

Created an issue in aprgl/fx3 that received 4 comments

Bulk read transfers of less than buffer size cause FX3 to hang until reset

If fx3 payload size is set less than 1024, read functions fail. This happens both using the Cypress tool as well as the libusb example. The writes …

4 comments

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