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Extended yield() support to Stream, analog, Serial, Audio.

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cmaglie committed Nov 12, 2012
1 parent 74dea07 commit d9c6e10d8272bb420652fa5291ac83802bfa6c50
@@ -449,7 +449,8 @@ int HardwareSerial::read(void)
void HardwareSerial::flush()
{
// UDR is kept full while the buffer is not empty, so TXC triggers when EMPTY && SENT
- while (transmitting && ! (*_ucsra & _BV(TXC0)));
+ while (transmitting && ! (*_ucsra & _BV(TXC0)))
+ yield();
transmitting = false;
}
@@ -461,7 +462,7 @@ size_t HardwareSerial::write(uint8_t c)
// wait for the interrupt handler to empty it a bit
// ???: return 0 here instead?
while (i == _tx_buffer->tail)
- ;
+ yield();
_tx_buffer->buffer[_tx_buffer->head] = c;
_tx_buffer->head = i;
@@ -34,6 +34,7 @@ int Stream::timedRead()
do {
c = read();
if (c >= 0) return c;
+ yield();
} while(millis() - _startMillis < _timeout);
return -1; // -1 indicates timeout
}
@@ -46,6 +47,7 @@ int Stream::timedPeek()
do {
c = peek();
if (c >= 0) return c;
+ yield();
} while(millis() - _startMillis < _timeout);
return -1; // -1 indicates timeout
}
@@ -75,7 +75,8 @@ int analogRead(uint8_t pin)
sbi(ADCSRA, ADSC);
// ADSC is cleared when the conversion finishes
- while (bit_is_set(ADCSRA, ADSC));
+ while (bit_is_set(ADCSRA, ADSC))
+ yield();
// we have to read ADCL first; doing so locks both ADCL
// and ADCH until ADCH is read. reading ADCL second would
@@ -34,6 +34,7 @@ int Stream::timedRead()
do {
c = read();
if (c >= 0) return c;
+ yield();
} while(millis() - _startMillis < _timeout);
return -1; // -1 indicates timeout
}
@@ -46,6 +47,7 @@ int Stream::timedPeek()
do {
c = peek();
if (c >= 0) return c;
+ yield();
} while(millis() - _startMillis < _timeout);
return -1; // -1 indicates timeout
}
@@ -104,14 +104,14 @@ void UARTClass::flush( void )
{
// Wait for transmission to complete
while ((_pUart->UART_SR & UART_SR_TXRDY) != UART_SR_TXRDY)
- ;
+ yield();
}
size_t UARTClass::write( const uint8_t uc_data )
{
// Check if the transmitter is ready
while ((_pUart->UART_SR & UART_SR_TXRDY) != UART_SR_TXRDY)
- ;
+ yield();
// Send character
_pUart->UART_THR = uc_data;
@@ -105,14 +105,14 @@ void USARTClass::flush( void )
{
// Wait for transmission to complete
while ((_pUsart->US_CSR & US_CSR_TXRDY) != US_CSR_TXRDY)
- ;
+ yield();
}
size_t USARTClass::write( const uint8_t uc_data )
{
// Check if the transmitter is ready
while ((_pUsart->US_CSR & US_CSR_TXRDY) != US_CSR_TXRDY)
- ;
+ yield();
// Send character
_pUsart->US_THR = uc_data ;
@@ -113,7 +113,7 @@ extern int _write( int file, char *ptr, int len )
// Check if the transmitter is ready
while ((UART->UART_SR & UART_SR_TXRDY) != UART_SR_TXRDY)
- ;
+ yield();
// Send character
UART->UART_THR = *ptr;
@@ -54,7 +54,7 @@ size_t AudioClass::write(const uint32_t *data, size_t size) {
if (next == half || next == last) {
enqueue();
while (next == running)
- ;
+ yield();
}
}

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