From 14829cfd6dc094e5d048988d297af7bb6c6baea6 Mon Sep 17 00:00:00 2001 From: pennam Date: Fri, 31 Oct 2025 16:01:01 +0100 Subject: [PATCH 1/4] boards: portentah7: allow memory mapping external QSPI flash This commit enable QSPI flash memory mapping on Arduino Portenta H7 Signed-off-by: Mattia Pennasilico --- .../portenta_h7/arduino_portenta_h7_stm32h747xx_m7.dts | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m7.dts b/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m7.dts index 001d8509059e2..3a30aef0c89ba 100644 --- a/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m7.dts +++ b/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m7.dts @@ -45,6 +45,14 @@ zephyr,memory-region = "SDRAM1"; zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>; }; + + ext_memory: memory@90000000 { + compatible = "zephyr,memory-region"; + reg = <0x90000000 DT_SIZE_M(16)>; /* max addressable area */ + zephyr,memory-region = "EXTMEM"; + /* The ATTR_MPU_EXTMEM attribut causing a MPU FAULT */ + zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO) )>; + }; }; &clk_hse { From 06a072c32aa4698f36d67c0fae17995d7e96bfe6 Mon Sep 17 00:00:00 2001 From: Mark O'Donovan Date: Tue, 26 Aug 2025 23:53:22 +0100 Subject: [PATCH 2/4] boards: opta: revert change of qspi flash spi-bus-width This fixes writes to the flash, and causes the following sample code to work again: samples/drivers/spi_flash Signed-off-by: Mark O'Donovan --- boards/arduino/opta/arduino_opta_stm32h747xx_m7.dts | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/boards/arduino/opta/arduino_opta_stm32h747xx_m7.dts b/boards/arduino/opta/arduino_opta_stm32h747xx_m7.dts index 7bedf04db4b9d..4244cced77b4d 100644 --- a/boards/arduino/opta/arduino_opta_stm32h747xx_m7.dts +++ b/boards/arduino/opta/arduino_opta_stm32h747xx_m7.dts @@ -169,8 +169,7 @@ zephyr_udc0: &usbotg_fs { size = ; /* 128 MBits */ qspi-max-frequency = <80000000>; jedec-id = [01 1f 89]; - spi-bus-width = <4>; - quad-enable-requirements = "NONE"; + spi-bus-width = <2>; status = "okay"; /* The following partitions are valid only if the Opta external flash From 71485021cbc3f555ddcf04f3699f5951fcaf8830 Mon Sep 17 00:00:00 2001 From: pennam Date: Tue, 4 Nov 2025 11:30:04 +0100 Subject: [PATCH 3/4] boards: opta: allow memory mapping external QSPI flash This commit enable QSPI flash memory mapping on OPTA Signed-off-by: Mattia Pennasilico --- boards/arduino/opta/arduino_opta_stm32h747xx_m7.dts | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/boards/arduino/opta/arduino_opta_stm32h747xx_m7.dts b/boards/arduino/opta/arduino_opta_stm32h747xx_m7.dts index 4244cced77b4d..86908b8de4e7a 100644 --- a/boards/arduino/opta/arduino_opta_stm32h747xx_m7.dts +++ b/boards/arduino/opta/arduino_opta_stm32h747xx_m7.dts @@ -21,6 +21,14 @@ zephyr,code-partition = &slot0_partition; zephyr,bt-hci = &bt_hci_uart; }; + + ext_memory: memory@90000000 { + compatible = "zephyr,memory-region"; + reg = <0x90000000 DT_SIZE_M(16)>; /* max addressable area */ + zephyr,memory-region = "EXTMEM"; + /* The ATTR_MPU_EXTMEM attribut causing a MPU FAULT */ + zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO) )>; + }; }; zephyr_udc0: &usbotg_fs { From 8e71141c1b0ab4c98df2e1a3350dfff0a048fabb Mon Sep 17 00:00:00 2001 From: pennam Date: Tue, 4 Nov 2025 11:35:21 +0100 Subject: [PATCH 4/4] boards: opta: enable SDHC SDIO support This commit enable SDHC SDIO support for OPTA Signed-off-by: Mattia Pennasilico --- boards/arduino/opta/arduino_opta-common.dtsi | 24 ++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/boards/arduino/opta/arduino_opta-common.dtsi b/boards/arduino/opta/arduino_opta-common.dtsi index cf276172889de..afb351894373e 100644 --- a/boards/arduino/opta/arduino_opta-common.dtsi +++ b/boards/arduino/opta/arduino_opta-common.dtsi @@ -201,3 +201,27 @@ zephyr,resolution = <16>; }; }; + +sdhc: &sdmmc1 { + compatible = "st,stm32-sdio"; + pinctrl-0 = <&sdmmc1_d0_pc8 &sdmmc1_d1_pc9 + &sdmmc1_d2_pc10 &sdmmc1_d3_pc11 + &sdmmc1_ck_pc12 &sdmmc1_cmd_pd2>; + pinctrl-names = "default"; + sdhi-on-gpios = <&gpioj 1 GPIO_ACTIVE_HIGH>; + power-delay-ms = <50>; + interrupts = <49 0>; + interrupt-names = "event"; + min-bus-freq = ; + max-bus-freq = ; + hw-flow-control; + bus-width = <4>; + status= "okay"; + + wifi: airoc-wifi { + status = "okay"; + compatible = "infineon,airoc-wifi"; + wifi-reg-on-gpios = <&gpioj 1 GPIO_ACTIVE_HIGH>; + wifi-host-wake-gpios = <&gpioj 5 GPIO_ACTIVE_HIGH>; + }; +};