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rockchip: add Orange Pi R1 Plus support (#2755)
* rockchip: add Orange Pi R1 Plus support Signed-off-by: AmadeusGhost <amadeus@jmu.edu.cn> * rockchip: nanopi-r2s: add gpio for the lan/wan leds
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- +10 −0 config/boards/orangepi-r1plus.conf
- +2 −2 config/sources/families/include/rockchip64_common.inc
- +12 −1 patch/kernel/archive/rockchip64-5.10/add-board-nanopi-r2s.patch
- +52 −0 patch/kernel/archive/rockchip64-5.10/add-board-orangepi-r1plus.patch
- +2 −1 patch/kernel/archive/rockchip64-5.10/add-boards-to-dts-makefile.patch
- +12 −1 patch/kernel/archive/rockchip64-5.11/add-board-nanopi-r2s.patch
- +52 −0 patch/kernel/archive/rockchip64-5.11/add-board-orangepi-r1plus.patch
- +2 −1 patch/kernel/archive/rockchip64-5.11/add-boards-to-dts-makefile.patch
- +187 −0 patch/u-boot/u-boot-rockchip64-edge/add-board-orangepi-r1plus.patch
- +187 −0 patch/u-boot/u-boot-rockchip64-mainline/add-board-orangepi-r1plus.patch
| @@ -0,0 +1,10 @@ | ||
| # Rockchip RK3328 quad core 1GB 2xGBE USB2 SPI | ||
| BOARD_NAME="Orange Pi R1 Plus" | ||
| BOARDFAMILY="rockchip64" | ||
| BOOTCONFIG="orangepi_r1_plus_rk3328_defconfig" | ||
| KERNEL_TARGET="current,edge" | ||
| DEFAULT_CONSOLE="serial" | ||
| MODULES="g_serial" | ||
| MODULES_BLACKLIST="rockchipdrm analogix_dp dw_mipi_dsi dw_hdmi gpu_sched lima hantro_vpu" | ||
| SERIALCON="ttyS2:1500000,ttyGS0" | ||
| BUILD_DESKTOP="no" |
| @@ -0,0 +1,52 @@ | ||
| diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts | ||
| new file mode 100644 | ||
| index 000000000..2ee07d15a | ||
| --- /dev/null | ||
| +++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts | ||
| @@ -0,0 +1,46 @@ | ||
| +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
| +/* | ||
| + * Copyright (c) 2020 Shenzhen Xunlong Software CO.,Limited | ||
| + * Copyright (c) 2021 AmadeusGhost <amadeus@jmu.edu.cn> | ||
| + * | ||
| + * Based on Nanopi R2S | ||
| + */ | ||
| + | ||
| +#include "rk3328-nanopi-r2-rev00.dts" | ||
| + | ||
| +/ { | ||
| + model = "Xunlong Orange Pi R1 Plus"; | ||
| + compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; | ||
| +}; | ||
| + | ||
| +&leds_gpio { | ||
| + rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; | ||
| +}; | ||
| + | ||
| +&leds { | ||
| + led@1 { | ||
| + gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; | ||
| + }; | ||
| +}; | ||
| + | ||
| +&mach { | ||
| + compatible = "orangepi,board"; | ||
| + hwrev = <2>; | ||
| + machine = "ORANGEPI-R1PLUS"; | ||
| + model = "OrangePi R1PLUS"; | ||
| +}; | ||
| + | ||
| +&spi0 { | ||
| + max-freq = <48000000>; | ||
| + status = "okay"; | ||
| + | ||
| + flash@0 { | ||
| + compatible = "jedec,spi-nor"; | ||
| + reg = <0>; | ||
| + spi-max-frequency = <10000000>; | ||
| + }; | ||
| +}; | ||
| + | ||
| +&uart1 { | ||
| + status = "okay"; | ||
| +}; |
| @@ -0,0 +1,52 @@ | ||
| diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts | ||
| new file mode 100644 | ||
| index 000000000..2ee07d15a | ||
| --- /dev/null | ||
| +++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts | ||
| @@ -0,0 +1,46 @@ | ||
| +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
| +/* | ||
| + * Copyright (c) 2020 Shenzhen Xunlong Software CO.,Limited | ||
| + * Copyright (c) 2021 AmadeusGhost <amadeus@jmu.edu.cn> | ||
| + * | ||
| + * Based on Nanopi R2S | ||
| + */ | ||
| + | ||
| +#include "rk3328-nanopi-r2-rev00.dts" | ||
| + | ||
| +/ { | ||
| + model = "Xunlong Orange Pi R1 Plus"; | ||
| + compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; | ||
| +}; | ||
| + | ||
| +&leds_gpio { | ||
| + rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; | ||
| +}; | ||
| + | ||
| +&leds { | ||
| + led@1 { | ||
| + gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; | ||
| + }; | ||
| +}; | ||
| + | ||
| +&mach { | ||
| + compatible = "orangepi,board"; | ||
| + hwrev = <2>; | ||
| + machine = "ORANGEPI-R1PLUS"; | ||
| + model = "OrangePi R1PLUS"; | ||
| +}; | ||
| + | ||
| +&spi0 { | ||
| + max-freq = <48000000>; | ||
| + status = "okay"; | ||
| + | ||
| + flash@0 { | ||
| + compatible = "jedec,spi-nor"; | ||
| + reg = <0>; | ||
| + spi-max-frequency = <10000000>; | ||
| + }; | ||
| +}; | ||
| + | ||
| +&uart1 { | ||
| + status = "okay"; | ||
| +}; |
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