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@@ -329,10 +329,10 @@ index 0000000..59cae37 |
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+}; |
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diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts |
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new file mode 100644 |
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index 0000000..ac747a6 |
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index 0000000..457359c |
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--- /dev/null |
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+++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts |
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@@ -0,0 +1,833 @@ |
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@@ -0,0 +1,864 @@ |
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+/* |
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+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd |
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+ * |
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@@ -392,6 +392,7 @@ index 0000000..ac747a6 |
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+ compatible = "rockchip,fiq-debugger"; |
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+ rockchip,serial-id = <2>; |
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+ rockchip,signal-irq = <159>; |
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+ rockchip,wake-irq = <0>; |
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+ /* If enable uart uses irq instead of fiq */ |
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+ rockchip,irq-mode-enable = <0>; |
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+ rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ |
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@@ -493,17 +494,38 @@ index 0000000..ac747a6 |
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+ regulator-type = "voltage"; |
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+ regulator-min-microvolt = <1800000>; |
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+ regulator-max-microvolt = <3300000>; |
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+ status="disabled"; |
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+ }; |
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+ vcc5v0_host: vcc5v0-host-regulator { |
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+ vcc_host1_5v: vcc_otg_5v: vcc5v0-host-regulator { |
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+ compatible = "regulator-fixed"; |
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+ enable-active-high; |
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+ gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>; |
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+ pinctrl-names = "default"; |
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+ pinctrl-0 = <&host_vbus_drv>; |
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+ regulator-name = "vcc5v0_host"; |
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+ regulator-name = "vcc_host1_5v"; |
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+ regulator-always-on; |
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+ }; |
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+ |
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+ vcc_host_5v: vcc-host-5v-regulator { |
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+ compatible = "regulator-fixed"; |
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+ enable-active-high; |
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+ gpio = <&gpio0 0 GPIO_ACTIVE_HIGH>; |
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+ pinctrl-names = "default"; |
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+ pinctrl-0 = <&usb30_host_drv>; |
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+ regulator-name = "vcc_host_5v"; |
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+ regulator-always-on; |
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+ vin-supply = <&vcc_sys>; |
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+ }; |
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+ |
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+ vcc_sys: vcc-sys { |
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+ compatible = "regulator-fixed"; |
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+ regulator-name = "vcc_sys"; |
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+ regulator-always-on; |
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+ regulator-boot-on; |
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+ regulator-min-microvolt = <5000000>; |
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+ regulator-max-microvolt = <5000000>; |
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+ }; |
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+ |
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+ wireless-wlan { |
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+ compatible = "wlan-platdata"; |
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+ rockchip,grf = <&grf>; |
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@@ -572,14 +594,14 @@ index 0000000..ac747a6 |
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+ |
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+ system-status-freq = < |
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+ /*system status freq(KHz)*/ |
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+ SYS_STATUS_NORMAL 1066000 |
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+ SYS_STATUS_REBOOT 1066000 |
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+ SYS_STATUS_SUSPEND 1066000 |
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+ SYS_STATUS_VIDEO_1080P 1066000 |
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+ SYS_STATUS_VIDEO_4K 1066000 |
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+ SYS_STATUS_VIDEO_4K_10B 1066000 |
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+ SYS_STATUS_PERFORMANCE 1066000 |
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+ SYS_STATUS_BOOST 1066000 |
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+ SYS_STATUS_NORMAL 1024000 |
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+ SYS_STATUS_REBOOT 1024000 |
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+ SYS_STATUS_SUSPEND 1024000 |
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+ SYS_STATUS_VIDEO_1080P 1024000 |
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+ SYS_STATUS_VIDEO_4K 1024000 |
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+ SYS_STATUS_VIDEO_4K_10B 1024000 |
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+ SYS_STATUS_PERFORMANCE 1024000 |
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+ SYS_STATUS_BOOST 1024000 |
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+ >; |
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+}; |
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+ |
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@@ -604,8 +626,8 @@ index 0000000..ac747a6 |
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+ opp-microvolt-L0 = <1150000>; |
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+ opp-microvolt-L1 = <1100000>; |
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+ }; |
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+ opp-1066000000 { |
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+ opp-hz = /bits/ 64 <1066000000>; |
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+ opp-1024000000 { |
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+ opp-hz = /bits/ 64 <1024000000>; |
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+ opp-microvolt = <1200000>; |
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+ opp-microvolt-L0 = <1200000>; |
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+ opp-microvolt-L1 = <1175000>; |
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@@ -704,13 +726,14 @@ index 0000000..ac747a6 |
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+ clock_in_out = "input"; |
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+ snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; |
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+ snps,reset-active-low; |
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+ snps,force_thresh_dma_mode; |
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+ snps,reset-delays-us = <0 10000 50000>; |
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+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; |
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+ assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; |
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+ pinctrl-names = "default"; |
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+ pinctrl-0 = <&rgmiim1_pins>; |
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+ tx_delay = <0x25>; |
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+ rx_delay = <0x11>; |
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+ tx_delay = <0x28>; |
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+ rx_delay = <0x16>; |
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+ status = "okay"; |
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+}; |
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+ |
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@@ -932,7 +955,8 @@ index 0000000..ac747a6 |
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+ |
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+ vccio1-supply = <&vcc_io>; |
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+ vccio2-supply = <&vcc_18emmc>; |
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+ vccio3-supply = <&vccio_sd>; |
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+ //vccio3-supply = <&vccio_sd>; |
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+ vccio3-supply = <&vcc_io>; |
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+ vccio4-supply = <&vdd_18>; |
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+ vccio5-supply = <&vcc_io>; |
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+ vccio6-supply = <&vcc_io>; |
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@@ -961,6 +985,12 @@ index 0000000..ac747a6 |
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+ }; |
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+ }; |
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+ |
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+ usb3 { |
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+ usb30_host_drv: usb30-host-drv { |
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+ rockchip,pins = <0 0 RK_FUNC_GPIO &pcfg_pull_none>; |
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+ }; |
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+ }; |
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+ |
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+/* |
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+ sdmmcio-regulator { |
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+ sd_pwr_1800_sel: sd-pwr-1800-sel { |
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@@ -996,9 +1026,9 @@ index 0000000..ac747a6 |
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+ bus-width = <4>; |
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+ cap-mmc-highspeed; |
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+ cap-sd-highspeed; |
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+ sd-uhs-sdr104; |
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+ //sd-uhs-sdr104; |
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+ disable-wp; |
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+ clock-freq-min-max = <400000 150000000>; |
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+ clock-freq-min-max = <400000 80000000>; |
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+ clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, |
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+ <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; |
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+ clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; |
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@@ -1008,7 +1038,7 @@ index 0000000..ac747a6 |
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+ supports-sd; |
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+ status = "okay"; |
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+ vmmc-supply = <&vcc_sd>; |
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+ vqmmc-supply = <&vccio_sd>; |
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+ //vqmmc-supply = <&vccio_sd>; |
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+}; |
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+ |
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+&spdif { |
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@@ -1021,20 +1051,21 @@ index 0000000..ac747a6 |
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+}; |
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+ |
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+&u2phy { |
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+ otg-vbus-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>; |
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+ status = "okay"; |
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+ status = "okay"; |
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+ |
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+ u2phy_host: host-port { |
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+ status = "okay"; |
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+ }; |
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+ u2phy_host: host-port { |
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+ phy-supply = <&vcc_otg_5v>; |
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+ status = "okay"; |
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+ }; |
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+ |
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+ u2phy_otg: otg-port { |
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+ status = "okay"; |
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+ }; |
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+ u2phy_otg: otg-port { |
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+ phy-supply = <&vcc_host1_5v>; |
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+ status = "okay"; |
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+ }; |
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+}; |
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+ |
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+&u3phy { |
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+ vbus-drv-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; |
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+ phy-supply = <&vcc_host_5v>; |
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+ status = "okay"; |
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+}; |
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+ |
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