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Bugfix https://forum.armbian.com/topic/7719-cuboxi-kernel-414y-does-n… 
…ot-compile-failing-to-compile-imx6dl-cubox-idtb
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@igorpecovnik
igorpecovnik committed Jul 20, 2018
1 parent 3b2c2e1 commit fbb57527107e3633741aef378da7e29447f538f9
8 config/kernel/linux-cubox-next.config
View file
@@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 4.14.43 Kernel Configuration
# Linux/arm 4.14.56 Kernel Configuration
#
CONFIG_ARM=y
CONFIG_ARM_HAS_SG_CHAIN=y
@@ -1204,17 +1204,17 @@ CONFIG_NF_CONNTRACK_IPV6=m
CONFIG_NF_SOCKET_IPV6=y
CONFIG_NF_TABLES_IPV6=m
CONFIG_NFT_CHAIN_ROUTE_IPV6=m
CONFIG_NFT_CHAIN_NAT_IPV6=m
CONFIG_NFT_MASQ_IPV6=m
CONFIG_NFT_REDIR_IPV6=m
CONFIG_NFT_REJECT_IPV6=m
CONFIG_NFT_DUP_IPV6=m
CONFIG_NFT_FIB_IPV6=m
CONFIG_NF_DUP_IPV6=m
CONFIG_NF_REJECT_IPV6=m
CONFIG_NF_LOG_IPV6=m
CONFIG_NF_NAT_IPV6=m
CONFIG_NFT_CHAIN_NAT_IPV6=m
CONFIG_NF_NAT_MASQUERADE_IPV6=m
CONFIG_NFT_MASQ_IPV6=m
CONFIG_NFT_REDIR_IPV6=m
CONFIG_IP6_NF_IPTABLES=m
CONFIG_IP6_NF_MATCH_AH=m
CONFIG_IP6_NF_MATCH_EUI64=m
18 ...l/cubox-next/01-v2-05-16-ARM-dts-imx6qdl-sr-som-use-real-iomuxc-values-for-ethernet.patch
View file
@@ -0,0 +1,18 @@
diff --git a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi
index c1541f2ecf3a..2b332db6c20d 100644
--- a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi
@@ -116,10 +116,10 @@
/* AR8035 reset */
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0
/* AR8035 interrupt */
- MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x80000000
+ MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
/* GPIO16 -> AR8035 25MHz */
- MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000
- MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0b0
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x13030
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
338 ...rnel/cubox-next/01-v2-06-16-ARM-dts-imx6qdl-sr-som-split-out-Broadcom-Wi-Fi-support.patch
View file
@@ -0,0 +1,338 @@
diff --git a/arch/arm/boot/dts/imx6dl-cubox-i.dts b/arch/arm/boot/dts/imx6dl-cubox-i.dts
index 045e59de5ffe..2b1b3e193f53 100644
--- a/arch/arm/boot/dts/imx6dl-cubox-i.dts
+++ b/arch/arm/boot/dts/imx6dl-cubox-i.dts
@@ -42,6 +42,7 @@

#include "imx6dl.dtsi"
#include "imx6qdl-sr-som.dtsi"
+#include "imx6qdl-sr-som-brcm.dtsi"
#include "imx6qdl-cubox-i.dtsi"

/ {
diff --git a/arch/arm/boot/dts/imx6dl-hummingboard.dts b/arch/arm/boot/dts/imx6dl-hummingboard.dts
index c3b826f4cab9..cbd02eb486e1 100644
--- a/arch/arm/boot/dts/imx6dl-hummingboard.dts
+++ b/arch/arm/boot/dts/imx6dl-hummingboard.dts
@@ -43,6 +43,7 @@

#include "imx6dl.dtsi"
#include "imx6qdl-sr-som.dtsi"
+#include "imx6qdl-sr-som-brcm.dtsi"
#include "imx6qdl-hummingboard.dtsi"

/ {
diff --git a/arch/arm/boot/dts/imx6q-cubox-i.dts b/arch/arm/boot/dts/imx6q-cubox-i.dts
index b9f581d0fa86..1c7b262e3709 100644
--- a/arch/arm/boot/dts/imx6q-cubox-i.dts
+++ b/arch/arm/boot/dts/imx6q-cubox-i.dts
@@ -42,6 +42,7 @@

#include "imx6q.dtsi"
#include "imx6qdl-sr-som.dtsi"
+#include "imx6qdl-sr-som-brcm.dtsi"
#include "imx6qdl-cubox-i.dtsi"

/ {
diff --git a/arch/arm/boot/dts/imx6q-h100.dts b/arch/arm/boot/dts/imx6q-h100.dts
index 815e9437e3f0..743c11f1ad4e 100644
--- a/arch/arm/boot/dts/imx6q-h100.dts
+++ b/arch/arm/boot/dts/imx6q-h100.dts
@@ -43,6 +43,7 @@

#include "imx6q.dtsi"
#include "imx6qdl-sr-som.dtsi"
+#include "imx6qdl-sr-som-brcm.dtsi"

/ {
model = "Auvidea H100";
diff --git a/arch/arm/boot/dts/imx6q-hummingboard.dts b/arch/arm/boot/dts/imx6q-hummingboard.dts
index 5f218856c3e5..8c9e94e648a7 100644
--- a/arch/arm/boot/dts/imx6q-hummingboard.dts
+++ b/arch/arm/boot/dts/imx6q-hummingboard.dts
@@ -43,6 +43,7 @@

#include "imx6q.dtsi"
#include "imx6qdl-sr-som.dtsi"
+#include "imx6qdl-sr-som-brcm.dtsi"
#include "imx6qdl-hummingboard.dtsi"

/ {
diff --git a/arch/arm/boot/dts/imx6qdl-sr-som-brcm.dtsi b/arch/arm/boot/dts/imx6qdl-sr-som-brcm.dtsi
new file mode 100644
index 000000000000..809d7896775c
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-sr-som-brcm.dtsi
@@ -0,0 +1,144 @@
+/*
+ * Copyright (C) 2013,2014 Russell King
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include <dt-bindings/gpio/gpio.h>
+/ {
+ clk_sdio: sdio-clock {
+ compatible = "gpio-gate-clock";
+ #clock-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_microsom_brcm_osc>;
+ enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_brcm: brcm-reg {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio3 19 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_microsom_brcm_reg>;
+ regulator-name = "brcm_reg";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <200000>;
+ };
+
+ usdhc1_pwrseq: usdhc1_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>,
+ <&gpio6 0 GPIO_ACTIVE_LOW>;
+ clocks = <&clk_sdio>;
+ clock-names = "ext_clock";
+ };
+};
+
+&iomuxc {
+ microsom {
+ pinctrl_microsom_brcm_bt: microsom-brcm-bt {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x40013070
+ MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01 0x40013070
+ MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x40013070
+ >;
+ };
+
+ pinctrl_microsom_brcm_osc: microsom-brcm-osc {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x40013070
+ >;
+ };
+
+ pinctrl_microsom_brcm_reg: microsom-brcm-reg {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x40013070
+ >;
+ };
+
+ pinctrl_microsom_brcm_wifi: microsom-brcm-wifi {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K 0x1b0b0
+ MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x40013070
+ MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x40013070
+ MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x40013070
+ >;
+ };
+
+ pinctrl_microsom_uart4: microsom-uart4 {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
+ MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
+ MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
+ >;
+ };
+
+ pinctrl_microsom_usdhc1: microsom-usdhc1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
+ >;
+ };
+ };
+};
+
+/* UART4 - Connected to optional BRCM Wifi/BT/FM */
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_microsom_brcm_bt &pinctrl_microsom_uart4>;
+ uart-has-rtscts;
+ status = "okay";
+};
+
+/* USDHC1 - Connected to optional BRCM Wifi/BT/FM */
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_microsom_brcm_wifi &pinctrl_microsom_usdhc1>;
+ bus-width = <4>;
+ mmc-pwrseq = <&usdhc1_pwrseq>;
+ keep-power-in-suspend;
+ no-1-8-v;
+ non-removable;
+ vmmc-supply = <&reg_brcm>;
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi
index 2b332db6c20d..449e241badfe 100644
--- a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi
@@ -39,35 +39,6 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/gpio/gpio.h>
-/ {
- clk_sdio: sdio-clock {
- compatible = "gpio-gate-clock";
- #clock-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_microsom_brcm_osc>;
- enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
- };
-
- reg_brcm: brcm-reg {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio3 19 0>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_microsom_brcm_reg>;
- regulator-name = "brcm_reg";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- startup-delay-us = <200000>;
- };
-
- usdhc1_pwrseq: usdhc1_pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>,
- <&gpio6 0 GPIO_ACTIVE_LOW>;
- clocks = <&clk_sdio>;
- clock-names = "ext_clock";
- };
-};

&fec {
pinctrl-names = "default";
@@ -80,35 +51,6 @@

&iomuxc {
microsom {
- pinctrl_microsom_brcm_bt: microsom-brcm-bt {
- fsl,pins = <
- MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x40013070
- MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01 0x40013070
- MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x40013070
- >;
- };
-
- pinctrl_microsom_brcm_osc: microsom-brcm-osc {
- fsl,pins = <
- MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x40013070
- >;
- };
-
- pinctrl_microsom_brcm_reg: microsom-brcm-reg {
- fsl,pins = <
- MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x40013070
- >;
- };
-
- pinctrl_microsom_brcm_wifi: microsom-brcm-wifi {
- fsl,pins = <
- MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K 0x1b0b0
- MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x40013070
- MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x40013070
- MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x40013070
- >;
- };
-
pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b8b0
@@ -159,26 +101,6 @@
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>;
};
-
- pinctrl_microsom_uart4: microsom-uart4 {
- fsl,pins = <
- MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
- MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
- MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
- MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
- >;
- };
-
- pinctrl_microsom_usdhc1: microsom-usdhc1 {
- fsl,pins = <
- MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
- MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
- MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
- MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
- MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
- MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
- >;
- };
};
};

@@ -187,24 +109,3 @@
pinctrl-0 = <&pinctrl_microsom_uart1>;
status = "okay";
};
-
-/* UART4 - Connected to optional BRCM Wifi/BT/FM */
-&uart4 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_microsom_brcm_bt &pinctrl_microsom_uart4>;
- uart-has-rtscts;
- status = "okay";
-};
-
-/* USDHC1 - Connected to optional BRCM Wifi/BT/FM */
-&usdhc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_microsom_brcm_wifi &pinctrl_microsom_usdhc1>;
- bus-width = <4>;
- mmc-pwrseq = <&usdhc1_pwrseq>;
- keep-power-in-suspend;
- no-1-8-v;
- non-removable;
- vmmc-supply = <&reg_brcm>;
- status = "okay";
-};

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