{"payload":{"header_redesign_enabled":false,"results":[{"id":"139809328","archived":false,"color":"#b2b7f8","followers":2,"has_funding_file":false,"hl_name":"armleo/sdram_controller","hl_trunc_description":"SDR SDRAM Controller with Avalon-MM bus; [Bugged, deprecated]","language":"Verilog","mirror":false,"owned_by_organization":false,"public":true,"repo":{"repository":{"id":139809328,"name":"sdram_controller","owner_id":7474152,"owner_login":"armleo","updated_at":"2022-04-11T19:56:40.839Z","has_issues":true}},"sponsorable":false,"topics":["fpga","verilog","sdram","sdram-controller"],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":63,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253Aarmleo%252Fsdram_controller%2B%2Blanguage%253AVerilog","metadata":null,"csrf_tokens":{"/armleo/sdram_controller/star":{"post":"oP_dnONV9Nzhe_SFGMDihUk5cZj3coa9pO8seR_Sxan447Wo54okcltjmi-woSdmiU2uvVky9AherQbJ2--rTA"},"/armleo/sdram_controller/unstar":{"post":"HYBHoymG9KipV8TiiNRwxPqEZdfrjhAzatNYmUP2XNwMuVqi1zXiivKG99yDxFcbptLJwO74sWN97RgtxRVW4A"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"AbD14GRzaneBuQoFOnCIn6ah4CIgPdbD1qZWfxwDVqmLM3VaMSKrkAMBjlNjWvIeiL6_X6EozKFQSRU9ZuIBJw"}}},"title":"Repository search results"}