openat(AT_FDCWD, "/dev/dri", O_RDONLY|O_NONBLOCK|O_CLOEXEC|O_DIRECTORY) = 8 stat("/dev/dri/card0", {st_mode=S_IFCHR|0660, st_rdev=makedev(0xe2, 0), ...}) = 0 stat("/dev/dri/renderD128", {st_mode=S_IFCHR|0666, st_rdev=makedev(0xe2, 0x80), ...}) = 0 stat("/dev/dri/card0", {st_mode=S_IFCHR|0660, st_rdev=makedev(0xe2, 0), ...}) = 0 stat("/dev/dri/renderD128", {st_mode=S_IFCHR|0666, st_rdev=makedev(0xe2, 0x80), ...}) = 0 openat(AT_FDCWD, "/dev/dri", O_RDONLY|O_NONBLOCK|O_CLOEXEC|O_DIRECTORY) = 8 stat("/dev/dri/card0", {st_mode=S_IFCHR|0660, st_rdev=makedev(0xe2, 0), ...}) = 0 stat("/dev/dri/renderD128", {st_mode=S_IFCHR|0666, st_rdev=makedev(0xe2, 0x80), ...}) = 0 openat(AT_FDCWD, "/dev/dri", O_RDONLY|O_NONBLOCK|O_CLOEXEC|O_DIRECTORY) = 8 stat("/dev/dri/card0", {st_mode=S_IFCHR|0660, st_rdev=makedev(0xe2, 0), ...}) = 0 stat("/dev/dri/renderD128", {st_mode=S_IFCHR|0666, st_rdev=makedev(0xe2, 0x80), ...}) = 0 stat("/dev/dri/card0", {st_mode=S_IFCHR|0660, st_rdev=makedev(0xe2, 0), ...}) = 0 stat("/dev/dri/renderD128", {st_mode=S_IFCHR|0666, st_rdev=makedev(0xe2, 0x80), ...}) = 0 openat(AT_FDCWD, "/dev/dri", O_RDONLY|O_NONBLOCK|O_CLOEXEC|O_DIRECTORY) = 9 stat("/dev/dri/card0", {st_mode=S_IFCHR|0660, st_rdev=makedev(0xe2, 0), ...}) = 0 stat("/dev/dri/renderD128", {st_mode=S_IFCHR|0666, st_rdev=makedev(0xe2, 0x80), ...}) = 0 stat("/dev/dri/card0", {st_mode=S_IFCHR|0660, st_rdev=makedev(0xe2, 0), ...}) = 0 stat("/dev/dri/renderD128", {st_mode=S_IFCHR|0666, st_rdev=makedev(0xe2, 0x80), ...}) = 0 openat(AT_FDCWD, "/dev/dri", O_RDONLY|O_NONBLOCK|O_CLOEXEC|O_DIRECTORY) = 9 stat("/dev/dri/card0", {st_mode=S_IFCHR|0660, st_rdev=makedev(0xe2, 0), ...}) = 0 stat("/dev/dri/renderD128", {st_mode=S_IFCHR|0666, st_rdev=makedev(0xe2, 0x80), ...}) = 0 stat("/dev/dri/card0", {st_mode=S_IFCHR|0660, st_rdev=makedev(0xe2, 0), ...}) = 0 stat("/dev/dri/renderD128", {st_mode=S_IFCHR|0666, st_rdev=makedev(0xe2, 0x80), ...}) = 0 openat(AT_FDCWD, "/dev/dri", O_RDONLY|O_NONBLOCK|O_CLOEXEC|O_DIRECTORY) = 11 stat("/dev/dri/card0", {st_mode=S_IFCHR|0660, st_rdev=makedev(0xe2, 0), ...}) = 0 stat("/dev/dri/renderD128", {st_mode=S_IFCHR|0666, st_rdev=makedev(0xe2, 0x80), ...}) = 0 stat("/dev/dri/card0", {st_mode=S_IFCHR|0660, st_rdev=makedev(0xe2, 0), ...}) = 0 stat("/dev/dri/renderD128", {st_mode=S_IFCHR|0666, st_rdev=makedev(0xe2, 0x80), ...}) = 0 [pid 718235] stat("/dev/input/event26", {st_mode=S_IFCHR|0664, st_rdev=makedev(0xd, 0x5a), ...}) = 0 [pid 718235] openat(AT_FDCWD, "/dev/input/event26", O_RDONLY) = 12 [pid 718235] access("/dev/hidraw0", R_OK|W_OK) = 0 [pid 718235] access("/dev/hidraw1", R_OK|W_OK) = 0 [pid 718235] access("/dev/hidraw3", R_OK|W_OK) = 0 [pid 718235] access("/dev/hidraw4", R_OK|W_OK) = 0 [pid 718235] access("/dev/hidraw5", R_OK|W_OK) = 0 [pid 718235] access("/dev/hidraw6", R_OK|W_OK) = 0 [pid 718235] access("/dev/hidraw7", R_OK|W_OK) = 0 [pid 718235] access("/dev/hidraw2", R_OK|W_OK) = 0 [pid 718235] access("/dev/hidraw0", R_OK|W_OK) = 0 [pid 718235] access("/dev/hidraw1", R_OK|W_OK) = 0 [pid 718235] access("/dev/hidraw3", R_OK|W_OK) = 0 [pid 718235] access("/dev/hidraw4", R_OK|W_OK) = 0 [pid 718235] access("/dev/hidraw5", R_OK|W_OK) = 0 [pid 718235] access("/dev/hidraw6", R_OK|W_OK) = 0 [pid 718235] access("/dev/hidraw7", R_OK|W_OK) = 0 [pid 718235] access("/dev/hidraw2", R_OK|W_OK) = 0 [pid 718235] stat("/dev/input/js0", {st_mode=S_IFCHR|0664, st_rdev=makedev(0xd, 0), ...}) = 0 [pid 718235] openat(AT_FDCWD, "/dev/input/js0", O_RDONLY) = 12 [pid 718235] openat(AT_FDCWD, "/dev/hidraw7", O_RDWR) = 12 [pid 718235] openat(AT_FDCWD, "/dev/hidraw7", O_RDWR) = 12