Moxie-compatible core repository
Verilog VHDL C Tcl Common Lisp Makefile Other
Latest commit 21a4c12 Feb 25, 2015 @atgreen mox125 fixes
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cores
firmware Clean ups Dec 11, 2014
scripts
soc
tools Add path to tools for test script Dec 27, 2014
.gitignore Add more stuff to .gitignore Dec 4, 2012
HACKING Explain how to program the boards Dec 4, 2013
README Mention marin on DE2 Aug 2, 2013

README

moxie-cores - a repository of Moxie-compatible cores
=====================================================

Cores
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* MoxieLite - a bi-endian non-pipelined moxie implementation in VHDL
* mox125 - a big-endian pipelined moxie implementation in Verilog.

System-on-Chips
----------------

* marin - a MoxieLite-based SoC for the Spartan 6 based Nexys3 and
          Cyclone II based DE2 eval boards.
* muskoka - a mox125-based SoC for the Cyclone II based Altera DE2 eval board.


See the HACKING file for notes on how to build, use and contribute to
moxie-cores.


Anthony Green
green@moxielogic.com